1 /* $NetBSD: cz.c,v 1.32 2005/06/28 00:28:41 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Zembu Labs, Inc. 5 * All rights reserved. 6 * 7 * Authors: Jason R. Thorpe <thorpej@zembu.com> 8 * Bill Studenmund <wrstuden@zembu.com> 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Zembu Labs, Inc. 21 * 4. Neither the name of Zembu Labs nor the names of its employees may 22 * be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY ZEMBU LABS, INC. ``AS IS'' AND ANY EXPRESS 26 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WAR- 27 * RANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DIS- 28 * CLAIMED. IN NO EVENT SHALL ZEMBU LABS BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * Cyclades-Z series multi-port serial adapter driver for NetBSD. 39 * 40 * Some notes: 41 * 42 * - The Cyclades-Z has fully automatic hardware (and software!) 43 * flow control. We only use RTS/CTS flow control here, 44 * and it is implemented in a very simplistic manner. This 45 * may be an area of future work. 46 * 47 * - The PLX can map the either the board's RAM or host RAM 48 * into the MIPS's memory window. This would enable us to 49 * use less expensive (for us) memory reads/writes to host 50 * RAM, rather than time-consuming reads/writes to PCI 51 * memory space. However, the PLX can only map a 0-128M 52 * window, so we would have to ensure that the DMA address 53 * of the host RAM fits there. This is kind of a pain, 54 * so we just don't bother right now. 55 * 56 * - In a perfect world, we would use the autoconfiguration 57 * mechanism to attach the TTYs that we find. However, 58 * that leads to somewhat icky looking autoconfiguration 59 * messages (one for every TTY, up to 64 per board!). So 60 * we don't do it that way, but assign minors as if there 61 * were the max of 64 ports per board. 62 * 63 * - We don't bother with PPS support here. There are so many 64 * ports, each with a large amount of buffer space, that the 65 * normal mode of operation is to poll the boards regularly 66 * (generally, every 20ms or so). This makes this driver 67 * unsuitable for PPS, as the latency will be generally too 68 * high. 69 */ 70 /* 71 * This driver inspired by the FreeBSD driver written by Brian J. McGovern 72 * for FreeBSD 3.2. 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: cz.c,v 1.32 2005/06/28 00:28:41 thorpej Exp $"); 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/proc.h> 81 #include <sys/device.h> 82 #include <sys/malloc.h> 83 #include <sys/tty.h> 84 #include <sys/conf.h> 85 #include <sys/time.h> 86 #include <sys/kernel.h> 87 #include <sys/fcntl.h> 88 #include <sys/syslog.h> 89 90 #include <sys/callout.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 #include <dev/pci/czreg.h> 96 97 #include <dev/pci/plx9060reg.h> 98 #include <dev/pci/plx9060var.h> 99 100 #include <dev/microcode/cyclades-z/cyzfirm.h> 101 102 #define CZ_DRIVER_VERSION 0x20000411 103 104 #define CZ_POLL_MS 20 105 106 /* These are the interrupts we always use. */ 107 #define CZ_INTERRUPTS \ 108 (C_IN_MDSR | C_IN_MRI | C_IN_MRTS | C_IN_MCTS | C_IN_TXBEMPTY | \ 109 C_IN_TXFEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | C_IN_RXNNDT | \ 110 C_IN_MDCD | C_IN_PR_ERROR | C_IN_FR_ERROR | C_IN_OVR_ERROR | \ 111 C_IN_RXOFL | C_IN_IOCTLW | C_IN_RXBRK) 112 113 /* 114 * cztty_softc: 115 * 116 * Per-channel (TTY) state. 117 */ 118 struct cztty_softc { 119 struct cz_softc *sc_parent; 120 struct tty *sc_tty; 121 122 struct callout sc_diag_ch; 123 124 int sc_channel; /* Also used to flag unattached chan */ 125 #define CZTTY_CHANNEL_DEAD -1 126 127 bus_space_tag_t sc_chan_st; /* channel space tag */ 128 bus_space_handle_t sc_chan_sh; /* channel space handle */ 129 bus_space_handle_t sc_buf_sh; /* buffer space handle */ 130 131 u_int sc_overflows, 132 sc_parity_errors, 133 sc_framing_errors, 134 sc_errors; 135 136 int sc_swflags; 137 138 u_int32_t sc_rs_control_dtr, 139 sc_chanctl_hw_flow, 140 sc_chanctl_comm_baud, 141 sc_chanctl_rs_control, 142 sc_chanctl_comm_data_l, 143 sc_chanctl_comm_parity; 144 }; 145 146 /* 147 * cz_softc: 148 * 149 * Per-board state. 150 */ 151 struct cz_softc { 152 struct device cz_dev; /* generic device info */ 153 struct plx9060_config cz_plx; /* PLX 9060 config info */ 154 bus_space_tag_t cz_win_st; /* window space tag */ 155 bus_space_handle_t cz_win_sh; /* window space handle */ 156 struct callout cz_callout; /* callout for polling-mode */ 157 158 void *cz_ih; /* interrupt handle */ 159 160 u_int32_t cz_mailbox0; /* our MAILBOX0 value */ 161 int cz_nchannels; /* number of channels */ 162 int cz_nopenchan; /* number of open channels */ 163 struct cztty_softc *cz_ports; /* our array of ports */ 164 165 bus_addr_t cz_fwctl; /* offset of firmware control */ 166 }; 167 168 static int cz_wait_pci_doorbell(struct cz_softc *, const char *); 169 170 static int cz_load_firmware(struct cz_softc *); 171 172 static int cz_intr(void *); 173 static void cz_poll(void *); 174 static int cztty_transmit(struct cztty_softc *, struct tty *); 175 static int cztty_receive(struct cztty_softc *, struct tty *); 176 177 static struct cztty_softc *cztty_getttysoftc(dev_t dev); 178 static int cztty_attached_ttys; 179 static int cz_timeout_ticks; 180 181 static void czttystart(struct tty *tp); 182 static int czttyparam(struct tty *tp, struct termios *t); 183 static void cztty_shutdown(struct cztty_softc *sc); 184 static void cztty_modem(struct cztty_softc *sc, int onoff); 185 static void cztty_break(struct cztty_softc *sc, int onoff); 186 static void tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits); 187 static int cztty_to_tiocm(struct cztty_softc *sc); 188 static void cztty_diag(void *arg); 189 190 extern struct cfdriver cz_cd; 191 192 /* Macros to clear/set/test flags. */ 193 #define SET(t, f) (t) |= (f) 194 #define CLR(t, f) (t) &= ~(f) 195 #define ISSET(t, f) ((t) & (f)) 196 197 /* 198 * Macros to read and write the PLX. 199 */ 200 #define CZ_PLX_READ(cz, reg) \ 201 bus_space_read_4((cz)->cz_plx.plx_st, (cz)->cz_plx.plx_sh, (reg)) 202 #define CZ_PLX_WRITE(cz, reg, val) \ 203 bus_space_write_4((cz)->cz_plx.plx_st, (cz)->cz_plx.plx_sh, \ 204 (reg), (val)) 205 206 /* 207 * Macros to read and write the FPGA. We must already be in the FPGA 208 * window for this. 209 */ 210 #define CZ_FPGA_READ(cz, reg) \ 211 bus_space_read_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg)) 212 #define CZ_FPGA_WRITE(cz, reg, val) \ 213 bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg), (val)) 214 215 /* 216 * Macros to read and write the firmware control structures in board RAM. 217 */ 218 #define CZ_FWCTL_READ(cz, off) \ 219 bus_space_read_4((cz)->cz_win_st, (cz)->cz_win_sh, \ 220 (cz)->cz_fwctl + (off)) 221 222 #define CZ_FWCTL_WRITE(cz, off, val) \ 223 bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, \ 224 (cz)->cz_fwctl + (off), (val)) 225 226 /* 227 * Convenience macros for cztty routines. PLX window MUST be to RAM. 228 */ 229 #define CZTTY_CHAN_READ(sc, off) \ 230 bus_space_read_4((sc)->sc_chan_st, (sc)->sc_chan_sh, (off)) 231 232 #define CZTTY_CHAN_WRITE(sc, off, val) \ 233 bus_space_write_4((sc)->sc_chan_st, (sc)->sc_chan_sh, \ 234 (off), (val)) 235 236 #define CZTTY_BUF_READ(sc, off) \ 237 bus_space_read_4((sc)->sc_chan_st, (sc)->sc_buf_sh, (off)) 238 239 #define CZTTY_BUF_WRITE(sc, off, val) \ 240 bus_space_write_4((sc)->sc_chan_st, (sc)->sc_buf_sh, \ 241 (off), (val)) 242 243 /* 244 * Convenience macros. 245 */ 246 #define CZ_WIN_RAM(cz) \ 247 do { \ 248 CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_RAM); \ 249 delay(100); \ 250 } while (0) 251 252 #define CZ_WIN_FPGA(cz) \ 253 do { \ 254 CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_FPGA); \ 255 delay(100); \ 256 } while (0) 257 258 /***************************************************************************** 259 * Cyclades-Z controller code starts here... 260 *****************************************************************************/ 261 262 /* 263 * cz_match: 264 * 265 * Determine if the given PCI device is a Cyclades-Z board. 266 */ 267 static int 268 cz_match(struct device *parent, 269 struct cfdata *match, 270 void *aux) 271 { 272 struct pci_attach_args *pa = aux; 273 274 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYCLADES) { 275 switch (PCI_PRODUCT(pa->pa_id)) { 276 case PCI_PRODUCT_CYCLADES_CYCLOMZ_2: 277 return (1); 278 } 279 } 280 281 return (0); 282 } 283 284 /* 285 * cz_attach: 286 * 287 * A Cyclades-Z board was found; attach it. 288 */ 289 static void 290 cz_attach(struct device *parent, 291 struct device *self, 292 void *aux) 293 { 294 extern const struct cdevsw cz_cdevsw; /* XXX */ 295 struct cz_softc *cz = (void *) self; 296 struct pci_attach_args *pa = aux; 297 pci_intr_handle_t ih; 298 const char *intrstr = NULL; 299 struct cztty_softc *sc; 300 struct tty *tp; 301 int i; 302 303 aprint_naive(": Multi-port serial controller\n"); 304 aprint_normal(": Cyclades-Z multiport serial\n"); 305 306 cz->cz_plx.plx_pc = pa->pa_pc; 307 cz->cz_plx.plx_tag = pa->pa_tag; 308 309 if (pci_mapreg_map(pa, PLX_PCI_RUNTIME_MEMADDR, 310 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 311 &cz->cz_plx.plx_st, &cz->cz_plx.plx_sh, NULL, NULL) != 0) { 312 aprint_error("%s: unable to map PLX registers\n", 313 cz->cz_dev.dv_xname); 314 return; 315 } 316 if (pci_mapreg_map(pa, PLX_PCI_LOCAL_ADDR0, 317 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 318 &cz->cz_win_st, &cz->cz_win_sh, NULL, NULL) != 0) { 319 aprint_error("%s: unable to map device window\n", 320 cz->cz_dev.dv_xname); 321 return; 322 } 323 324 cz->cz_mailbox0 = CZ_PLX_READ(cz, PLX_MAILBOX0); 325 cz->cz_nopenchan = 0; 326 327 /* 328 * Make sure that the board is completely stopped. 329 */ 330 CZ_WIN_FPGA(cz); 331 CZ_FPGA_WRITE(cz, FPGA_CPU_STOP, 0); 332 333 /* 334 * Load the board's firmware. 335 */ 336 if (cz_load_firmware(cz) != 0) 337 return; 338 339 /* 340 * Now that we're ready to roll, map and establish the interrupt 341 * handler. 342 */ 343 if (pci_intr_map(pa, &ih) != 0) { 344 /* 345 * The common case is for Cyclades-Z boards to run 346 * in polling mode, and thus not have an interrupt 347 * mapped for them. Don't bother reporting that 348 * the interrupt is not mappable, since this isn't 349 * really an error. 350 */ 351 cz->cz_ih = NULL; 352 goto polling_mode; 353 } else { 354 intrstr = pci_intr_string(pa->pa_pc, ih); 355 cz->cz_ih = pci_intr_establish(pa->pa_pc, ih, IPL_TTY, 356 cz_intr, cz); 357 } 358 if (cz->cz_ih == NULL) { 359 aprint_error("%s: unable to establish interrupt", 360 cz->cz_dev.dv_xname); 361 if (intrstr != NULL) 362 aprint_normal(" at %s", intrstr); 363 aprint_normal("\n"); 364 /* We will fall-back on polling mode. */ 365 } else 366 aprint_normal("%s: interrupting at %s\n", 367 cz->cz_dev.dv_xname, intrstr); 368 369 polling_mode: 370 if (cz->cz_ih == NULL) { 371 callout_init(&cz->cz_callout); 372 if (cz_timeout_ticks == 0) 373 cz_timeout_ticks = max(1, hz * CZ_POLL_MS / 1000); 374 aprint_normal("%s: polling mode, %d ms interval (%d tick%s)\n", 375 cz->cz_dev.dv_xname, CZ_POLL_MS, cz_timeout_ticks, 376 cz_timeout_ticks == 1 ? "" : "s"); 377 } 378 379 /* 380 * Allocate sufficient pointers for the children and 381 * attach them. Set all ports to a reasonable initial 382 * configuration while we're at it: 383 * 384 * disabled 385 * 8N1 386 * default baud rate 387 * hardware flow control. 388 */ 389 CZ_WIN_RAM(cz); 390 391 if (cz->cz_nchannels == 0) { 392 /* No channels? No more work to do! */ 393 return; 394 } 395 396 cz->cz_ports = malloc(sizeof(struct cztty_softc) * cz->cz_nchannels, 397 M_DEVBUF, M_WAITOK|M_ZERO); 398 cztty_attached_ttys += cz->cz_nchannels; 399 400 for (i = 0; i < cz->cz_nchannels; i++) { 401 sc = &cz->cz_ports[i]; 402 403 sc->sc_channel = i; 404 sc->sc_chan_st = cz->cz_win_st; 405 sc->sc_parent = cz; 406 407 if (bus_space_subregion(cz->cz_win_st, cz->cz_win_sh, 408 cz->cz_fwctl + ZFIRM_CHNCTL_OFF(i, 0), 409 ZFIRM_CHNCTL_SIZE, &sc->sc_chan_sh)) { 410 aprint_error( 411 "%s: unable to subregion channel %d control\n", 412 cz->cz_dev.dv_xname, i); 413 sc->sc_channel = CZTTY_CHANNEL_DEAD; 414 continue; 415 } 416 if (bus_space_subregion(cz->cz_win_st, cz->cz_win_sh, 417 cz->cz_fwctl + ZFIRM_BUFCTL_OFF(i, 0), 418 ZFIRM_BUFCTL_SIZE, &sc->sc_buf_sh)) { 419 aprint_error( 420 "%s: unable to subregion channel %d buffer\n", 421 cz->cz_dev.dv_xname, i); 422 sc->sc_channel = CZTTY_CHANNEL_DEAD; 423 continue; 424 } 425 426 callout_init(&sc->sc_diag_ch); 427 428 tp = ttymalloc(); 429 tp->t_dev = makedev(cdevsw_lookup_major(&cz_cdevsw), 430 (cz->cz_dev.dv_unit * ZFIRM_MAX_CHANNELS) + i); 431 tp->t_oproc = czttystart; 432 tp->t_param = czttyparam; 433 tty_attach(tp); 434 435 sc->sc_tty = tp; 436 437 CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE); 438 CZTTY_CHAN_WRITE(sc, CHNCTL_INTR_ENABLE, CZ_INTERRUPTS); 439 CZTTY_CHAN_WRITE(sc, CHNCTL_SW_FLOW, 0); 440 CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XON, 0x11); 441 CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XOFF, 0x13); 442 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, TTYDEF_SPEED); 443 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, C_PR_NONE); 444 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, C_DL_CS8 | C_DL_1STOP); 445 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_FLAGS, 0); 446 CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, C_RS_CTS | C_RS_RTS); 447 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, 0); 448 } 449 } 450 451 CFATTACH_DECL(cz, sizeof(struct cz_softc), 452 cz_match, cz_attach, NULL, NULL); 453 454 #if 0 455 /* 456 * cz_reset_board: 457 * 458 * Reset the board via the PLX. 459 */ 460 static void 461 cz_reset_board(struct cz_softc *cz) 462 { 463 u_int32_t reg; 464 465 reg = CZ_PLX_READ(cz, PLX_CONTROL); 466 CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_SWR); 467 delay(1000); 468 469 CZ_PLX_WRITE(cz, PLX_CONTROL, reg); 470 delay(1000); 471 472 /* Now reload the PLX from its EEPROM. */ 473 reg = CZ_PLX_READ(cz, PLX_CONTROL); 474 CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_RELOADCFG); 475 delay(1000); 476 CZ_PLX_WRITE(cz, PLX_CONTROL, reg); 477 } 478 #endif 479 480 /* 481 * cz_load_firmware: 482 * 483 * Load the ZFIRM firmware into the board's RAM and start it 484 * running. 485 */ 486 static int 487 cz_load_firmware(struct cz_softc *cz) 488 { 489 const struct zfirm_header *zfh; 490 const struct zfirm_config *zfc; 491 const struct zfirm_block *zfb, *zblocks; 492 const u_int8_t *cp; 493 const char *board; 494 u_int32_t fid; 495 int i, j, nconfigs, nblocks, nbytes; 496 497 zfh = (const struct zfirm_header *) cycladesz_firmware; 498 499 /* Find the config header. */ 500 if (le32toh(zfh->zfh_configoff) & (sizeof(u_int32_t) - 1)) { 501 aprint_error("%s: bad ZFIRM config offset: 0x%x\n", 502 cz->cz_dev.dv_xname, le32toh(zfh->zfh_configoff)); 503 return (EIO); 504 } 505 zfc = (const struct zfirm_config *)(cycladesz_firmware + 506 le32toh(zfh->zfh_configoff)); 507 nconfigs = le32toh(zfh->zfh_nconfig); 508 509 /* Locate the correct configuration for our board. */ 510 for (i = 0; i < nconfigs; i++, zfc++) { 511 if (le32toh(zfc->zfc_mailbox) == cz->cz_mailbox0 && 512 le32toh(zfc->zfc_function) == ZFC_FUNCTION_NORMAL) 513 break; 514 } 515 if (i == nconfigs) { 516 aprint_error("%s: unable to locate config header\n", 517 cz->cz_dev.dv_xname); 518 return (EIO); 519 } 520 521 nblocks = le32toh(zfc->zfc_nblocks); 522 zblocks = (const struct zfirm_block *)(cycladesz_firmware + 523 le32toh(zfh->zfh_blockoff)); 524 525 /* 526 * 8Zo ver. 1 doesn't have an FPGA. Load it on all others if 527 * necessary. 528 */ 529 if (cz->cz_mailbox0 != MAILBOX0_8Zo_V1 530 #if 0 531 && ((CZ_PLX_READ(cz, PLX_CONTROL) & CONTROL_FPGA_LOADED) == 0) 532 #endif 533 ) { 534 #ifdef CZ_DEBUG 535 aprint_debug("%s: Loading FPGA...", cz->cz_dev.dv_xname); 536 #endif 537 CZ_WIN_FPGA(cz); 538 for (i = 0; i < nblocks; i++) { 539 /* zfb = zblocks + le32toh(zfc->zfc_blocklist[i]) ?? */ 540 zfb = &zblocks[le32toh(zfc->zfc_blocklist[i])]; 541 if (le32toh(zfb->zfb_type) == ZFB_TYPE_FPGA) { 542 nbytes = le32toh(zfb->zfb_size); 543 cp = &cycladesz_firmware[ 544 le32toh(zfb->zfb_fileoff)]; 545 for (j = 0; j < nbytes; j++, cp++) { 546 bus_space_write_1(cz->cz_win_st, 547 cz->cz_win_sh, 0, *cp); 548 /* FPGA needs 30-100us to settle. */ 549 delay(10); 550 } 551 } 552 } 553 #ifdef CZ_DEBUG 554 aprint_debug("done\n"); 555 #endif 556 } 557 558 /* Now load the firmware. */ 559 CZ_WIN_RAM(cz); 560 561 for (i = 0; i < nblocks; i++) { 562 /* zfb = zblocks + le32toh(zfc->zfc_blocklist[i]) ?? */ 563 zfb = &zblocks[le32toh(zfc->zfc_blocklist[i])]; 564 if (le32toh(zfb->zfb_type) == ZFB_TYPE_FIRMWARE) { 565 const u_int32_t *lp; 566 u_int32_t ro = le32toh(zfb->zfb_ramoff); 567 nbytes = le32toh(zfb->zfb_size); 568 lp = (const u_int32_t *) 569 &cycladesz_firmware[le32toh(zfb->zfb_fileoff)]; 570 for (j = 0; j < nbytes; j += 4, lp++) { 571 bus_space_write_4(cz->cz_win_st, cz->cz_win_sh, 572 ro + j, le32toh(*lp)); 573 delay(10); 574 } 575 } 576 } 577 578 /* Now restart the MIPS. */ 579 CZ_WIN_FPGA(cz); 580 CZ_FPGA_WRITE(cz, FPGA_CPU_START, 0); 581 582 /* Wait for the MIPS to start, then report the results. */ 583 CZ_WIN_RAM(cz); 584 585 #ifdef CZ_DEBUG 586 aprint_debug("%s: waiting for MIPS to start", cz->cz_dev.dv_xname); 587 #endif 588 for (i = 0; i < 100; i++) { 589 fid = bus_space_read_4(cz->cz_win_st, cz->cz_win_sh, 590 ZFIRM_SIG_OFF); 591 if (fid == ZFIRM_SIG) { 592 /* MIPS has booted. */ 593 break; 594 } else if (fid == ZFIRM_HLT) { 595 /* 596 * The MIPS has halted, usually due to a power 597 * shortage on the expansion module. 598 */ 599 aprint_error("%s: MIPS halted; possible power supply " 600 "problem\n", cz->cz_dev.dv_xname); 601 return (EIO); 602 } else { 603 #ifdef CZ_DEBUG 604 if ((i % 8) == 0) 605 aprint_debug("."); 606 #endif 607 delay(250000); 608 } 609 } 610 #ifdef CZ_DEBUG 611 aprint_debug("\n"); 612 #endif 613 if (i == 100) { 614 CZ_WIN_FPGA(cz); 615 aprint_error( 616 "%s: MIPS failed to start; wanted 0x%08x got 0x%08x\n", 617 cz->cz_dev.dv_xname, ZFIRM_SIG, fid); 618 aprint_error("%s: FPGA ID 0x%08x, FPGA version 0x%08x\n", 619 cz->cz_dev.dv_xname, CZ_FPGA_READ(cz, FPGA_ID), 620 CZ_FPGA_READ(cz, FPGA_VERSION)); 621 return (EIO); 622 } 623 624 /* 625 * Locate the firmware control structures. 626 */ 627 cz->cz_fwctl = bus_space_read_4(cz->cz_win_st, cz->cz_win_sh, 628 ZFIRM_CTRLADDR_OFF); 629 #ifdef CZ_DEBUG 630 aprint_debug("%s: FWCTL structure at offset 0x%08lx\n", 631 cz->cz_dev.dv_xname, cz->cz_fwctl); 632 #endif 633 634 CZ_FWCTL_WRITE(cz, BRDCTL_C_OS, C_OS_BSD); 635 CZ_FWCTL_WRITE(cz, BRDCTL_DRVERSION, CZ_DRIVER_VERSION); 636 637 cz->cz_nchannels = CZ_FWCTL_READ(cz, BRDCTL_NCHANNEL); 638 639 switch (cz->cz_mailbox0) { 640 case MAILBOX0_8Zo_V1: 641 board = "Cyclades-8Zo ver. 1"; 642 break; 643 644 case MAILBOX0_8Zo_V2: 645 board = "Cyclades-8Zo ver. 2"; 646 break; 647 648 case MAILBOX0_Ze_V1: 649 board = "Cyclades-Ze"; 650 break; 651 652 default: 653 board = "unknown Cyclades Z-series"; 654 break; 655 } 656 657 fid = CZ_FWCTL_READ(cz, BRDCTL_FWVERSION); 658 aprint_normal("%s: %s, ", cz->cz_dev.dv_xname, board); 659 if (cz->cz_nchannels == 0) 660 aprint_normal("no channels attached, "); 661 else 662 aprint_normal("%d channels (ttyCZ%04d..ttyCZ%04d), ", 663 cz->cz_nchannels, cztty_attached_ttys, 664 cztty_attached_ttys + (cz->cz_nchannels - 1)); 665 aprint_normal("firmware %x.%x.%x\n", 666 (fid >> 8) & 0xf, (fid >> 4) & 0xf, fid & 0xf); 667 668 return (0); 669 } 670 671 /* 672 * cz_poll: 673 * 674 * This card doesn't do interrupts, so scan it for activity every CZ_POLL_MS 675 * ms. 676 */ 677 static void 678 cz_poll(void *arg) 679 { 680 int s = spltty(); 681 struct cz_softc *cz = arg; 682 683 cz_intr(cz); 684 callout_reset(&cz->cz_callout, cz_timeout_ticks, cz_poll, cz); 685 686 splx(s); 687 } 688 689 /* 690 * cz_intr: 691 * 692 * Interrupt service routine. 693 * 694 * We either are receiving an interrupt directly from the board, or we are 695 * in polling mode and it's time to poll. 696 */ 697 static int 698 cz_intr(void *arg) 699 { 700 int rval = 0; 701 u_int command, channel, param; 702 struct cz_softc *cz = arg; 703 struct cztty_softc *sc; 704 struct tty *tp; 705 706 while ((command = (CZ_PLX_READ(cz, PLX_LOCAL_PCI_DOORBELL) & 0xff))) { 707 rval = 1; 708 channel = CZ_FWCTL_READ(cz, BRDCTL_FWCMD_CHANNEL); 709 param = CZ_FWCTL_READ(cz, BRDCTL_FWCMD_PARAM); 710 711 /* now clear this interrupt, posslibly enabling another */ 712 CZ_PLX_WRITE(cz, PLX_LOCAL_PCI_DOORBELL, command); 713 714 if (cz->cz_ports == NULL) { 715 #ifdef CZ_DEBUG 716 printf("%s: interrupt on channel %d, but no channels\n", 717 cz->cz_dev.dv_xname, channel); 718 #endif 719 continue; 720 } 721 722 sc = &cz->cz_ports[channel]; 723 724 if (sc->sc_channel == CZTTY_CHANNEL_DEAD) 725 break; 726 727 tp = sc->sc_tty; 728 729 switch (command) { 730 case C_CM_TXFEMPTY: /* transmit cases */ 731 case C_CM_TXBEMPTY: 732 case C_CM_TXLOWWM: 733 case C_CM_INTBACK: 734 if (!ISSET(tp->t_state, TS_ISOPEN)) { 735 #ifdef CZ_DEBUG 736 printf("%s: tx intr on closed channel %d\n", 737 cz->cz_dev.dv_xname, channel); 738 #endif 739 break; 740 } 741 742 if (cztty_transmit(sc, tp)) { 743 /* 744 * Do wakeup stuff here. 745 */ 746 ttwakeup(tp); 747 wakeup(tp); 748 } 749 break; 750 751 case C_CM_RXNNDT: /* receive cases */ 752 case C_CM_RXHIWM: 753 case C_CM_INTBACK2: /* from restart ?? */ 754 #if 0 755 case C_CM_ICHAR: 756 #endif 757 if (!ISSET(tp->t_state, TS_ISOPEN)) { 758 CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, 759 CZTTY_BUF_READ(sc, BUFCTL_RX_PUT)); 760 break; 761 } 762 763 if (cztty_receive(sc, tp)) { 764 /* 765 * Do wakeup stuff here. 766 */ 767 ttwakeup(tp); 768 wakeup(tp); 769 } 770 break; 771 772 case C_CM_MDCD: 773 if (!ISSET(tp->t_state, TS_ISOPEN)) 774 break; 775 776 (void) (*tp->t_linesw->l_modem)(tp, 777 ISSET(C_RS_DCD, CZTTY_CHAN_READ(sc, 778 CHNCTL_RS_STATUS))); 779 break; 780 781 case C_CM_MDSR: 782 case C_CM_MRI: 783 case C_CM_MCTS: 784 case C_CM_MRTS: 785 break; 786 787 case C_CM_IOCTLW: 788 break; 789 790 case C_CM_PR_ERROR: 791 sc->sc_parity_errors++; 792 goto error_common; 793 794 case C_CM_FR_ERROR: 795 sc->sc_framing_errors++; 796 goto error_common; 797 798 case C_CM_OVR_ERROR: 799 sc->sc_overflows++; 800 error_common: 801 if (sc->sc_errors++ == 0) 802 callout_reset(&sc->sc_diag_ch, 60 * hz, 803 cztty_diag, sc); 804 break; 805 806 case C_CM_RXBRK: 807 if (!ISSET(tp->t_state, TS_ISOPEN)) 808 break; 809 810 /* 811 * A break is a \000 character with TTY_FE error 812 * flags set. So TTY_FE by itself works. 813 */ 814 (*tp->t_linesw->l_rint)(TTY_FE, tp); 815 ttwakeup(tp); 816 wakeup(tp); 817 break; 818 819 default: 820 #ifdef CZ_DEBUG 821 printf("%s: channel %d: Unknown interrupt 0x%x\n", 822 cz->cz_dev.dv_xname, sc->sc_channel, command); 823 #endif 824 break; 825 } 826 } 827 828 return (rval); 829 } 830 831 /* 832 * cz_wait_pci_doorbell: 833 * 834 * Wait for the pci doorbell to be clear - wait for pending 835 * activity to drain. 836 */ 837 static int 838 cz_wait_pci_doorbell(struct cz_softc *cz, const char *wstring) 839 { 840 int error; 841 842 while (CZ_PLX_READ(cz, PLX_PCI_LOCAL_DOORBELL)) { 843 error = tsleep(cz, TTIPRI | PCATCH, wstring, max(1, hz/100)); 844 if ((error != 0) && (error != EWOULDBLOCK)) 845 return (error); 846 } 847 return (0); 848 } 849 850 /***************************************************************************** 851 * Cyclades-Z TTY code starts here... 852 *****************************************************************************/ 853 854 #define CZTTYDIALOUT_MASK 0x80000 855 856 #define CZTTY_DIALOUT(dev) (minor((dev)) & CZTTYDIALOUT_MASK) 857 #define CZTTY_CZ(sc) ((sc)->sc_parent) 858 859 #define CZTTY_SOFTC(dev) cztty_getttysoftc(dev) 860 861 static struct cztty_softc * 862 cztty_getttysoftc(dev_t dev) 863 { 864 int i, j, k = 0, u = minor(dev) & ~CZTTYDIALOUT_MASK; 865 struct cz_softc *cz = NULL; 866 867 for (i = 0, j = 0; i < cz_cd.cd_ndevs; i++) { 868 k = j; 869 cz = device_lookup(&cz_cd, i); 870 if (cz == NULL) 871 continue; 872 if (cz->cz_ports == NULL) 873 continue; 874 j += cz->cz_nchannels; 875 if (j > u) 876 break; 877 } 878 879 if (i >= cz_cd.cd_ndevs) 880 return (NULL); 881 else 882 return (&cz->cz_ports[u - k]); 883 } 884 885 /* 886 * czttytty: 887 * 888 * Return a pointer to our tty. 889 */ 890 static struct tty * 891 czttytty(dev_t dev) 892 { 893 struct cztty_softc *sc = CZTTY_SOFTC(dev); 894 895 #ifdef DIAGNOSTIC 896 if (sc == NULL) 897 panic("czttytty"); 898 #endif 899 900 return (sc->sc_tty); 901 } 902 903 /* 904 * cztty_shutdown: 905 * 906 * Shut down a port. 907 */ 908 static void 909 cztty_shutdown(struct cztty_softc *sc) 910 { 911 struct cz_softc *cz = CZTTY_CZ(sc); 912 struct tty *tp = sc->sc_tty; 913 int s; 914 915 s = spltty(); 916 917 /* Clear any break condition set with TIOCSBRK. */ 918 cztty_break(sc, 0); 919 920 /* 921 * Hang up if necessary. Wait a bit, so the other side has time to 922 * notice even if we immediately open the port again. 923 */ 924 if (ISSET(tp->t_cflag, HUPCL)) { 925 cztty_modem(sc, 0); 926 (void) tsleep(tp, TTIPRI, ttclos, hz); 927 } 928 929 /* Disable the channel. */ 930 cz_wait_pci_doorbell(cz, "czdis"); 931 CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE); 932 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 933 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTL); 934 935 if ((--cz->cz_nopenchan == 0) && (cz->cz_ih == NULL)) { 936 #ifdef CZ_DEBUG 937 printf("%s: Disabling polling\n", cz->cz_dev.dv_xname); 938 #endif 939 callout_stop(&cz->cz_callout); 940 } 941 942 splx(s); 943 } 944 945 /* 946 * czttyopen: 947 * 948 * Open a Cyclades-Z serial port. 949 */ 950 static int 951 czttyopen(dev_t dev, int flags, int mode, struct proc *p) 952 { 953 struct cztty_softc *sc = CZTTY_SOFTC(dev); 954 struct cz_softc *cz; 955 struct tty *tp; 956 int s, error; 957 958 if (sc == NULL) 959 return (ENXIO); 960 961 if (sc->sc_channel == CZTTY_CHANNEL_DEAD) 962 return (ENXIO); 963 964 cz = CZTTY_CZ(sc); 965 tp = sc->sc_tty; 966 967 if (ISSET(tp->t_state, TS_ISOPEN) && 968 ISSET(tp->t_state, TS_XCLUDE) && 969 p->p_ucred->cr_uid != 0) 970 return (EBUSY); 971 972 s = spltty(); 973 974 /* 975 * Do the following iff this is a first open. 976 */ 977 if (!ISSET(tp->t_state, TS_ISOPEN) && (tp->t_wopen == 0)) { 978 struct termios t; 979 980 tp->t_dev = dev; 981 982 /* If we're turning things on, enable interrupts */ 983 if ((cz->cz_nopenchan++ == 0) && (cz->cz_ih == NULL)) { 984 #ifdef CZ_DEBUG 985 printf("%s: Enabling polling.\n", 986 cz->cz_dev.dv_xname); 987 #endif 988 callout_reset(&cz->cz_callout, cz_timeout_ticks, 989 cz_poll, cz); 990 } 991 992 /* 993 * Enable the channel. Don't actually ring the 994 * doorbell here; czttyparam() will do it for us. 995 */ 996 cz_wait_pci_doorbell(cz, "czopen"); 997 998 CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_ENABLE); 999 1000 /* 1001 * Initialize the termios status to the defaults. Add in the 1002 * sticky bits from TIOCSFLAGS. 1003 */ 1004 t.c_ispeed = 0; 1005 t.c_ospeed = TTYDEF_SPEED; 1006 t.c_cflag = TTYDEF_CFLAG; 1007 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 1008 SET(t.c_cflag, CLOCAL); 1009 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 1010 SET(t.c_cflag, CRTSCTS); 1011 1012 /* 1013 * Reset the input and output rings. Do this before 1014 * we call czttyparam(), as that function enables 1015 * the channel. 1016 */ 1017 CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, 1018 CZTTY_BUF_READ(sc, BUFCTL_RX_PUT)); 1019 CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, 1020 CZTTY_BUF_READ(sc, BUFCTL_TX_GET)); 1021 1022 /* Make sure czttyparam() will see changes. */ 1023 tp->t_ospeed = 0; 1024 (void) czttyparam(tp, &t); 1025 tp->t_iflag = TTYDEF_IFLAG; 1026 tp->t_oflag = TTYDEF_OFLAG; 1027 tp->t_lflag = TTYDEF_LFLAG; 1028 ttychars(tp); 1029 ttsetwater(tp); 1030 1031 /* 1032 * Turn on DTR. We must always do this, even if carrier is not 1033 * present, because otherwise we'd have to use TIOCSDTR 1034 * immediately after setting CLOCAL, which applications do not 1035 * expect. We always assert DTR while the device is open 1036 * unless explicitly requested to deassert it. 1037 */ 1038 cztty_modem(sc, 1); 1039 } 1040 1041 splx(s); 1042 1043 error = ttyopen(tp, CZTTY_DIALOUT(dev), ISSET(flags, O_NONBLOCK)); 1044 if (error) 1045 goto bad; 1046 1047 error = (*tp->t_linesw->l_open)(dev, tp); 1048 if (error) 1049 goto bad; 1050 1051 return (0); 1052 1053 bad: 1054 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 1055 /* 1056 * We failed to open the device, and nobody else had it opened. 1057 * Clean up the state as appropriate. 1058 */ 1059 cztty_shutdown(sc); 1060 } 1061 1062 return (error); 1063 } 1064 1065 /* 1066 * czttyclose: 1067 * 1068 * Close a Cyclades-Z serial port. 1069 */ 1070 static int 1071 czttyclose(dev_t dev, int flags, int mode, struct proc *p) 1072 { 1073 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1074 struct tty *tp = sc->sc_tty; 1075 1076 /* XXX This is for cons.c. */ 1077 if (!ISSET(tp->t_state, TS_ISOPEN)) 1078 return (0); 1079 1080 (*tp->t_linesw->l_close)(tp, flags); 1081 ttyclose(tp); 1082 1083 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 1084 /* 1085 * Although we got a last close, the device may still be in 1086 * use; e.g. if this was the dialout node, and there are still 1087 * processes waiting for carrier on the non-dialout node. 1088 */ 1089 cztty_shutdown(sc); 1090 } 1091 1092 return (0); 1093 } 1094 1095 /* 1096 * czttyread: 1097 * 1098 * Read from a Cyclades-Z serial port. 1099 */ 1100 static int 1101 czttyread(dev_t dev, struct uio *uio, int flags) 1102 { 1103 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1104 struct tty *tp = sc->sc_tty; 1105 1106 return ((*tp->t_linesw->l_read)(tp, uio, flags)); 1107 } 1108 1109 /* 1110 * czttywrite: 1111 * 1112 * Write to a Cyclades-Z serial port. 1113 */ 1114 static int 1115 czttywrite(dev_t dev, struct uio *uio, int flags) 1116 { 1117 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1118 struct tty *tp = sc->sc_tty; 1119 1120 return ((*tp->t_linesw->l_write)(tp, uio, flags)); 1121 } 1122 1123 /* 1124 * czttypoll: 1125 * 1126 * Poll a Cyclades-Z serial port. 1127 */ 1128 static int 1129 czttypoll(dev_t dev, int events, struct proc *p) 1130 { 1131 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1132 struct tty *tp = sc->sc_tty; 1133 1134 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1135 } 1136 1137 /* 1138 * czttyioctl: 1139 * 1140 * Perform a control operation on a Cyclades-Z serial port. 1141 */ 1142 static int 1143 czttyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1144 { 1145 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1146 struct tty *tp = sc->sc_tty; 1147 int s, error; 1148 1149 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1150 if (error != EPASSTHROUGH) 1151 return (error); 1152 1153 error = ttioctl(tp, cmd, data, flag, p); 1154 if (error != EPASSTHROUGH) 1155 return (error); 1156 1157 error = 0; 1158 1159 s = spltty(); 1160 1161 switch (cmd) { 1162 case TIOCSBRK: 1163 cztty_break(sc, 1); 1164 break; 1165 1166 case TIOCCBRK: 1167 cztty_break(sc, 0); 1168 break; 1169 1170 case TIOCGFLAGS: 1171 *(int *)data = sc->sc_swflags; 1172 break; 1173 1174 case TIOCSFLAGS: 1175 error = suser(p->p_ucred, &p->p_acflag); 1176 if (error) 1177 break; 1178 sc->sc_swflags = *(int *)data; 1179 break; 1180 1181 case TIOCSDTR: 1182 cztty_modem(sc, 1); 1183 break; 1184 1185 case TIOCCDTR: 1186 cztty_modem(sc, 0); 1187 break; 1188 1189 case TIOCMSET: 1190 case TIOCMBIS: 1191 case TIOCMBIC: 1192 tiocm_to_cztty(sc, cmd, *(int *)data); 1193 break; 1194 1195 case TIOCMGET: 1196 *(int *)data = cztty_to_tiocm(sc); 1197 break; 1198 1199 default: 1200 error = EPASSTHROUGH; 1201 break; 1202 } 1203 1204 splx(s); 1205 1206 return (error); 1207 } 1208 1209 /* 1210 * cztty_break: 1211 * 1212 * Set or clear BREAK on a port. 1213 */ 1214 static void 1215 cztty_break(struct cztty_softc *sc, int onoff) 1216 { 1217 struct cz_softc *cz = CZTTY_CZ(sc); 1218 1219 cz_wait_pci_doorbell(cz, "czbreak"); 1220 1221 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1222 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, 1223 onoff ? C_CM_SET_BREAK : C_CM_CLR_BREAK); 1224 } 1225 1226 /* 1227 * cztty_modem: 1228 * 1229 * Set or clear DTR on a port. 1230 */ 1231 static void 1232 cztty_modem(struct cztty_softc *sc, int onoff) 1233 { 1234 struct cz_softc *cz = CZTTY_CZ(sc); 1235 1236 if (sc->sc_rs_control_dtr == 0) 1237 return; 1238 1239 cz_wait_pci_doorbell(cz, "czmod"); 1240 1241 if (onoff) 1242 sc->sc_chanctl_rs_control |= sc->sc_rs_control_dtr; 1243 else 1244 sc->sc_chanctl_rs_control &= ~sc->sc_rs_control_dtr; 1245 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); 1246 1247 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1248 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); 1249 } 1250 1251 /* 1252 * tiocm_to_cztty: 1253 * 1254 * Process TIOCM* ioctls. 1255 */ 1256 static void 1257 tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits) 1258 { 1259 struct cz_softc *cz = CZTTY_CZ(sc); 1260 u_int32_t czttybits; 1261 1262 czttybits = 0; 1263 if (ISSET(ttybits, TIOCM_DTR)) 1264 SET(czttybits, C_RS_DTR); 1265 if (ISSET(ttybits, TIOCM_RTS)) 1266 SET(czttybits, C_RS_RTS); 1267 1268 cz_wait_pci_doorbell(cz, "cztiocm"); 1269 1270 switch (how) { 1271 case TIOCMBIC: 1272 CLR(sc->sc_chanctl_rs_control, czttybits); 1273 break; 1274 1275 case TIOCMBIS: 1276 SET(sc->sc_chanctl_rs_control, czttybits); 1277 break; 1278 1279 case TIOCMSET: 1280 CLR(sc->sc_chanctl_rs_control, C_RS_DTR | C_RS_RTS); 1281 SET(sc->sc_chanctl_rs_control, czttybits); 1282 break; 1283 } 1284 1285 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); 1286 1287 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1288 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); 1289 } 1290 1291 /* 1292 * cztty_to_tiocm: 1293 * 1294 * Process the TIOCMGET ioctl. 1295 */ 1296 static int 1297 cztty_to_tiocm(struct cztty_softc *sc) 1298 { 1299 struct cz_softc *cz = CZTTY_CZ(sc); 1300 u_int32_t rs_status, op_mode; 1301 int ttybits = 0; 1302 1303 cz_wait_pci_doorbell(cz, "cztty"); 1304 1305 rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS); 1306 op_mode = CZTTY_CHAN_READ(sc, CHNCTL_OP_MODE); 1307 1308 if (ISSET(rs_status, C_RS_RTS)) 1309 SET(ttybits, TIOCM_RTS); 1310 if (ISSET(rs_status, C_RS_CTS)) 1311 SET(ttybits, TIOCM_CTS); 1312 if (ISSET(rs_status, C_RS_DCD)) 1313 SET(ttybits, TIOCM_CAR); 1314 if (ISSET(rs_status, C_RS_DTR)) 1315 SET(ttybits, TIOCM_DTR); 1316 if (ISSET(rs_status, C_RS_RI)) 1317 SET(ttybits, TIOCM_RNG); 1318 if (ISSET(rs_status, C_RS_DSR)) 1319 SET(ttybits, TIOCM_DSR); 1320 1321 if (ISSET(op_mode, C_CH_ENABLE)) 1322 SET(ttybits, TIOCM_LE); 1323 1324 return (ttybits); 1325 } 1326 1327 /* 1328 * czttyparam: 1329 * 1330 * Set Cyclades-Z serial port parameters from termios. 1331 * 1332 * XXX Should just copy the whole termios after making 1333 * XXX sure all the changes could be done. 1334 */ 1335 static int 1336 czttyparam(struct tty *tp, struct termios *t) 1337 { 1338 struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev); 1339 struct cz_softc *cz = CZTTY_CZ(sc); 1340 u_int32_t rs_status; 1341 int ospeed, cflag; 1342 1343 ospeed = t->c_ospeed; 1344 cflag = t->c_cflag; 1345 1346 /* Check requested parameters. */ 1347 if (ospeed < 0) 1348 return (EINVAL); 1349 if (t->c_ispeed && t->c_ispeed != ospeed) 1350 return (EINVAL); 1351 1352 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR)) { 1353 SET(cflag, CLOCAL); 1354 CLR(cflag, HUPCL); 1355 } 1356 1357 /* 1358 * If there were no changes, don't do anything. This avoids dropping 1359 * input and improves performance when all we did was frob things like 1360 * VMIN and VTIME. 1361 */ 1362 if (tp->t_ospeed == ospeed && 1363 tp->t_cflag == cflag) 1364 return (0); 1365 1366 /* Data bits. */ 1367 sc->sc_chanctl_comm_data_l = 0; 1368 switch (t->c_cflag & CSIZE) { 1369 case CS5: 1370 sc->sc_chanctl_comm_data_l |= C_DL_CS5; 1371 break; 1372 1373 case CS6: 1374 sc->sc_chanctl_comm_data_l |= C_DL_CS6; 1375 break; 1376 1377 case CS7: 1378 sc->sc_chanctl_comm_data_l |= C_DL_CS7; 1379 break; 1380 1381 case CS8: 1382 sc->sc_chanctl_comm_data_l |= C_DL_CS8; 1383 break; 1384 } 1385 1386 /* Stop bits. */ 1387 if (t->c_cflag & CSTOPB) { 1388 if ((sc->sc_chanctl_comm_data_l & C_DL_CS) == C_DL_CS5) 1389 sc->sc_chanctl_comm_data_l |= C_DL_15STOP; 1390 else 1391 sc->sc_chanctl_comm_data_l |= C_DL_2STOP; 1392 } else 1393 sc->sc_chanctl_comm_data_l |= C_DL_1STOP; 1394 1395 /* Parity. */ 1396 if (t->c_cflag & PARENB) { 1397 if (t->c_cflag & PARODD) 1398 sc->sc_chanctl_comm_parity = C_PR_ODD; 1399 else 1400 sc->sc_chanctl_comm_parity = C_PR_EVEN; 1401 } else 1402 sc->sc_chanctl_comm_parity = C_PR_NONE; 1403 1404 /* 1405 * Initialize flow control pins depending on the current flow control 1406 * mode. 1407 */ 1408 if (ISSET(t->c_cflag, CRTSCTS)) { 1409 sc->sc_rs_control_dtr = C_RS_DTR; 1410 sc->sc_chanctl_hw_flow = C_RS_CTS | C_RS_RTS; 1411 } else if (ISSET(t->c_cflag, MDMBUF)) { 1412 sc->sc_rs_control_dtr = 0; 1413 sc->sc_chanctl_hw_flow = C_RS_DCD | C_RS_DTR; 1414 } else { 1415 /* 1416 * If no flow control, then always set RTS. This will make 1417 * the other side happy if it mistakenly thinks we're doing 1418 * RTS/CTS flow control. 1419 */ 1420 sc->sc_rs_control_dtr = C_RS_DTR | C_RS_RTS; 1421 sc->sc_chanctl_hw_flow = 0; 1422 if (ISSET(sc->sc_chanctl_rs_control, C_RS_DTR)) 1423 SET(sc->sc_chanctl_rs_control, C_RS_RTS); 1424 else 1425 CLR(sc->sc_chanctl_rs_control, C_RS_RTS); 1426 } 1427 1428 /* Baud rate. */ 1429 sc->sc_chanctl_comm_baud = ospeed; 1430 1431 /* Copy to tty. */ 1432 tp->t_ispeed = 0; 1433 tp->t_ospeed = t->c_ospeed; 1434 tp->t_cflag = t->c_cflag; 1435 1436 /* 1437 * Now load the channel control structure. 1438 */ 1439 1440 cz_wait_pci_doorbell(cz, "czparam"); 1441 1442 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, sc->sc_chanctl_comm_baud); 1443 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, sc->sc_chanctl_comm_data_l); 1444 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, sc->sc_chanctl_comm_parity); 1445 CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, sc->sc_chanctl_hw_flow); 1446 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); 1447 1448 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1449 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLW); 1450 1451 cz_wait_pci_doorbell(cz, "czparam"); 1452 1453 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1454 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); 1455 1456 cz_wait_pci_doorbell(cz, "czparam"); 1457 1458 /* 1459 * Update the tty layer's idea of the carrier bit, in case we changed 1460 * CLOCAL. We don't hang up here; we only do that by explicit 1461 * request. 1462 */ 1463 rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS); 1464 (void) (*tp->t_linesw->l_modem)(tp, ISSET(rs_status, C_RS_DCD)); 1465 1466 return (0); 1467 } 1468 1469 /* 1470 * czttystart: 1471 * 1472 * Start or restart transmission. 1473 */ 1474 static void 1475 czttystart(struct tty *tp) 1476 { 1477 struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev); 1478 int s; 1479 1480 s = spltty(); 1481 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1482 goto out; 1483 1484 if (tp->t_outq.c_cc <= tp->t_lowat) { 1485 if (ISSET(tp->t_state, TS_ASLEEP)) { 1486 CLR(tp->t_state, TS_ASLEEP); 1487 wakeup(&tp->t_outq); 1488 } 1489 selwakeup(&tp->t_wsel); 1490 if (tp->t_outq.c_cc == 0) 1491 goto out; 1492 } 1493 1494 cztty_transmit(sc, tp); 1495 out: 1496 splx(s); 1497 } 1498 1499 /* 1500 * czttystop: 1501 * 1502 * Stop output, e.g., for ^S or output flush. 1503 */ 1504 static void 1505 czttystop(struct tty *tp, int flag) 1506 { 1507 1508 /* 1509 * XXX We don't do anything here, yet. Mostly, I don't know 1510 * XXX exactly how this should be implemented on this device. 1511 * XXX We've given a big chunk of data to the MIPS already, 1512 * XXX and I don't know how we request the MIPS to stop sending 1513 * XXX the data. So, punt for now. --thorpej 1514 */ 1515 } 1516 1517 /* 1518 * cztty_diag: 1519 * 1520 * Issue a scheduled diagnostic message. 1521 */ 1522 static void 1523 cztty_diag(void *arg) 1524 { 1525 struct cztty_softc *sc = arg; 1526 struct cz_softc *cz = CZTTY_CZ(sc); 1527 u_int overflows, parity_errors, framing_errors; 1528 int s; 1529 1530 s = spltty(); 1531 1532 overflows = sc->sc_overflows; 1533 sc->sc_overflows = 0; 1534 1535 parity_errors = sc->sc_parity_errors; 1536 sc->sc_parity_errors = 0; 1537 1538 framing_errors = sc->sc_framing_errors; 1539 sc->sc_framing_errors = 0; 1540 1541 sc->sc_errors = 0; 1542 1543 splx(s); 1544 1545 log(LOG_WARNING, 1546 "%s: channel %d: %u overflow%s, %u parity, %u framing error%s\n", 1547 cz->cz_dev.dv_xname, sc->sc_channel, 1548 overflows, overflows == 1 ? "" : "s", 1549 parity_errors, 1550 framing_errors, framing_errors == 1 ? "" : "s"); 1551 } 1552 1553 const struct cdevsw cz_cdevsw = { 1554 czttyopen, czttyclose, czttyread, czttywrite, czttyioctl, 1555 czttystop, czttytty, czttypoll, nommap, ttykqfilter, D_TTY 1556 }; 1557 1558 /* 1559 * tx and rx ring buffer size macros: 1560 * 1561 * The transmitter and receiver both use ring buffers. For each one, there 1562 * is a get (consumer) and a put (producer) offset. The get value is the 1563 * next byte to be read from the ring, and the put is the next one to be 1564 * put into the ring. get == put means the ring is empty. 1565 * 1566 * For each ring, the firmware controls one of (get, put) and this driver 1567 * controls the other. For transmission, this driver updates put to point 1568 * past the valid data, and the firmware moves get as bytes are sent. Likewise 1569 * for receive, the driver controls put, and this driver controls get. 1570 */ 1571 #define TX_MOVEABLE(g, p, s) (((g) > (p)) ? ((g) - (p) - 1) : ((s) - (p))) 1572 #define RX_MOVEABLE(g, p, s) (((g) > (p)) ? ((s) - (g)) : ((p) - (g))) 1573 1574 /* 1575 * cztty_transmit() 1576 * 1577 * Look at the tty for this port and start sending. 1578 */ 1579 static int 1580 cztty_transmit(struct cztty_softc *sc, struct tty *tp) 1581 { 1582 struct cz_softc *cz = CZTTY_CZ(sc); 1583 u_int move, get, put, size, address; 1584 #ifdef HOSTRAMCODE 1585 int error, done = 0; 1586 #else 1587 int done = 0; 1588 #endif 1589 1590 size = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFSIZE); 1591 get = CZTTY_BUF_READ(sc, BUFCTL_TX_GET); 1592 put = CZTTY_BUF_READ(sc, BUFCTL_TX_PUT); 1593 address = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFADDR); 1594 1595 while ((tp->t_outq.c_cc > 0) && ((move = TX_MOVEABLE(get, put, size)))){ 1596 #ifdef HOSTRAMCODE 1597 if (0) { 1598 move = min(tp->t_outq.c_cc, move); 1599 error = q_to_b(&tp->t_outq, 0, move); 1600 if (error != move) { 1601 printf("%s: channel %d: error moving to " 1602 "transmit buf\n", cz->cz_dev.dv_xname, 1603 sc->sc_channel); 1604 move = error; 1605 } 1606 } else { 1607 #endif 1608 move = min(ndqb(&tp->t_outq, 0), move); 1609 bus_space_write_region_1(cz->cz_win_st, cz->cz_win_sh, 1610 address + put, tp->t_outq.c_cf, move); 1611 ndflush(&tp->t_outq, move); 1612 #ifdef HOSTRAMCODE 1613 } 1614 #endif 1615 1616 put = ((put + move) % size); 1617 done = 1; 1618 } 1619 if (done) { 1620 CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, put); 1621 } 1622 return (done); 1623 } 1624 1625 static int 1626 cztty_receive(struct cztty_softc *sc, struct tty *tp) 1627 { 1628 struct cz_softc *cz = CZTTY_CZ(sc); 1629 u_int get, put, size, address; 1630 int done = 0, ch; 1631 1632 size = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFSIZE); 1633 get = CZTTY_BUF_READ(sc, BUFCTL_RX_GET); 1634 put = CZTTY_BUF_READ(sc, BUFCTL_RX_PUT); 1635 address = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFADDR); 1636 1637 while ((get != put) && ((tp->t_canq.c_cc + tp->t_rawq.c_cc) < tp->t_hiwat)) { 1638 #ifdef HOSTRAMCODE 1639 if (hostram) 1640 ch = ((char *)fifoaddr)[get]; 1641 } else { 1642 #endif 1643 ch = bus_space_read_1(cz->cz_win_st, cz->cz_win_sh, 1644 address + get); 1645 #ifdef HOSTRAMCODE 1646 } 1647 #endif 1648 (*tp->t_linesw->l_rint)(ch, tp); 1649 get = (get + 1) % size; 1650 done = 1; 1651 } 1652 if (done) { 1653 CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, get); 1654 } 1655 return (done); 1656 } 1657