1 /* $NetBSD: cyberreg.h,v 1.2 2005/12/11 12:22:49 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frederick S. Bruckman. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * These cards have various combinations of serial and parallel ports. All 41 * varieties have up to 6 1-bit registers for extended capabilities, named 42 * "Usr0, ..., Usr5". The functional registers are mapped to the proper 43 * "Usr" register at attachment time. The only functional registers the 44 * kernel currently deals with are the registers to enable or disable the 45 * alternate clock, which permits speeds of the serial port all the way to 46 * 960Kbps. (In the documentation, those registers are called "Clks0" and 47 * "Clks1" on the "10x" series, and * "K0" and "K1" on the 20x series.) 48 */ 49 50 #ifndef _PCI_CYBERREG_H_ 51 #define _PCI_CYBERREG_H_ 52 53 /* The "10x" series cards have 4 1-bit registers, spaced 3 bits apart. */ 54 #define SIIG10x_USR_BASE 0x50 55 #define SIIG10x_USR0_MASK (1 << 2 << 16) 56 #define SIIG10x_USR1_MASK (1 << 5 << 16) 57 #define SIIG10x_USR2_MASK (1 << 8 << 16) 58 #define SIIG10x_USR3_MASK (1 << 11 << 16) 59 60 /* The "20x" series cards have 6 1-bit registers, spaced 32 bits apart. */ 61 #define SIIG20x_USR0 0x6c 62 #define SIIG20x_USR1 0x70 63 #define SIIG20x_USR2 0x74 64 #define SIIG20x_USR3 0x78 65 #define SIIG20x_USR4 0x7c 66 #define SIIG20x_USR5 0x80 67 #define SIIG20x_USR_MASK (1 << 28) 68 69 #endif /* !_PCI_CYBERREG_H_ */ 70