xref: /netbsd-src/sys/dev/pci/cyber.c (revision ce099b40997c43048fb78bd578195f81d2456523)
1*ce099b40Smartin /*	$NetBSD: cyber.c,v 1.5 2008/04/28 20:23:54 martin Exp $	*/
20dcb02ecSfredb 
30dcb02ecSfredb /*-
40dcb02ecSfredb  * Copyright (c) 2004 The NetBSD Foundation, Inc.
50dcb02ecSfredb  * All rights reserved.
60dcb02ecSfredb  *
70dcb02ecSfredb  * This code is derived from software contributed to The NetBSD Foundation
80dcb02ecSfredb  * by Frederick S. Bruckman.
90dcb02ecSfredb  *
100dcb02ecSfredb  * Redistribution and use in source and binary forms, with or without
110dcb02ecSfredb  * modification, are permitted provided that the following conditions
120dcb02ecSfredb  * are met:
130dcb02ecSfredb  * 1. Redistributions of source code must retain the above copyright
140dcb02ecSfredb  *    notice, this list of conditions and the following disclaimer.
150dcb02ecSfredb  * 2. Redistributions in binary form must reproduce the above copyright
160dcb02ecSfredb  *    notice, this list of conditions and the following disclaimer in the
170dcb02ecSfredb  *    documentation and/or other materials provided with the distribution.
180dcb02ecSfredb  *
190dcb02ecSfredb  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
200dcb02ecSfredb  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
210dcb02ecSfredb  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
220dcb02ecSfredb  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
230dcb02ecSfredb  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
240dcb02ecSfredb  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
250dcb02ecSfredb  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
260dcb02ecSfredb  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
270dcb02ecSfredb  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
280dcb02ecSfredb  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
290dcb02ecSfredb  * POSSIBILITY OF SUCH DAMAGE.
300dcb02ecSfredb  */
310dcb02ecSfredb 
320dcb02ecSfredb /* Store one "Usr" register on an SIIG Cyberserial multiport PCI card. */
330dcb02ecSfredb 
340dcb02ecSfredb #include <sys/cdefs.h>
35*ce099b40Smartin __KERNEL_RCSID(0, "$NetBSD: cyber.c,v 1.5 2008/04/28 20:23:54 martin Exp $");
360dcb02ecSfredb 
370dcb02ecSfredb #include <sys/param.h>
380dcb02ecSfredb #include <sys/device.h>
390dcb02ecSfredb #include <sys/termios.h> /* XXX for tcflag_t in comvar.h */
400dcb02ecSfredb 
41a2a38285Sad #include <sys/bus.h>
420dcb02ecSfredb 
430dcb02ecSfredb #include <dev/pci/cyberreg.h>
440dcb02ecSfredb #include <dev/pci/cybervar.h>
450dcb02ecSfredb 
460dcb02ecSfredb void
write_siig10x_usrreg(pci_chipset_tag_t pc,pcitag_t tag,int usrregno,int high_speed)470dcb02ecSfredb write_siig10x_usrreg(pci_chipset_tag_t pc, pcitag_t tag, int usrregno,
480dcb02ecSfredb     int high_speed)
490dcb02ecSfredb {
5046484954Sfredb 	pcireg_t curregs, newregs;
510dcb02ecSfredb 
520dcb02ecSfredb 	newregs = curregs = pci_conf_read(pc, tag, SIIG10x_USR_BASE);
530dcb02ecSfredb 
540dcb02ecSfredb 	if (high_speed)					/* Clear bit. */
550dcb02ecSfredb 		switch (usrregno) {
560dcb02ecSfredb 		case 0:
570dcb02ecSfredb 			newregs &= ~SIIG10x_USR0_MASK;
580dcb02ecSfredb 			break;
590dcb02ecSfredb 		case 1:
600dcb02ecSfredb 			newregs &= ~SIIG10x_USR1_MASK;
610dcb02ecSfredb 			break;
620dcb02ecSfredb 		case 2:
630dcb02ecSfredb 			newregs &= ~SIIG10x_USR2_MASK;
640dcb02ecSfredb 			break;
650dcb02ecSfredb 		case 3:
660dcb02ecSfredb 			newregs &= ~SIIG10x_USR3_MASK;
670dcb02ecSfredb 		}
680dcb02ecSfredb 	else /* if (!high_speed) */			/* Set bit. */
690dcb02ecSfredb 		switch (usrregno) {
700dcb02ecSfredb 		case 0:
710dcb02ecSfredb 			newregs |= SIIG10x_USR0_MASK;
720dcb02ecSfredb 			break;
730dcb02ecSfredb 		case 1:
740dcb02ecSfredb 			newregs |= SIIG10x_USR1_MASK;
750dcb02ecSfredb 			break;
760dcb02ecSfredb 		case 2:
770dcb02ecSfredb 			newregs |= SIIG10x_USR2_MASK;
780dcb02ecSfredb 			break;
790dcb02ecSfredb 		case 3:
800dcb02ecSfredb 			newregs |= SIIG10x_USR3_MASK;
810dcb02ecSfredb 		}
820dcb02ecSfredb 
830dcb02ecSfredb 	if (newregs != curregs)
840dcb02ecSfredb 		pci_conf_write(pc, tag, SIIG10x_USR_BASE, newregs);
850dcb02ecSfredb }
860dcb02ecSfredb 
870dcb02ecSfredb void
write_siig20x_usrreg(pci_chipset_tag_t pc,pcitag_t tag,int usrregno,int high_speed)880dcb02ecSfredb write_siig20x_usrreg(pci_chipset_tag_t pc, pcitag_t tag, int usrregno,
890dcb02ecSfredb     int high_speed)
900dcb02ecSfredb {
9146484954Sfredb 	pcireg_t curreg, newreg;
920dcb02ecSfredb 	int offset;
930dcb02ecSfredb 
940dcb02ecSfredb 	switch (usrregno) {
950dcb02ecSfredb 		case 0:
960dcb02ecSfredb 			offset = SIIG20x_USR0;
970dcb02ecSfredb 			break;
980dcb02ecSfredb 		case 1:
990dcb02ecSfredb 			offset = SIIG20x_USR1;
1000dcb02ecSfredb 			break;
1010dcb02ecSfredb 		default:
1020dcb02ecSfredb 			return;
1030dcb02ecSfredb 	}
1040dcb02ecSfredb 
1050dcb02ecSfredb 	newreg = curreg = pci_conf_read(pc, tag, offset);
1060dcb02ecSfredb 
1070dcb02ecSfredb 	if (high_speed)					/* Clear bit. */
1080dcb02ecSfredb 		newreg &= ~SIIG20x_USR_MASK;
1090dcb02ecSfredb 	else /* if (!high_speed) */			/* Set bit. */
1100dcb02ecSfredb 		newreg |= SIIG20x_USR_MASK;
1110dcb02ecSfredb 
1120dcb02ecSfredb 	if (newreg != curreg)
1130dcb02ecSfredb 		pci_conf_write(pc, tag, offset, newreg);
1140dcb02ecSfredb }
115