1 /* $NetBSD: cmpcivar.h,v 1.2 2001/02/12 18:47:12 tshiozak Exp $ */ 2 3 /* 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Takuya SHIOZAKI <tshiozak@netbsd.org> . 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 */ 32 33 /* C-Media CMI8x38 Audio Chip Support */ 34 35 #ifndef _DEV_PCI_CMPCIVAR_H_ 36 #define _DEV_PCI_CMPCIVAR_H_ (1) 37 38 39 /* 40 * DMA pool 41 */ 42 struct cmpci_dmanode { 43 bus_dma_tag_t cd_tag; 44 int cd_nsegs; 45 bus_dma_segment_t cd_segs[1]; 46 bus_dmamap_t cd_map; 47 caddr_t cd_addr; 48 size_t cd_size; 49 struct cmpci_dmanode *cd_next; 50 }; 51 52 typedef struct cmpci_dmanode *cmpci_dmapool_t; 53 #define KVADDR(dma) ((void *)(dma)->cd_addr) 54 #define DMAADDR(dma) ((dma)->cd_map->dm_segs[0].ds_addr) 55 56 57 /* 58 * Mixer - SoundBraster16 Compatible 59 */ 60 #define CMPCI_MASTER_VOL 0 61 #define CMPCI_FM_VOL 1 62 #define CMPCI_CD_VOL 2 63 #define CMPCI_VOICE_VOL 3 64 #define CMPCI_OUTPUT_CLASS 4 65 66 #define CMPCI_MIC_VOL 5 67 #define CMPCI_LINE_IN_VOL 6 68 #define CMPCI_RECORD_SOURCE 7 69 #define CMPCI_TREBLE 8 70 #define CMPCI_BASS 9 71 #define CMPCI_RECORD_CLASS 10 72 #define CMPCI_INPUT_CLASS 11 73 74 #define CMPCI_PCSPEAKER 12 75 #define CMPCI_INPUT_GAIN 13 76 #define CMPCI_OUTPUT_GAIN 14 77 #define CMPCI_AGC 15 78 #define CMPCI_EQUALIZATION_CLASS 16 79 80 #define CMPCI_CD_IN_MUTE 17 81 #define CMPCI_MIC_IN_MUTE 18 82 #define CMPCI_LINE_IN_MUTE 19 83 #define CMPCI_FM_IN_MUTE 20 84 85 #define CMPCI_CD_SWAP 21 86 #define CMPCI_MIC_SWAP 22 87 #define CMPCI_LINE_SWAP 23 88 #define CMPCI_FM_SWAP 24 89 90 #define CMPCI_CD_OUT_MUTE 25 91 #define CMPCI_MIC_OUT_MUTE 26 92 #define CMPCI_LINE_OUT_MUTE 27 93 94 #define CMPCI_SPDIF_IN_MUTE 28 95 #define CMPCI_SPDIF_CLASS 29 96 #define CMPCI_SPDIF_LOOP 30 97 #define CMPCI_SPDIF_LEGACY 31 98 #define CMPCI_SPDIF_OUT_VOLTAGE 32 99 #define CMPCI_SPDIF_IN_PHASE 33 100 #define CMPCI_REAR 34 101 #define CMPCI_INDIVIDUAL 35 102 #define CMPCI_REVERSE 36 103 #define CMPCI_SURROUND 37 104 #define CmpciNspdif "spdif" 105 #define CmpciCspdif "spdif" 106 #define CmpciNloop "loop" 107 #define CmpciNlegacy "legacy" 108 #define CmpciNout_voltage "out_voltage" 109 #define CmpciNin_phase "in_phase" 110 #define CmpciNpositive "positive" 111 #define CmpciNnegative "negative" 112 #define CmpciNrear "rear" 113 #define CmpciNindividual "individual" 114 #define CmpciNreverse "reverse" 115 #define CmpciNlow_v "0.5V" 116 #define CmpciNhigh_v "5V" 117 #define CmpciNsurround "surround" 118 #define CMPCI_NDEVS 38 119 120 #define CMPCI_IS_IN_MUTE(x) ((x) < CMPCI_CD_SWAP) 121 122 123 /* 124 * softc 125 */ 126 struct cmpci_softc { 127 struct device sc_dev; 128 129 /* model/rev */ 130 uint32_t sc_id; 131 uint32_t sc_class; 132 uint32_t sc_capable; 133 #define CMPCI_CAP_SPDIN 0x00000001 134 #define CMPCI_CAP_SPDOUT 0x00000002 135 #define CMPCI_CAP_SPDLOOP 0x00000004 136 #define CMPCI_CAP_SPDLEGACY 0x00000008 137 #define CMPCI_CAP_SPDIN_MONITOR 0x00000010 138 #define CMPCI_CAP_XSPDOUT 0x00000020 139 #define CMPCI_CAP_SPDOUT_VOLTAGE 0x00000040 140 #define CMPCI_CAP_SPDOUT_48K 0x00000080 141 #define CMPCI_CAP_SURROUND 0x00000100 142 #define CMPCI_CAP_REAR 0x00000200 143 #define CMPCI_CAP_INDIVIDUAL_REAR 0x00000400 144 #define CMPCI_CAP_REVERSE_FR 0x00000800 145 #define CMPCI_CAP_SPDIN_PHASE 0x00001000 146 147 #define CMPCI_CAP_CMI8338 (CMPCI_CAP_SPDIN | CMPCI_CAP_SPDOUT | \ 148 CMPCI_CAP_SPDLOOP | CMPCI_CAP_SPDLEGACY) 149 150 #define CMPCI_CAP_CMI8738 (CMPCI_CAP_CMI8338 | \ 151 CMPCI_CAP_SPDIN_MONITOR | \ 152 CMPCI_CAP_XSPDOUT | \ 153 CMPCI_CAP_SPDOUT_VOLTAGE | \ 154 CMPCI_CAP_SPDOUT_48K | CMPCI_CAP_SURROUND |\ 155 CMPCI_CAP_REAR | \ 156 CMPCI_CAP_INDIVIDUAL_REAR | \ 157 CMPCI_CAP_REVERSE_FR | \ 158 CMPCI_CAP_SPDIN_PHASE) 159 #define CMPCI_ISCAP(sc, name) (sc->sc_capable & CMPCI_CAP_ ## name) 160 161 /* I/O Base device */ 162 bus_space_tag_t sc_iot; 163 bus_space_handle_t sc_ioh; 164 165 /* intr handle */ 166 pci_intr_handle_t *sc_ih; 167 168 /* DMA */ 169 bus_dma_tag_t sc_dmat; 170 cmpci_dmapool_t sc_dmap; 171 172 /* each channel */ 173 struct { 174 void (*intr) __P((void *)); 175 void *intr_arg; 176 int md_divide; 177 } sc_play, sc_rec; 178 179 /* mixer */ 180 uint8_t sc_gain[CMPCI_NDEVS][2]; 181 #define CMPCI_LEFT 0 182 #define CMPCI_RIGHT 1 183 #define CMPCI_LR 0 184 uint16_t sc_in_mask; 185 }; 186 187 188 #endif /* _DEV_PCI_CMPCIVAR_H_ */ 189 190 /* end of file */ 191