xref: /netbsd-src/sys/dev/pci/cmpci.c (revision ba65fde2d7fefa7d39838fa5fa855e62bd606b5e)
1 /*	$NetBSD: cmpci.c,v 1.46 2012/10/27 17:18:28 chs Exp $	*/
2 
3 /*
4  * Copyright (c) 2000, 2001, 2008 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Takuya SHIOZAKI <tshiozak@NetBSD.org> .
9  *
10  * This code is derived from software contributed to The NetBSD Foundation
11  * by ITOH Yasufumi.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  */
35 
36 /*
37  * C-Media CMI8x38 Audio Chip Support.
38  *
39  * TODO:
40  *   - 4ch / 6ch support.
41  *   - Joystick support.
42  *
43  */
44 
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.46 2012/10/27 17:18:28 chs Exp $");
47 
48 #if defined(AUDIO_DEBUG) || defined(DEBUG)
49 #define DPRINTF(x) if (cmpcidebug) printf x
50 int cmpcidebug = 0;
51 #else
52 #define DPRINTF(x)
53 #endif
54 
55 #include "mpu.h"
56 
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/kmem.h>
61 #include <sys/device.h>
62 #include <sys/proc.h>
63 
64 #include <dev/pci/pcidevs.h>
65 #include <dev/pci/pcivar.h>
66 
67 #include <sys/audioio.h>
68 #include <dev/audio_if.h>
69 #include <dev/midi_if.h>
70 
71 #include <dev/mulaw.h>
72 #include <dev/auconv.h>
73 #include <dev/pci/cmpcireg.h>
74 #include <dev/pci/cmpcivar.h>
75 
76 #include <dev/ic/mpuvar.h>
77 #include <sys/bus.h>
78 #include <sys/intr.h>
79 
80 /*
81  * Low-level HW interface
82  */
83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
84 static inline void cmpci_mixerreg_write(struct cmpci_softc *,
85 	uint8_t, uint8_t);
86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
87 	unsigned, unsigned);
88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
89 	uint32_t, uint32_t);
90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
96 static int cmpci_rate_to_index(int);
97 static inline int cmpci_index_to_rate(int);
98 static inline int cmpci_index_to_divider(int);
99 
100 static int cmpci_adjust(int, int);
101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
102 static void cmpci_set_out_ports(struct cmpci_softc *);
103 static int cmpci_set_in_ports(struct cmpci_softc *);
104 
105 
106 /*
107  * autoconf interface
108  */
109 static int cmpci_match(device_t, cfdata_t, void *);
110 static void cmpci_attach(device_t, device_t, void *);
111 
112 CFATTACH_DECL_NEW(cmpci, sizeof (struct cmpci_softc),
113     cmpci_match, cmpci_attach, NULL, NULL);
114 
115 /* interrupt */
116 static int cmpci_intr(void *);
117 
118 
119 /*
120  * DMA stuffs
121  */
122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t, void **);
123 static int cmpci_free_dmamem(struct cmpci_softc *, void *, size_t);
124 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
125 	void *);
126 
127 
128 /*
129  * interface to machine independent layer
130  */
131 static int cmpci_query_encoding(void *, struct audio_encoding *);
132 static int cmpci_set_params(void *, int, int, audio_params_t *,
133 	audio_params_t *, stream_filter_list_t *, stream_filter_list_t *);
134 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
135 static int cmpci_halt_output(void *);
136 static int cmpci_halt_input(void *);
137 static int cmpci_getdev(void *, struct audio_device *);
138 static int cmpci_set_port(void *, mixer_ctrl_t *);
139 static int cmpci_get_port(void *, mixer_ctrl_t *);
140 static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
141 static void *cmpci_allocm(void *, int, size_t);
142 static void cmpci_freem(void *, void *, size_t);
143 static size_t cmpci_round_buffersize(void *, int, size_t);
144 static paddr_t cmpci_mappage(void *, void *, off_t, int);
145 static int cmpci_get_props(void *);
146 static int cmpci_trigger_output(void *, void *, void *, int,
147 	void (*)(void *), void *, const audio_params_t *);
148 static int cmpci_trigger_input(void *, void *, void *, int,
149 	void (*)(void *), void *, const audio_params_t *);
150 static void cmpci_get_locks(void *, kmutex_t **, kmutex_t **);
151 
152 static const struct audio_hw_if cmpci_hw_if = {
153 	NULL,			/* open */
154 	NULL,			/* close */
155 	NULL,			/* drain */
156 	cmpci_query_encoding,	/* query_encoding */
157 	cmpci_set_params,	/* set_params */
158 	cmpci_round_blocksize,	/* round_blocksize */
159 	NULL,			/* commit_settings */
160 	NULL,			/* init_output */
161 	NULL,			/* init_input */
162 	NULL,			/* start_output */
163 	NULL,			/* start_input */
164 	cmpci_halt_output,	/* halt_output */
165 	cmpci_halt_input,	/* halt_input */
166 	NULL,			/* speaker_ctl */
167 	cmpci_getdev,		/* getdev */
168 	NULL,			/* setfd */
169 	cmpci_set_port,		/* set_port */
170 	cmpci_get_port,		/* get_port */
171 	cmpci_query_devinfo,	/* query_devinfo */
172 	cmpci_allocm,		/* allocm */
173 	cmpci_freem,		/* freem */
174 	cmpci_round_buffersize,/* round_buffersize */
175 	cmpci_mappage,		/* mappage */
176 	cmpci_get_props,	/* get_props */
177 	cmpci_trigger_output,	/* trigger_output */
178 	cmpci_trigger_input,	/* trigger_input */
179 	NULL,			/* dev_ioctl */
180 	cmpci_get_locks,	/* get_locks */
181 };
182 
183 #define CMPCI_NFORMATS	4
184 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
185 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
186 	 2, AUFMT_STEREO, 0, {5512, 48000}},
187 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
188 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
189 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
190 	 2, AUFMT_STEREO, 0, {5512, 48000}},
191 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
192 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
193 };
194 
195 
196 /*
197  * Low-level HW interface
198  */
199 
200 /* mixer register read/write */
201 static inline uint8_t
202 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
203 {
204 	uint8_t ret;
205 
206 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
207 	delay(10);
208 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
209 	delay(10);
210 	return ret;
211 }
212 
213 static inline void
214 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
215 {
216 
217 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
218 	delay(10);
219 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
220 	delay(10);
221 }
222 
223 
224 /* register partial write */
225 static inline void
226 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
227 			  unsigned mask, unsigned val)
228 {
229 
230 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
231 	    (val<<shift) |
232 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
233 	delay(10);
234 }
235 
236 static inline void
237 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
238 			  uint32_t mask, uint32_t val)
239 {
240 
241 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
242 	    (val<<shift) |
243 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
244 	delay(10);
245 }
246 
247 /* register set/clear bit */
248 static inline void
249 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
250 {
251 
252 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
253 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
254 	delay(10);
255 }
256 
257 static inline void
258 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
259 {
260 
261 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
262 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
263 	delay(10);
264 }
265 
266 static inline void
267 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
268 {
269 
270 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
271 	KDASSERT(no != CMPCI_REG_MISC);
272 
273 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
274 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
275 	delay(10);
276 }
277 
278 static inline void
279 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
280 {
281 
282 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
283 	KDASSERT(no != CMPCI_REG_MISC);
284 
285 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
286 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
287 	delay(10);
288 }
289 
290 /*
291  * The CMPCI_REG_MISC register needs special handling, since one of
292  * its bits has different read/write values.
293  */
294 static inline void
295 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
296 {
297 
298 	sc->sc_reg_misc |= mask;
299 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
300 	    sc->sc_reg_misc);
301 	delay(10);
302 }
303 
304 static inline void
305 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
306 {
307 
308 	sc->sc_reg_misc &= ~mask;
309 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
310 	    sc->sc_reg_misc);
311 	delay(10);
312 }
313 
314 /* rate */
315 static const struct {
316 	int rate;
317 	int divider;
318 } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
319 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
320 	_RATE(5512),
321 	_RATE(8000),
322 	_RATE(11025),
323 	_RATE(16000),
324 	_RATE(22050),
325 	_RATE(32000),
326 	_RATE(44100),
327 	_RATE(48000)
328 #undef	_RATE
329 };
330 
331 static int
332 cmpci_rate_to_index(int rate)
333 {
334 	int i;
335 
336 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
337 		if (rate <=
338 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
339 			return i;
340 	return i;  /* 48000 */
341 }
342 
343 static inline int
344 cmpci_index_to_rate(int index)
345 {
346 
347 	return cmpci_rate_table[index].rate;
348 }
349 
350 static inline int
351 cmpci_index_to_divider(int index)
352 {
353 
354 	return cmpci_rate_table[index].divider;
355 }
356 
357 /*
358  * interface to configure the device.
359  */
360 static int
361 cmpci_match(device_t parent, cfdata_t match, void *aux)
362 {
363 	struct pci_attach_args *pa;
364 
365 	pa = (struct pci_attach_args *)aux;
366 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
367 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
368 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
369 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
370 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
371 		return 1;
372 
373 	return 0;
374 }
375 
376 static void
377 cmpci_attach(device_t parent, device_t self, void *aux)
378 {
379 	struct cmpci_softc *sc;
380 	struct pci_attach_args *pa;
381 	struct audio_attach_args aa;
382 	pci_intr_handle_t ih;
383 	char const *strintr;
384 	int i, v;
385 
386 	sc = device_private(self);
387 	sc->sc_dev = self;
388 	pa = (struct pci_attach_args *)aux;
389 
390 	sc->sc_id = pa->pa_id;
391 	sc->sc_class = pa->pa_class;
392 	pci_aprint_devinfo(pa, "Audio controller");
393 	switch (PCI_PRODUCT(sc->sc_id)) {
394 	case PCI_PRODUCT_CMEDIA_CMI8338A:
395 		/*FALLTHROUGH*/
396 	case PCI_PRODUCT_CMEDIA_CMI8338B:
397 		sc->sc_capable = CMPCI_CAP_CMI8338;
398 		break;
399 	case PCI_PRODUCT_CMEDIA_CMI8738:
400 		/*FALLTHROUGH*/
401 	case PCI_PRODUCT_CMEDIA_CMI8738B:
402 		sc->sc_capable = CMPCI_CAP_CMI8738;
403 		break;
404 	}
405 
406 	/* map I/O space */
407 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
408 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
409 		aprint_error_dev(sc->sc_dev, "failed to map I/O space\n");
410 		return;
411 	}
412 
413 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
414 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
415 
416 	/* interrupt */
417 	if (pci_intr_map(pa, &ih)) {
418 		aprint_error_dev(sc->sc_dev, "failed to map interrupt\n");
419 		return;
420 	}
421 	strintr = pci_intr_string(pa->pa_pc, ih);
422 	sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr,
423 	    sc);
424 	if (sc->sc_ih == NULL) {
425 		aprint_error_dev(sc->sc_dev, "failed to establish interrupt");
426 		if (strintr != NULL)
427 			aprint_error(" at %s", strintr);
428 		aprint_error("\n");
429 		mutex_destroy(&sc->sc_lock);
430 		mutex_destroy(&sc->sc_intr_lock);
431 		return;
432 	}
433 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", strintr);
434 
435 	sc->sc_dmat = pa->pa_dmat;
436 
437 	audio_attach_mi(&cmpci_hw_if, sc, sc->sc_dev);
438 
439 	/* attach OPL device */
440 	aa.type = AUDIODEV_TYPE_OPL;
441 	aa.hwif = NULL;
442 	aa.hdl = NULL;
443 	(void)config_found(sc->sc_dev, &aa, audioprint);
444 
445 	/* attach MPU-401 device */
446 	aa.type = AUDIODEV_TYPE_MPU;
447 	aa.hwif = NULL;
448 	aa.hdl = NULL;
449 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
450 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
451 		sc->sc_mpudev = config_found(sc->sc_dev, &aa, audioprint);
452 
453 	/* get initial value (this is 0 and may be omitted but just in case) */
454 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
455 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
456 
457 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
458 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
459 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
460 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
461 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
462 	for (i = 0; i < CMPCI_NDEVS; i++) {
463 		switch(i) {
464 		/*
465 		 * CMI8738 defaults are
466 		 *  master:	0xe0	(0x00 - 0xf8)
467 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
468 		 *  PC speaker:	0x80	(0x00 - 0xc0)
469 		 *  others:	0
470 		 */
471 		/* volume */
472 		case CMPCI_MASTER_VOL:
473 			v = 128;	/* 224 */
474 			break;
475 		case CMPCI_FM_VOL:
476 		case CMPCI_DAC_VOL:
477 			v = 192;
478 			break;
479 		case CMPCI_PCSPEAKER:
480 			v = 128;
481 			break;
482 
483 		/* booleans, set to true */
484 		case CMPCI_CD_MUTE:
485 		case CMPCI_MIC_MUTE:
486 		case CMPCI_LINE_IN_MUTE:
487 		case CMPCI_AUX_IN_MUTE:
488 			v = 1;
489 			break;
490 
491 		/* volume with inital value 0 */
492 		case CMPCI_CD_VOL:
493 		case CMPCI_LINE_IN_VOL:
494 		case CMPCI_AUX_IN_VOL:
495 		case CMPCI_MIC_VOL:
496 		case CMPCI_MIC_RECVOL:
497 			/* FALLTHROUGH */
498 
499 		/* others are cleared */
500 		case CMPCI_MIC_PREAMP:
501 		case CMPCI_RECORD_SOURCE:
502 		case CMPCI_PLAYBACK_MODE:
503 		case CMPCI_SPDIF_IN_SELECT:
504 		case CMPCI_SPDIF_IN_PHASE:
505 		case CMPCI_SPDIF_LOOP:
506 		case CMPCI_SPDIF_OUT_PLAYBACK:
507 		case CMPCI_SPDIF_OUT_VOLTAGE:
508 		case CMPCI_MONITOR_DAC:
509 		case CMPCI_REAR:
510 		case CMPCI_INDIVIDUAL:
511 		case CMPCI_REVERSE:
512 		case CMPCI_SURROUND:
513 		default:
514 			v = 0;
515 			break;
516 		}
517 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
518 		cmpci_set_mixer_gain(sc, i);
519 	}
520 }
521 
522 static int
523 cmpci_intr(void *handle)
524 {
525 	struct cmpci_softc *sc = handle;
526 #if NMPU > 0
527 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
528 #endif
529 	uint32_t intrstat;
530 
531 	mutex_spin_enter(&sc->sc_intr_lock);
532 
533 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
534 	    CMPCI_REG_INTR_STATUS);
535 
536 	if (!(intrstat & CMPCI_REG_ANY_INTR)) {
537 		mutex_spin_exit(&sc->sc_intr_lock);
538 		return 0;
539 	}
540 
541 	delay(10);
542 
543 	/* disable and reset intr */
544 	if (intrstat & CMPCI_REG_CH0_INTR)
545 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
546 		   CMPCI_REG_CH0_INTR_ENABLE);
547 	if (intrstat & CMPCI_REG_CH1_INTR)
548 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
549 		    CMPCI_REG_CH1_INTR_ENABLE);
550 
551 	if (intrstat & CMPCI_REG_CH0_INTR) {
552 		if (sc->sc_play.intr != NULL)
553 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
554 	}
555 	if (intrstat & CMPCI_REG_CH1_INTR) {
556 		if (sc->sc_rec.intr != NULL)
557 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
558 	}
559 
560 	/* enable intr */
561 	if (intrstat & CMPCI_REG_CH0_INTR)
562 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
563 		    CMPCI_REG_CH0_INTR_ENABLE);
564 	if (intrstat & CMPCI_REG_CH1_INTR)
565 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
566 		    CMPCI_REG_CH1_INTR_ENABLE);
567 
568 #if NMPU > 0
569 	if (intrstat & CMPCI_REG_UART_INTR && sc_mpu != NULL)
570 		mpu_intr(sc_mpu);
571 #endif
572 
573 	mutex_spin_exit(&sc->sc_intr_lock);
574 	return 1;
575 }
576 
577 static int
578 cmpci_query_encoding(void *handle, struct audio_encoding *fp)
579 {
580 
581 	switch (fp->index) {
582 	case 0:
583 		strcpy(fp->name, AudioEulinear);
584 		fp->encoding = AUDIO_ENCODING_ULINEAR;
585 		fp->precision = 8;
586 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
587 		break;
588 	case 1:
589 		strcpy(fp->name, AudioEmulaw);
590 		fp->encoding = AUDIO_ENCODING_ULAW;
591 		fp->precision = 8;
592 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
593 		break;
594 	case 2:
595 		strcpy(fp->name, AudioEalaw);
596 		fp->encoding = AUDIO_ENCODING_ALAW;
597 		fp->precision = 8;
598 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
599 		break;
600 	case 3:
601 		strcpy(fp->name, AudioEslinear);
602 		fp->encoding = AUDIO_ENCODING_SLINEAR;
603 		fp->precision = 8;
604 		fp->flags = 0;
605 		break;
606 	case 4:
607 		strcpy(fp->name, AudioEslinear_le);
608 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
609 		fp->precision = 16;
610 		fp->flags = 0;
611 		break;
612 	case 5:
613 		strcpy(fp->name, AudioEulinear_le);
614 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
615 		fp->precision = 16;
616 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
617 		break;
618 	case 6:
619 		strcpy(fp->name, AudioEslinear_be);
620 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
621 		fp->precision = 16;
622 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
623 		break;
624 	case 7:
625 		strcpy(fp->name, AudioEulinear_be);
626 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
627 		fp->precision = 16;
628 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
629 		break;
630 	default:
631 		return EINVAL;
632 	}
633 	return 0;
634 }
635 
636 
637 static int
638 cmpci_set_params(void *handle, int setmode, int usemode,
639     audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
640     stream_filter_list_t *rfil)
641 {
642 	int i;
643 	struct cmpci_softc *sc;
644 
645 	sc = handle;
646 	for (i = 0; i < 2; i++) {
647 		int md_format;
648 		int md_divide;
649 		int md_index;
650 		int mode;
651 		audio_params_t *p;
652 		stream_filter_list_t *fil;
653 		int ind;
654 
655 		switch (i) {
656 		case 0:
657 			mode = AUMODE_PLAY;
658 			p = play;
659 			fil = pfil;
660 			break;
661 		case 1:
662 			mode = AUMODE_RECORD;
663 			p = rec;
664 			fil = rfil;
665 			break;
666 		default:
667 			return EINVAL;
668 		}
669 
670 		if (!(setmode & mode))
671 			continue;
672 
673 		md_index = cmpci_rate_to_index(p->sample_rate);
674 		md_divide = cmpci_index_to_divider(md_index);
675 		p->sample_rate = cmpci_index_to_rate(md_index);
676 		DPRINTF(("%s: sample:%u, divider=%d\n",
677 			 device_xname(sc->sc_dev), p->sample_rate, md_divide));
678 
679 		ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
680 					   mode, p, FALSE, fil);
681 		if (ind < 0)
682 			return EINVAL;
683 		if (fil->req_size > 0)
684 			p = &fil->filters[0].param;
685 
686 		/* format */
687 		md_format = p->channels == 1
688 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
689 		md_format |= p->precision == 16
690 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
691 		if (mode & AUMODE_PLAY) {
692 			cmpci_reg_partial_write_4(sc,
693 			   CMPCI_REG_CHANNEL_FORMAT,
694 			   CMPCI_REG_CH0_FORMAT_SHIFT,
695 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
696 			cmpci_reg_partial_write_4(sc,
697 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
698 			    CMPCI_REG_DAC_FS_MASK, md_divide);
699 			sc->sc_play.md_divide = md_divide;
700 		} else {
701 			cmpci_reg_partial_write_4(sc,
702 			   CMPCI_REG_CHANNEL_FORMAT,
703 			   CMPCI_REG_CH1_FORMAT_SHIFT,
704 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
705 			cmpci_reg_partial_write_4(sc,
706 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
707 			    CMPCI_REG_ADC_FS_MASK, md_divide);
708 			sc->sc_rec.md_divide = md_divide;
709 		}
710 		cmpci_set_out_ports(sc);
711 		cmpci_set_in_ports(sc);
712 	}
713 	return 0;
714 }
715 
716 /* ARGSUSED */
717 static int
718 cmpci_round_blocksize(void *handle, int block,
719     int mode, const audio_params_t *param)
720 {
721 
722 	return block & -4;
723 }
724 
725 static int
726 cmpci_halt_output(void *handle)
727 {
728 	struct cmpci_softc *sc;
729 
730 	sc = handle;
731 	sc->sc_play.intr = NULL;
732 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
733 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
734 	/* wait for reset DMA */
735 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
736 	delay(10);
737 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
738 
739 	return 0;
740 }
741 
742 static int
743 cmpci_halt_input(void *handle)
744 {
745 	struct cmpci_softc *sc;
746 
747 	sc = handle;
748 	sc->sc_rec.intr = NULL;
749 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
750 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
751 	/* wait for reset DMA */
752 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
753 	delay(10);
754 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
755 
756 	return 0;
757 }
758 
759 /* get audio device information */
760 static int
761 cmpci_getdev(void *handle, struct audio_device *ad)
762 {
763 	struct cmpci_softc *sc;
764 
765 	sc = handle;
766 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
767 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
768 		 PCI_REVISION(sc->sc_class));
769 	switch (PCI_PRODUCT(sc->sc_id)) {
770 	case PCI_PRODUCT_CMEDIA_CMI8338A:
771 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
772 		break;
773 	case PCI_PRODUCT_CMEDIA_CMI8338B:
774 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
775 		break;
776 	case PCI_PRODUCT_CMEDIA_CMI8738:
777 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
778 		break;
779 	case PCI_PRODUCT_CMEDIA_CMI8738B:
780 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
781 		break;
782 	default:
783 		strncpy(ad->config, "unknown", sizeof(ad->config));
784 	}
785 
786 	return 0;
787 }
788 
789 /* mixer device information */
790 int
791 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
792 {
793 	static const char *const mixer_port_names[] = {
794 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
795 		AudioNmicrophone
796 	};
797 	static const char *const mixer_classes[] = {
798 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
799 		CmpciCspdif
800 	};
801 	struct cmpci_softc *sc;
802 	int i;
803 
804 	sc = handle;
805 	dip->prev = dip->next = AUDIO_MIXER_LAST;
806 
807 	switch (dip->index) {
808 	case CMPCI_INPUT_CLASS:
809 	case CMPCI_OUTPUT_CLASS:
810 	case CMPCI_RECORD_CLASS:
811 	case CMPCI_PLAYBACK_CLASS:
812 	case CMPCI_SPDIF_CLASS:
813 		dip->type = AUDIO_MIXER_CLASS;
814 		dip->mixer_class = dip->index;
815 		strcpy(dip->label.name,
816 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
817 		return 0;
818 
819 	case CMPCI_AUX_IN_VOL:
820 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
821 		goto vol1;
822 	case CMPCI_DAC_VOL:
823 	case CMPCI_FM_VOL:
824 	case CMPCI_CD_VOL:
825 	case CMPCI_LINE_IN_VOL:
826 	case CMPCI_MIC_VOL:
827 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
828 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
829 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
830 		strcpy(dip->label.name, mixer_port_names[dip->index]);
831 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
832 	vol:
833 		dip->type = AUDIO_MIXER_VALUE;
834 		strcpy(dip->un.v.units.name, AudioNvolume);
835 		return 0;
836 
837 	case CMPCI_MIC_MUTE:
838 		dip->next = CMPCI_MIC_PREAMP;
839 		/* FALLTHROUGH */
840 	case CMPCI_DAC_MUTE:
841 	case CMPCI_FM_MUTE:
842 	case CMPCI_CD_MUTE:
843 	case CMPCI_LINE_IN_MUTE:
844 	case CMPCI_AUX_IN_MUTE:
845 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
846 		dip->mixer_class = CMPCI_INPUT_CLASS;
847 		strcpy(dip->label.name, AudioNmute);
848 		goto on_off;
849 	on_off:
850 		dip->type = AUDIO_MIXER_ENUM;
851 		dip->un.e.num_mem = 2;
852 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
853 		dip->un.e.member[0].ord = 0;
854 		strcpy(dip->un.e.member[1].label.name, AudioNon);
855 		dip->un.e.member[1].ord = 1;
856 		return 0;
857 
858 	case CMPCI_MIC_PREAMP:
859 		dip->mixer_class = CMPCI_INPUT_CLASS;
860 		dip->prev = CMPCI_MIC_MUTE;
861 		strcpy(dip->label.name, AudioNpreamp);
862 		goto on_off;
863 	case CMPCI_PCSPEAKER:
864 		dip->mixer_class = CMPCI_INPUT_CLASS;
865 		strcpy(dip->label.name, AudioNspeaker);
866 		dip->un.v.num_channels = 1;
867 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
868 		goto vol;
869 	case CMPCI_RECORD_SOURCE:
870 		dip->mixer_class = CMPCI_RECORD_CLASS;
871 		strcpy(dip->label.name, AudioNsource);
872 		dip->type = AUDIO_MIXER_SET;
873 		dip->un.s.num_mem = 7;
874 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
875 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
876 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
877 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
878 		strcpy(dip->un.s.member[2].label.name, AudioNline);
879 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
880 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
881 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
882 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
883 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
884 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
885 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
886 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
887 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
888 		return 0;
889 	case CMPCI_MIC_RECVOL:
890 		dip->mixer_class = CMPCI_RECORD_CLASS;
891 		strcpy(dip->label.name, AudioNmicrophone);
892 		dip->un.v.num_channels = 1;
893 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
894 		goto vol;
895 
896 	case CMPCI_PLAYBACK_MODE:
897 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
898 		dip->type = AUDIO_MIXER_ENUM;
899 		strcpy(dip->label.name, AudioNmode);
900 		dip->un.e.num_mem = 2;
901 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
902 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
903 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
904 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
905 		return 0;
906 	case CMPCI_SPDIF_IN_SELECT:
907 		dip->mixer_class = CMPCI_SPDIF_CLASS;
908 		dip->type = AUDIO_MIXER_ENUM;
909 		dip->next = CMPCI_SPDIF_IN_PHASE;
910 		strcpy(dip->label.name, AudioNinput);
911 		i = 0;
912 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
913 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
914 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
915 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
916 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
917 		}
918 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
919 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
920 		dip->un.e.num_mem = i;
921 		return 0;
922 	case CMPCI_SPDIF_IN_PHASE:
923 		dip->mixer_class = CMPCI_SPDIF_CLASS;
924 		dip->prev = CMPCI_SPDIF_IN_SELECT;
925 		strcpy(dip->label.name, CmpciNphase);
926 		dip->type = AUDIO_MIXER_ENUM;
927 		dip->un.e.num_mem = 2;
928 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
929 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
930 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
931 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
932 		return 0;
933 	case CMPCI_SPDIF_LOOP:
934 		dip->mixer_class = CMPCI_SPDIF_CLASS;
935 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
936 		strcpy(dip->label.name, AudioNoutput);
937 		dip->type = AUDIO_MIXER_ENUM;
938 		dip->un.e.num_mem = 2;
939 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
940 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
941 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
942 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
943 		return 0;
944 	case CMPCI_SPDIF_OUT_PLAYBACK:
945 		dip->mixer_class = CMPCI_SPDIF_CLASS;
946 		dip->prev = CMPCI_SPDIF_LOOP;
947 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
948 		strcpy(dip->label.name, CmpciNplayback);
949 		dip->type = AUDIO_MIXER_ENUM;
950 		dip->un.e.num_mem = 2;
951 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
952 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
953 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
954 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
955 		return 0;
956 	case CMPCI_SPDIF_OUT_VOLTAGE:
957 		dip->mixer_class = CMPCI_SPDIF_CLASS;
958 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
959 		strcpy(dip->label.name, CmpciNvoltage);
960 		dip->type = AUDIO_MIXER_ENUM;
961 		dip->un.e.num_mem = 2;
962 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
963 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
964 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
965 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
966 		return 0;
967 	case CMPCI_MONITOR_DAC:
968 		dip->mixer_class = CMPCI_SPDIF_CLASS;
969 		strcpy(dip->label.name, AudioNmonitor);
970 		dip->type = AUDIO_MIXER_ENUM;
971 		dip->un.e.num_mem = 3;
972 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
973 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
974 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
975 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
976 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
977 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
978 		return 0;
979 
980 	case CMPCI_MASTER_VOL:
981 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
982 		strcpy(dip->label.name, AudioNmaster);
983 		dip->un.v.num_channels = 2;
984 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
985 		goto vol;
986 	case CMPCI_REAR:
987 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
988 		dip->next = CMPCI_INDIVIDUAL;
989 		strcpy(dip->label.name, CmpciNrear);
990 		goto on_off;
991 	case CMPCI_INDIVIDUAL:
992 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
993 		dip->prev = CMPCI_REAR;
994 		dip->next = CMPCI_REVERSE;
995 		strcpy(dip->label.name, CmpciNindividual);
996 		goto on_off;
997 	case CMPCI_REVERSE:
998 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
999 		dip->prev = CMPCI_INDIVIDUAL;
1000 		strcpy(dip->label.name, CmpciNreverse);
1001 		goto on_off;
1002 	case CMPCI_SURROUND:
1003 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1004 		strcpy(dip->label.name, CmpciNsurround);
1005 		goto on_off;
1006 	}
1007 
1008 	return ENXIO;
1009 }
1010 
1011 static int
1012 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, void **r_addr)
1013 {
1014 	int error;
1015 	struct cmpci_dmanode *n;
1016 
1017 	error = 0;
1018 	n = kmem_alloc(sizeof(struct cmpci_dmanode), KM_SLEEP);
1019 	if (n == NULL) {
1020 		error = ENOMEM;
1021 		goto quit;
1022 	}
1023 
1024 #define CMPCI_DMABUF_ALIGN    0x4
1025 #define CMPCI_DMABUF_BOUNDARY 0x0
1026 	n->cd_tag = sc->sc_dmat;
1027 	n->cd_size = size;
1028 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
1029 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
1030 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs,
1031 	    BUS_DMA_WAITOK);
1032 	if (error)
1033 		goto mfree;
1034 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
1035 	    &n->cd_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
1036 	if (error)
1037 		goto dmafree;
1038 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
1039 	    BUS_DMA_WAITOK, &n->cd_map);
1040 	if (error)
1041 		goto unmap;
1042 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
1043 	    NULL, BUS_DMA_WAITOK);
1044 	if (error)
1045 		goto destroy;
1046 
1047 	n->cd_next = sc->sc_dmap;
1048 	sc->sc_dmap = n;
1049 	*r_addr = KVADDR(n);
1050 	return 0;
1051 
1052  destroy:
1053 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
1054  unmap:
1055 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1056  dmafree:
1057 	bus_dmamem_free(n->cd_tag,
1058 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1059  mfree:
1060 	kmem_free(n, sizeof(*n));
1061  quit:
1062 	return error;
1063 }
1064 
1065 static int
1066 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, size_t size)
1067 {
1068 	struct cmpci_dmanode **nnp;
1069 
1070 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
1071 		if ((*nnp)->cd_addr == addr) {
1072 			struct cmpci_dmanode *n = *nnp;
1073 			bus_dmamap_unload(n->cd_tag, n->cd_map);
1074 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
1075 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1076 			bus_dmamem_free(n->cd_tag, n->cd_segs,
1077 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1078 			kmem_free(n, sizeof(*n));
1079 			return 0;
1080 		}
1081 	}
1082 	return -1;
1083 }
1084 
1085 static struct cmpci_dmanode *
1086 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr)
1087 {
1088 	struct cmpci_dmanode *p;
1089 
1090 	for (p = sc->sc_dmap; p; p = p->cd_next)
1091 		if (KVADDR(p) == (void *)addr)
1092 			break;
1093 	return p;
1094 }
1095 
1096 #if 0
1097 static void
1098 cmpci_print_dmamem(struct cmpci_dmanode *);
1099 static void
1100 cmpci_print_dmamem(struct cmpci_dmanode *p)
1101 {
1102 
1103 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
1104 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
1105 		 (void *)DMAADDR(p), (void *)p->cd_size));
1106 }
1107 #endif /* DEBUG */
1108 
1109 static void *
1110 cmpci_allocm(void *handle, int direction, size_t size)
1111 {
1112 	void *addr;
1113 
1114 	addr = NULL;	/* XXX gcc */
1115 
1116 	if (cmpci_alloc_dmamem(handle, size, &addr))
1117 		return NULL;
1118 	return addr;
1119 }
1120 
1121 static void
1122 cmpci_freem(void *handle, void *addr, size_t size)
1123 {
1124 
1125 	cmpci_free_dmamem(handle, addr, size);
1126 }
1127 
1128 #define MAXVAL 256
1129 static int
1130 cmpci_adjust(int val, int mask)
1131 {
1132 
1133 	val += (MAXVAL - mask) >> 1;
1134 	if (val >= MAXVAL)
1135 		val = MAXVAL-1;
1136 	return val & mask;
1137 }
1138 
1139 static void
1140 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
1141 {
1142 	int src;
1143 	int bits, mask;
1144 
1145 	switch (port) {
1146 	case CMPCI_MIC_VOL:
1147 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
1148 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1149 		return;
1150 	case CMPCI_MASTER_VOL:
1151 		src = CMPCI_SB16_MIXER_MASTER_L;
1152 		break;
1153 	case CMPCI_LINE_IN_VOL:
1154 		src = CMPCI_SB16_MIXER_LINE_L;
1155 		break;
1156 	case CMPCI_AUX_IN_VOL:
1157 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
1158 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
1159 					      sc->sc_gain[port][CMPCI_RIGHT]));
1160 		return;
1161 	case CMPCI_MIC_RECVOL:
1162 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
1163 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
1164 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1165 		return;
1166 	case CMPCI_DAC_VOL:
1167 		src = CMPCI_SB16_MIXER_VOICE_L;
1168 		break;
1169 	case CMPCI_FM_VOL:
1170 		src = CMPCI_SB16_MIXER_FM_L;
1171 		break;
1172 	case CMPCI_CD_VOL:
1173 		src = CMPCI_SB16_MIXER_CDDA_L;
1174 		break;
1175 	case CMPCI_PCSPEAKER:
1176 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
1177 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1178 		return;
1179 	case CMPCI_MIC_PREAMP:
1180 		if (sc->sc_gain[port][CMPCI_LR])
1181 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1182 			    CMPCI_REG_MICGAINZ);
1183 		else
1184 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1185 			    CMPCI_REG_MICGAINZ);
1186 		return;
1187 
1188 	case CMPCI_DAC_MUTE:
1189 		if (sc->sc_gain[port][CMPCI_LR])
1190 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1191 			    CMPCI_REG_WSMUTE);
1192 		else
1193 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1194 			    CMPCI_REG_WSMUTE);
1195 		return;
1196 	case CMPCI_FM_MUTE:
1197 		if (sc->sc_gain[port][CMPCI_LR])
1198 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1199 			    CMPCI_REG_FMMUTE);
1200 		else
1201 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1202 			    CMPCI_REG_FMMUTE);
1203 		return;
1204 	case CMPCI_AUX_IN_MUTE:
1205 		if (sc->sc_gain[port][CMPCI_LR])
1206 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1207 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1208 		else
1209 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1210 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1211 		return;
1212 	case CMPCI_CD_MUTE:
1213 		mask = CMPCI_SB16_SW_CD;
1214 		goto sbmute;
1215 	case CMPCI_MIC_MUTE:
1216 		mask = CMPCI_SB16_SW_MIC;
1217 		goto sbmute;
1218 	case CMPCI_LINE_IN_MUTE:
1219 		mask = CMPCI_SB16_SW_LINE;
1220 	sbmute:
1221 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
1222 		if (sc->sc_gain[port][CMPCI_LR])
1223 			bits = bits & ~mask;
1224 		else
1225 			bits = bits | mask;
1226 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
1227 		return;
1228 
1229 	case CMPCI_SPDIF_IN_SELECT:
1230 	case CMPCI_MONITOR_DAC:
1231 	case CMPCI_PLAYBACK_MODE:
1232 	case CMPCI_SPDIF_LOOP:
1233 	case CMPCI_SPDIF_OUT_PLAYBACK:
1234 		cmpci_set_out_ports(sc);
1235 		return;
1236 	case CMPCI_SPDIF_OUT_VOLTAGE:
1237 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
1238 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
1239 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
1240 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
1241 			else
1242 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
1243 		}
1244 		return;
1245 	case CMPCI_SURROUND:
1246 		if (CMPCI_ISCAP(sc, SURROUND)) {
1247 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
1248 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1249 						CMPCI_REG_SURROUND);
1250 			else
1251 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1252 						  CMPCI_REG_SURROUND);
1253 		}
1254 		return;
1255 	case CMPCI_REAR:
1256 		if (CMPCI_ISCAP(sc, REAR)) {
1257 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1258 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
1259 			else
1260 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
1261 		}
1262 		return;
1263 	case CMPCI_INDIVIDUAL:
1264 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
1265 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1266 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1267 						CMPCI_REG_INDIVIDUAL);
1268 			else
1269 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1270 						  CMPCI_REG_INDIVIDUAL);
1271 		}
1272 		return;
1273 	case CMPCI_REVERSE:
1274 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
1275 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
1276 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1277 						CMPCI_REG_REVERSE_FR);
1278 			else
1279 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1280 						  CMPCI_REG_REVERSE_FR);
1281 		}
1282 		return;
1283 	case CMPCI_SPDIF_IN_PHASE:
1284 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
1285 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
1286 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
1287 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1288 						  CMPCI_REG_SPDIN_PHASE);
1289 			else
1290 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1291 						CMPCI_REG_SPDIN_PHASE);
1292 		}
1293 		return;
1294 	default:
1295 		return;
1296 	}
1297 
1298 	cmpci_mixerreg_write(sc, src,
1299 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
1300 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
1301 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
1302 }
1303 
1304 static void
1305 cmpci_set_out_ports(struct cmpci_softc *sc)
1306 {
1307 	uint8_t v;
1308 	int enspdout;
1309 
1310 	if (!CMPCI_ISCAP(sc, SPDLOOP))
1311 		return;
1312 
1313 	/* SPDIF/out select */
1314 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
1315 		/* playback */
1316 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1317 	} else {
1318 		/* monitor SPDIF/in */
1319 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1320 	}
1321 
1322 	/* SPDIF in select */
1323 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
1324 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
1325 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
1326 	else
1327 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
1328 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
1329 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
1330 	else
1331 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
1332 
1333 	enspdout = 0;
1334 	/* playback to ... */
1335 	if (CMPCI_ISCAP(sc, SPDOUT) &&
1336 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
1337 		== CMPCI_PLAYBACK_MODE_SPDIF &&
1338 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
1339 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
1340 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
1341 		/* playback to SPDIF */
1342 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
1343 		enspdout = 1;
1344 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
1345 			cmpci_reg_set_reg_misc(sc,
1346 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1347 		else
1348 			cmpci_reg_clear_reg_misc(sc,
1349 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1350 	} else {
1351 		/* playback to DAC */
1352 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1353 				  CMPCI_REG_SPDIF0_ENABLE);
1354 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
1355 			cmpci_reg_clear_reg_misc(sc,
1356 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1357 	}
1358 
1359 	/* legacy to SPDIF/out or not */
1360 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
1361 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
1362 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
1363 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1364 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
1365 		else {
1366 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1367 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
1368 			enspdout = 1;
1369 		}
1370 	}
1371 
1372 	/* enable/disable SPDIF/out */
1373 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
1374 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1375 				CMPCI_REG_XSPDIF_ENABLE);
1376 	else
1377 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1378 				CMPCI_REG_XSPDIF_ENABLE);
1379 
1380 	/* SPDIF monitor (digital to analog output) */
1381 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
1382 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
1383 		if (!(v & CMPCI_MONDAC_ENABLE))
1384 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1385 					CMPCI_REG_SPDIN_MONITOR);
1386 		if (v & CMPCI_MONDAC_SPDOUT)
1387 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
1388 					CMPCI_REG_SPDIFOUT_DAC);
1389 		else
1390 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1391 					CMPCI_REG_SPDIFOUT_DAC);
1392 		if (v & CMPCI_MONDAC_ENABLE)
1393 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1394 					CMPCI_REG_SPDIN_MONITOR);
1395 	}
1396 }
1397 
1398 static int
1399 cmpci_set_in_ports(struct cmpci_softc *sc)
1400 {
1401 	int mask;
1402 	int bitsl, bitsr;
1403 
1404 	mask = sc->sc_in_mask;
1405 
1406 	/*
1407 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
1408 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
1409 	 * of the mixer register.
1410 	 */
1411 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1412 	    CMPCI_RECORD_SOURCE_FM);
1413 
1414 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
1415 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
1416 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
1417 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
1418 	}
1419 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
1420 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
1421 
1422 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
1423 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1424 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1425 	else
1426 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1427 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1428 
1429 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
1430 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1431 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1432 	else
1433 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1434 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1435 
1436 	if (CMPCI_ISCAP(sc, SPDIN) &&
1437 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
1438 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
1439 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
1440 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
1441 			/* enable SPDIF/in */
1442 			cmpci_reg_set_4(sc,
1443 					CMPCI_REG_FUNC_1,
1444 					CMPCI_REG_SPDIF1_ENABLE);
1445 		} else {
1446 			cmpci_reg_clear_4(sc,
1447 					CMPCI_REG_FUNC_1,
1448 					CMPCI_REG_SPDIF1_ENABLE);
1449 		}
1450 	}
1451 
1452 	return 0;
1453 }
1454 
1455 static int
1456 cmpci_set_port(void *handle, mixer_ctrl_t *cp)
1457 {
1458 	struct cmpci_softc *sc;
1459 	int lgain, rgain;
1460 
1461 	sc = handle;
1462 	switch (cp->dev) {
1463 	case CMPCI_MIC_VOL:
1464 	case CMPCI_PCSPEAKER:
1465 	case CMPCI_MIC_RECVOL:
1466 		if (cp->un.value.num_channels != 1)
1467 			return EINVAL;
1468 		/* FALLTHROUGH */
1469 	case CMPCI_DAC_VOL:
1470 	case CMPCI_FM_VOL:
1471 	case CMPCI_CD_VOL:
1472 	case CMPCI_LINE_IN_VOL:
1473 	case CMPCI_AUX_IN_VOL:
1474 	case CMPCI_MASTER_VOL:
1475 		if (cp->type != AUDIO_MIXER_VALUE)
1476 			return EINVAL;
1477 		switch (cp->un.value.num_channels) {
1478 		case 1:
1479 			lgain = rgain =
1480 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
1481 			break;
1482 		case 2:
1483 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
1484 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
1485 			break;
1486 		default:
1487 			return EINVAL;
1488 		}
1489 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
1490 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
1491 
1492 		cmpci_set_mixer_gain(sc, cp->dev);
1493 		break;
1494 
1495 	case CMPCI_RECORD_SOURCE:
1496 		if (cp->type != AUDIO_MIXER_SET)
1497 			return EINVAL;
1498 
1499 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
1500 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1501 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
1502 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
1503 			return EINVAL;
1504 
1505 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
1506 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
1507 
1508 		sc->sc_in_mask = cp->un.mask;
1509 		return cmpci_set_in_ports(sc);
1510 
1511 	/* boolean */
1512 	case CMPCI_DAC_MUTE:
1513 	case CMPCI_FM_MUTE:
1514 	case CMPCI_CD_MUTE:
1515 	case CMPCI_LINE_IN_MUTE:
1516 	case CMPCI_AUX_IN_MUTE:
1517 	case CMPCI_MIC_MUTE:
1518 	case CMPCI_MIC_PREAMP:
1519 	case CMPCI_PLAYBACK_MODE:
1520 	case CMPCI_SPDIF_IN_PHASE:
1521 	case CMPCI_SPDIF_LOOP:
1522 	case CMPCI_SPDIF_OUT_PLAYBACK:
1523 	case CMPCI_SPDIF_OUT_VOLTAGE:
1524 	case CMPCI_REAR:
1525 	case CMPCI_INDIVIDUAL:
1526 	case CMPCI_REVERSE:
1527 	case CMPCI_SURROUND:
1528 		if (cp->type != AUDIO_MIXER_ENUM)
1529 			return EINVAL;
1530 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
1531 		cmpci_set_mixer_gain(sc, cp->dev);
1532 		break;
1533 
1534 	case CMPCI_SPDIF_IN_SELECT:
1535 		switch (cp->un.ord) {
1536 		case CMPCI_SPDIF_IN_SPDIN1:
1537 		case CMPCI_SPDIF_IN_SPDIN2:
1538 		case CMPCI_SPDIF_IN_SPDOUT:
1539 			break;
1540 		default:
1541 			return EINVAL;
1542 		}
1543 		goto xenum;
1544 	case CMPCI_MONITOR_DAC:
1545 		switch (cp->un.ord) {
1546 		case CMPCI_MONITOR_DAC_OFF:
1547 		case CMPCI_MONITOR_DAC_SPDIN:
1548 		case CMPCI_MONITOR_DAC_SPDOUT:
1549 			break;
1550 		default:
1551 			return EINVAL;
1552 		}
1553 	xenum:
1554 		if (cp->type != AUDIO_MIXER_ENUM)
1555 			return EINVAL;
1556 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
1557 		cmpci_set_mixer_gain(sc, cp->dev);
1558 		break;
1559 
1560 	default:
1561 	    return EINVAL;
1562 	}
1563 
1564 	return 0;
1565 }
1566 
1567 static int
1568 cmpci_get_port(void *handle, mixer_ctrl_t *cp)
1569 {
1570 	struct cmpci_softc *sc;
1571 
1572 	sc = handle;
1573 	switch (cp->dev) {
1574 	case CMPCI_MIC_VOL:
1575 	case CMPCI_PCSPEAKER:
1576 	case CMPCI_MIC_RECVOL:
1577 		if (cp->un.value.num_channels != 1)
1578 			return EINVAL;
1579 		/*FALLTHROUGH*/
1580 	case CMPCI_DAC_VOL:
1581 	case CMPCI_FM_VOL:
1582 	case CMPCI_CD_VOL:
1583 	case CMPCI_LINE_IN_VOL:
1584 	case CMPCI_AUX_IN_VOL:
1585 	case CMPCI_MASTER_VOL:
1586 		switch (cp->un.value.num_channels) {
1587 		case 1:
1588 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1589 				sc->sc_gain[cp->dev][CMPCI_LEFT];
1590 			break;
1591 		case 2:
1592 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1593 				sc->sc_gain[cp->dev][CMPCI_LEFT];
1594 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1595 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
1596 			break;
1597 		default:
1598 			return EINVAL;
1599 		}
1600 		break;
1601 
1602 	case CMPCI_RECORD_SOURCE:
1603 		cp->un.mask = sc->sc_in_mask;
1604 		break;
1605 
1606 	case CMPCI_DAC_MUTE:
1607 	case CMPCI_FM_MUTE:
1608 	case CMPCI_CD_MUTE:
1609 	case CMPCI_LINE_IN_MUTE:
1610 	case CMPCI_AUX_IN_MUTE:
1611 	case CMPCI_MIC_MUTE:
1612 	case CMPCI_MIC_PREAMP:
1613 	case CMPCI_PLAYBACK_MODE:
1614 	case CMPCI_SPDIF_IN_SELECT:
1615 	case CMPCI_SPDIF_IN_PHASE:
1616 	case CMPCI_SPDIF_LOOP:
1617 	case CMPCI_SPDIF_OUT_PLAYBACK:
1618 	case CMPCI_SPDIF_OUT_VOLTAGE:
1619 	case CMPCI_MONITOR_DAC:
1620 	case CMPCI_REAR:
1621 	case CMPCI_INDIVIDUAL:
1622 	case CMPCI_REVERSE:
1623 	case CMPCI_SURROUND:
1624 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
1625 		break;
1626 
1627 	default:
1628 		return EINVAL;
1629 	}
1630 
1631 	return 0;
1632 }
1633 
1634 /* ARGSUSED */
1635 static size_t
1636 cmpci_round_buffersize(void *handle, int direction,
1637     size_t bufsize)
1638 {
1639 
1640 	if (bufsize > 0x10000)
1641 		bufsize = 0x10000;
1642 
1643 	return bufsize;
1644 }
1645 
1646 static paddr_t
1647 cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
1648 {
1649 	struct cmpci_dmanode *p;
1650 
1651 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr)))
1652 		return -1;
1653 
1654 	return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
1655 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
1656 		   offset, prot, BUS_DMA_WAITOK);
1657 }
1658 
1659 /* ARGSUSED */
1660 static int
1661 cmpci_get_props(void *handle)
1662 {
1663 
1664 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1665 }
1666 
1667 static int
1668 cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
1669 		     void (*intr)(void *), void *arg,
1670 		     const audio_params_t *param)
1671 {
1672 	struct cmpci_softc *sc;
1673 	struct cmpci_dmanode *p;
1674 	int bps;
1675 
1676 	sc = handle;
1677 	sc->sc_play.intr = intr;
1678 	sc->sc_play.intr_arg = arg;
1679 	bps = param->channels * param->precision / 8;
1680 	if (!bps)
1681 		return EINVAL;
1682 
1683 	/* set DMA frame */
1684 	if (!(p = cmpci_find_dmamem(sc, start)))
1685 		return EINVAL;
1686 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
1687 	    DMAADDR(p));
1688 	delay(10);
1689 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
1690 	    ((char *)end - (char *)start + 1) / bps - 1);
1691 	delay(10);
1692 
1693 	/* set interrupt count */
1694 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
1695 			  (blksize + bps - 1) / bps - 1);
1696 	delay(10);
1697 
1698 	/* start DMA */
1699 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
1700 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
1701 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
1702 
1703 	return 0;
1704 }
1705 
1706 static int
1707 cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
1708 		    void (*intr)(void *), void *arg,
1709 		    const audio_params_t *param)
1710 {
1711 	struct cmpci_softc *sc;
1712 	struct cmpci_dmanode *p;
1713 	int bps;
1714 
1715 	sc = handle;
1716 	sc->sc_rec.intr = intr;
1717 	sc->sc_rec.intr_arg = arg;
1718 	bps = param->channels * param->precision / 8;
1719 	if (!bps)
1720 		return EINVAL;
1721 
1722 	/* set DMA frame */
1723 	if (!(p=cmpci_find_dmamem(sc, start)))
1724 		return EINVAL;
1725 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
1726 	    DMAADDR(p));
1727 	delay(10);
1728 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
1729 	    ((char *)end - (char *)start + 1) / bps - 1);
1730 	delay(10);
1731 
1732 	/* set interrupt count */
1733 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
1734 	    (blksize + bps - 1) / bps - 1);
1735 	delay(10);
1736 
1737 	/* start DMA */
1738 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
1739 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
1740 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
1741 
1742 	return 0;
1743 }
1744 
1745 static void
1746 cmpci_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
1747 {
1748 	struct cmpci_softc *sc;
1749 
1750 	sc = addr;
1751 	*intr = &sc->sc_intr_lock;
1752 	*thread = &sc->sc_lock;
1753 }
1754 
1755 /* end of file */
1756