xref: /netbsd-src/sys/dev/pci/cmpci.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: cmpci.c,v 1.36 2007/10/19 12:00:41 ad Exp $	*/
2 
3 /*
4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Takuya SHIOZAKI <tshiozak@NetBSD.org> .
9  *
10  * This code is derived from software contributed to The NetBSD Foundation
11  * by ITOH Yasufumi.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  */
35 
36 /*
37  * C-Media CMI8x38 Audio Chip Support.
38  *
39  * TODO:
40  *   - 4ch / 6ch support.
41  *   - Joystick support.
42  *
43  */
44 
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.36 2007/10/19 12:00:41 ad Exp $");
47 
48 #if defined(AUDIO_DEBUG) || defined(DEBUG)
49 #define DPRINTF(x) if (cmpcidebug) printf x
50 int cmpcidebug = 0;
51 #else
52 #define DPRINTF(x)
53 #endif
54 
55 #include "mpu.h"
56 
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/malloc.h>
61 #include <sys/device.h>
62 #include <sys/proc.h>
63 
64 #include <dev/pci/pcidevs.h>
65 #include <dev/pci/pcivar.h>
66 
67 #include <sys/audioio.h>
68 #include <dev/audio_if.h>
69 #include <dev/midi_if.h>
70 
71 #include <dev/mulaw.h>
72 #include <dev/auconv.h>
73 #include <dev/pci/cmpcireg.h>
74 #include <dev/pci/cmpcivar.h>
75 
76 #include <dev/ic/mpuvar.h>
77 #include <sys/bus.h>
78 #include <sys/intr.h>
79 
80 /*
81  * Low-level HW interface
82  */
83 static inline uint8_t cmpci_mixerreg_read(struct cmpci_softc *, uint8_t);
84 static inline void cmpci_mixerreg_write(struct cmpci_softc *,
85 	uint8_t, uint8_t);
86 static inline void cmpci_reg_partial_write_1(struct cmpci_softc *, int, int,
87 	unsigned, unsigned);
88 static inline void cmpci_reg_partial_write_4(struct cmpci_softc *, int, int,
89 	uint32_t, uint32_t);
90 static inline void cmpci_reg_set_1(struct cmpci_softc *, int, uint8_t);
91 static inline void cmpci_reg_clear_1(struct cmpci_softc *, int, uint8_t);
92 static inline void cmpci_reg_set_4(struct cmpci_softc *, int, uint32_t);
93 static inline void cmpci_reg_clear_4(struct cmpci_softc *, int, uint32_t);
94 static inline void cmpci_reg_set_reg_misc(struct cmpci_softc *, uint32_t);
95 static inline void cmpci_reg_clear_reg_misc(struct cmpci_softc *, uint32_t);
96 static int cmpci_rate_to_index(int);
97 static inline int cmpci_index_to_rate(int);
98 static inline int cmpci_index_to_divider(int);
99 
100 static int cmpci_adjust(int, int);
101 static void cmpci_set_mixer_gain(struct cmpci_softc *, int);
102 static void cmpci_set_out_ports(struct cmpci_softc *);
103 static int cmpci_set_in_ports(struct cmpci_softc *);
104 
105 
106 /*
107  * autoconf interface
108  */
109 static int cmpci_match(struct device *, struct cfdata *, void *);
110 static void cmpci_attach(struct device *, struct device *, void *);
111 
112 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc),
113     cmpci_match, cmpci_attach, NULL, NULL);
114 
115 /* interrupt */
116 static int cmpci_intr(void *);
117 
118 
119 /*
120  * DMA stuffs
121  */
122 static int cmpci_alloc_dmamem(struct cmpci_softc *, size_t,
123 	struct malloc_type *, int, void **);
124 static int cmpci_free_dmamem(struct cmpci_softc *, void *,
125 	struct malloc_type *);
126 static struct cmpci_dmanode * cmpci_find_dmamem(struct cmpci_softc *,
127 	void *);
128 
129 
130 /*
131  * interface to machine independent layer
132  */
133 static int cmpci_query_encoding(void *, struct audio_encoding *);
134 static int cmpci_set_params(void *, int, int, audio_params_t *,
135 	audio_params_t *, stream_filter_list_t *, stream_filter_list_t *);
136 static int cmpci_round_blocksize(void *, int, int, const audio_params_t *);
137 static int cmpci_halt_output(void *);
138 static int cmpci_halt_input(void *);
139 static int cmpci_getdev(void *, struct audio_device *);
140 static int cmpci_set_port(void *, mixer_ctrl_t *);
141 static int cmpci_get_port(void *, mixer_ctrl_t *);
142 static int cmpci_query_devinfo(void *, mixer_devinfo_t *);
143 static void *cmpci_allocm(void *, int, size_t, struct malloc_type *, int);
144 static void cmpci_freem(void *, void *, struct malloc_type *);
145 static size_t cmpci_round_buffersize(void *, int, size_t);
146 static paddr_t cmpci_mappage(void *, void *, off_t, int);
147 static int cmpci_get_props(void *);
148 static int cmpci_trigger_output(void *, void *, void *, int,
149 	void (*)(void *), void *, const audio_params_t *);
150 static int cmpci_trigger_input(void *, void *, void *, int,
151 	void (*)(void *), void *, const audio_params_t *);
152 
153 static const struct audio_hw_if cmpci_hw_if = {
154 	NULL,			/* open */
155 	NULL,			/* close */
156 	NULL,			/* drain */
157 	cmpci_query_encoding,	/* query_encoding */
158 	cmpci_set_params,	/* set_params */
159 	cmpci_round_blocksize,	/* round_blocksize */
160 	NULL,			/* commit_settings */
161 	NULL,			/* init_output */
162 	NULL,			/* init_input */
163 	NULL,			/* start_output */
164 	NULL,			/* start_input */
165 	cmpci_halt_output,	/* halt_output */
166 	cmpci_halt_input,	/* halt_input */
167 	NULL,			/* speaker_ctl */
168 	cmpci_getdev,		/* getdev */
169 	NULL,			/* setfd */
170 	cmpci_set_port,		/* set_port */
171 	cmpci_get_port,		/* get_port */
172 	cmpci_query_devinfo,	/* query_devinfo */
173 	cmpci_allocm,		/* allocm */
174 	cmpci_freem,		/* freem */
175 	cmpci_round_buffersize,/* round_buffersize */
176 	cmpci_mappage,		/* mappage */
177 	cmpci_get_props,	/* get_props */
178 	cmpci_trigger_output,	/* trigger_output */
179 	cmpci_trigger_input,	/* trigger_input */
180 	NULL,			/* dev_ioctl */
181 	NULL,			/* powerstate */
182 };
183 
184 #define CMPCI_NFORMATS	4
185 static const struct audio_format cmpci_formats[CMPCI_NFORMATS] = {
186 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
187 	 2, AUFMT_STEREO, 0, {5512, 48000}},
188 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
189 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
190 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
191 	 2, AUFMT_STEREO, 0, {5512, 48000}},
192 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
193 	 1, AUFMT_MONAURAL, 0, {5512, 48000}},
194 };
195 
196 
197 /*
198  * Low-level HW interface
199  */
200 
201 /* mixer register read/write */
202 static inline uint8_t
203 cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
204 {
205 	uint8_t ret;
206 
207 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
208 	delay(10);
209 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
210 	delay(10);
211 	return ret;
212 }
213 
214 static inline void
215 cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
216 {
217 
218 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
219 	delay(10);
220 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
221 	delay(10);
222 }
223 
224 
225 /* register partial write */
226 static inline void
227 cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
228 			  unsigned mask, unsigned val)
229 {
230 
231 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
232 	    (val<<shift) |
233 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
234 	delay(10);
235 }
236 
237 static inline void
238 cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
239 			  uint32_t mask, uint32_t val)
240 {
241 
242 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
243 	    (val<<shift) |
244 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
245 	delay(10);
246 }
247 
248 /* register set/clear bit */
249 static inline void
250 cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
251 {
252 
253 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
254 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
255 	delay(10);
256 }
257 
258 static inline void
259 cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
260 {
261 
262 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
263 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
264 	delay(10);
265 }
266 
267 static inline void
268 cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
269 {
270 
271 	/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
272 	KDASSERT(no != CMPCI_REG_MISC);
273 
274 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
275 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
276 	delay(10);
277 }
278 
279 static inline void
280 cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
281 {
282 
283 	/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
284 	KDASSERT(no != CMPCI_REG_MISC);
285 
286 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
287 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
288 	delay(10);
289 }
290 
291 /*
292  * The CMPCI_REG_MISC register needs special handling, since one of
293  * its bits has different read/write values.
294  */
295 static inline void
296 cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
297 {
298 
299 	sc->sc_reg_misc |= mask;
300 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
301 	    sc->sc_reg_misc);
302 	delay(10);
303 }
304 
305 static inline void
306 cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
307 {
308 
309 	sc->sc_reg_misc &= ~mask;
310 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
311 	    sc->sc_reg_misc);
312 	delay(10);
313 }
314 
315 /* rate */
316 static const struct {
317 	int rate;
318 	int divider;
319 } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
320 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
321 	_RATE(5512),
322 	_RATE(8000),
323 	_RATE(11025),
324 	_RATE(16000),
325 	_RATE(22050),
326 	_RATE(32000),
327 	_RATE(44100),
328 	_RATE(48000)
329 #undef	_RATE
330 };
331 
332 static int
333 cmpci_rate_to_index(int rate)
334 {
335 	int i;
336 
337 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
338 		if (rate <=
339 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
340 			return i;
341 	return i;  /* 48000 */
342 }
343 
344 static inline int
345 cmpci_index_to_rate(int index)
346 {
347 
348 	return cmpci_rate_table[index].rate;
349 }
350 
351 static inline int
352 cmpci_index_to_divider(int index)
353 {
354 
355 	return cmpci_rate_table[index].divider;
356 }
357 
358 /*
359  * interface to configure the device.
360  */
361 static int
362 cmpci_match(struct device *parent, struct cfdata *match,
363     void *aux)
364 {
365 	struct pci_attach_args *pa;
366 
367 	pa = (struct pci_attach_args *)aux;
368 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
369 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
370 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
371 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
372 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
373 		return 1;
374 
375 	return 0;
376 }
377 
378 static void
379 cmpci_attach(struct device *parent, struct device *self, void *aux)
380 {
381 	struct cmpci_softc *sc;
382 	struct pci_attach_args *pa;
383 	struct audio_attach_args aa;
384 	pci_intr_handle_t ih;
385 	char const *strintr;
386 	char devinfo[256];
387 	int i, v;
388 
389 	sc = (struct cmpci_softc *)self;
390 	pa = (struct pci_attach_args *)aux;
391 	aprint_naive(": Audio controller\n");
392 
393 	sc->sc_id = pa->pa_id;
394 	sc->sc_class = pa->pa_class;
395 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
396 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
397 	    PCI_REVISION(sc->sc_class));
398 	switch (PCI_PRODUCT(sc->sc_id)) {
399 	case PCI_PRODUCT_CMEDIA_CMI8338A:
400 		/*FALLTHROUGH*/
401 	case PCI_PRODUCT_CMEDIA_CMI8338B:
402 		sc->sc_capable = CMPCI_CAP_CMI8338;
403 		break;
404 	case PCI_PRODUCT_CMEDIA_CMI8738:
405 		/*FALLTHROUGH*/
406 	case PCI_PRODUCT_CMEDIA_CMI8738B:
407 		sc->sc_capable = CMPCI_CAP_CMI8738;
408 		break;
409 	}
410 
411 	/* map I/O space */
412 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
413 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
414 		aprint_error("%s: failed to map I/O space\n",
415 		    sc->sc_dev.dv_xname);
416 		return;
417 	}
418 
419 	/* interrupt */
420 	if (pci_intr_map(pa, &ih)) {
421 		aprint_error("%s: failed to map interrupt\n",
422 		    sc->sc_dev.dv_xname);
423 		return;
424 	}
425 	strintr = pci_intr_string(pa->pa_pc, ih);
426 	sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc);
427 	if (sc->sc_ih == NULL) {
428 		aprint_error("%s: failed to establish interrupt",
429 		    sc->sc_dev.dv_xname);
430 		if (strintr != NULL)
431 			aprint_normal(" at %s", strintr);
432 		aprint_normal("\n");
433 		return;
434 	}
435 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr);
436 
437 	sc->sc_dmat = pa->pa_dmat;
438 
439 	audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev);
440 
441 	/* attach OPL device */
442 	aa.type = AUDIODEV_TYPE_OPL;
443 	aa.hwif = NULL;
444 	aa.hdl = NULL;
445 	(void)config_found(&sc->sc_dev, &aa, audioprint);
446 
447 	/* attach MPU-401 device */
448 	aa.type = AUDIODEV_TYPE_MPU;
449 	aa.hwif = NULL;
450 	aa.hdl = NULL;
451 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
452 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
453 		sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
454 
455 	/* get initial value (this is 0 and may be omitted but just in case) */
456 	sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
457 	    CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
458 
459 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
460 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
461 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
462 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
463 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
464 	for (i = 0; i < CMPCI_NDEVS; i++) {
465 		switch(i) {
466 		/*
467 		 * CMI8738 defaults are
468 		 *  master:	0xe0	(0x00 - 0xf8)
469 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
470 		 *  PC speaker:	0x80	(0x00 - 0xc0)
471 		 *  others:	0
472 		 */
473 		/* volume */
474 		case CMPCI_MASTER_VOL:
475 			v = 128;	/* 224 */
476 			break;
477 		case CMPCI_FM_VOL:
478 		case CMPCI_DAC_VOL:
479 			v = 192;
480 			break;
481 		case CMPCI_PCSPEAKER:
482 			v = 128;
483 			break;
484 
485 		/* booleans, set to true */
486 		case CMPCI_CD_MUTE:
487 		case CMPCI_MIC_MUTE:
488 		case CMPCI_LINE_IN_MUTE:
489 		case CMPCI_AUX_IN_MUTE:
490 			v = 1;
491 			break;
492 
493 		/* volume with inital value 0 */
494 		case CMPCI_CD_VOL:
495 		case CMPCI_LINE_IN_VOL:
496 		case CMPCI_AUX_IN_VOL:
497 		case CMPCI_MIC_VOL:
498 		case CMPCI_MIC_RECVOL:
499 			/* FALLTHROUGH */
500 
501 		/* others are cleared */
502 		case CMPCI_MIC_PREAMP:
503 		case CMPCI_RECORD_SOURCE:
504 		case CMPCI_PLAYBACK_MODE:
505 		case CMPCI_SPDIF_IN_SELECT:
506 		case CMPCI_SPDIF_IN_PHASE:
507 		case CMPCI_SPDIF_LOOP:
508 		case CMPCI_SPDIF_OUT_PLAYBACK:
509 		case CMPCI_SPDIF_OUT_VOLTAGE:
510 		case CMPCI_MONITOR_DAC:
511 		case CMPCI_REAR:
512 		case CMPCI_INDIVIDUAL:
513 		case CMPCI_REVERSE:
514 		case CMPCI_SURROUND:
515 		default:
516 			v = 0;
517 			break;
518 		}
519 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
520 		cmpci_set_mixer_gain(sc, i);
521 	}
522 }
523 
524 static int
525 cmpci_intr(void *handle)
526 {
527 	struct cmpci_softc *sc;
528 	uint32_t intrstat;
529 
530 	sc = handle;
531 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
532 	    CMPCI_REG_INTR_STATUS);
533 
534 	if (!(intrstat & CMPCI_REG_ANY_INTR))
535 		return 0;
536 
537 	delay(10);
538 
539 	/* disable and reset intr */
540 	if (intrstat & CMPCI_REG_CH0_INTR)
541 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
542 		   CMPCI_REG_CH0_INTR_ENABLE);
543 	if (intrstat & CMPCI_REG_CH1_INTR)
544 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
545 		    CMPCI_REG_CH1_INTR_ENABLE);
546 
547 	if (intrstat & CMPCI_REG_CH0_INTR) {
548 		if (sc->sc_play.intr != NULL)
549 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
550 	}
551 	if (intrstat & CMPCI_REG_CH1_INTR) {
552 		if (sc->sc_rec.intr != NULL)
553 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
554 	}
555 
556 	/* enable intr */
557 	if (intrstat & CMPCI_REG_CH0_INTR)
558 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
559 		    CMPCI_REG_CH0_INTR_ENABLE);
560 	if (intrstat & CMPCI_REG_CH1_INTR)
561 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
562 		    CMPCI_REG_CH1_INTR_ENABLE);
563 
564 #if NMPU > 0
565 	if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL)
566 		mpu_intr(sc->sc_mpudev);
567 #endif
568 
569 	return 1;
570 }
571 
572 static int
573 cmpci_query_encoding(void *handle, struct audio_encoding *fp)
574 {
575 
576 	switch (fp->index) {
577 	case 0:
578 		strcpy(fp->name, AudioEulinear);
579 		fp->encoding = AUDIO_ENCODING_ULINEAR;
580 		fp->precision = 8;
581 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
582 		break;
583 	case 1:
584 		strcpy(fp->name, AudioEmulaw);
585 		fp->encoding = AUDIO_ENCODING_ULAW;
586 		fp->precision = 8;
587 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
588 		break;
589 	case 2:
590 		strcpy(fp->name, AudioEalaw);
591 		fp->encoding = AUDIO_ENCODING_ALAW;
592 		fp->precision = 8;
593 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
594 		break;
595 	case 3:
596 		strcpy(fp->name, AudioEslinear);
597 		fp->encoding = AUDIO_ENCODING_SLINEAR;
598 		fp->precision = 8;
599 		fp->flags = 0;
600 		break;
601 	case 4:
602 		strcpy(fp->name, AudioEslinear_le);
603 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
604 		fp->precision = 16;
605 		fp->flags = 0;
606 		break;
607 	case 5:
608 		strcpy(fp->name, AudioEulinear_le);
609 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
610 		fp->precision = 16;
611 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
612 		break;
613 	case 6:
614 		strcpy(fp->name, AudioEslinear_be);
615 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
616 		fp->precision = 16;
617 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
618 		break;
619 	case 7:
620 		strcpy(fp->name, AudioEulinear_be);
621 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
622 		fp->precision = 16;
623 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
624 		break;
625 	default:
626 		return EINVAL;
627 	}
628 	return 0;
629 }
630 
631 
632 static int
633 cmpci_set_params(void *handle, int setmode, int usemode,
634     audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
635     stream_filter_list_t *rfil)
636 {
637 	int i;
638 	struct cmpci_softc *sc;
639 
640 	sc = handle;
641 	for (i = 0; i < 2; i++) {
642 		int md_format;
643 		int md_divide;
644 		int md_index;
645 		int mode;
646 		audio_params_t *p;
647 		stream_filter_list_t *fil;
648 		int ind;
649 
650 		switch (i) {
651 		case 0:
652 			mode = AUMODE_PLAY;
653 			p = play;
654 			fil = pfil;
655 			break;
656 		case 1:
657 			mode = AUMODE_RECORD;
658 			p = rec;
659 			fil = rfil;
660 			break;
661 		default:
662 			return EINVAL;
663 		}
664 
665 		if (!(setmode & mode))
666 			continue;
667 
668 		md_index = cmpci_rate_to_index(p->sample_rate);
669 		md_divide = cmpci_index_to_divider(md_index);
670 		p->sample_rate = cmpci_index_to_rate(md_index);
671 		DPRINTF(("%s: sample:%u, divider=%d\n",
672 			 sc->sc_dev.dv_xname, p->sample_rate, md_divide));
673 
674 		ind = auconv_set_converter(cmpci_formats, CMPCI_NFORMATS,
675 					   mode, p, FALSE, fil);
676 		if (ind < 0)
677 			return EINVAL;
678 		if (fil->req_size > 0)
679 			p = &fil->filters[0].param;
680 
681 		/* format */
682 		md_format = p->channels == 1
683 			? CMPCI_REG_FORMAT_MONO : CMPCI_REG_FORMAT_STEREO;
684 		md_format |= p->precision == 16
685 			? CMPCI_REG_FORMAT_16BIT : CMPCI_REG_FORMAT_8BIT;
686 		if (mode & AUMODE_PLAY) {
687 			cmpci_reg_partial_write_4(sc,
688 			   CMPCI_REG_CHANNEL_FORMAT,
689 			   CMPCI_REG_CH0_FORMAT_SHIFT,
690 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
691 			cmpci_reg_partial_write_4(sc,
692 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
693 			    CMPCI_REG_DAC_FS_MASK, md_divide);
694 			sc->sc_play.md_divide = md_divide;
695 		} else {
696 			cmpci_reg_partial_write_4(sc,
697 			   CMPCI_REG_CHANNEL_FORMAT,
698 			   CMPCI_REG_CH1_FORMAT_SHIFT,
699 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
700 			cmpci_reg_partial_write_4(sc,
701 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
702 			    CMPCI_REG_ADC_FS_MASK, md_divide);
703 			sc->sc_rec.md_divide = md_divide;
704 		}
705 		cmpci_set_out_ports(sc);
706 		cmpci_set_in_ports(sc);
707 	}
708 	return 0;
709 }
710 
711 /* ARGSUSED */
712 static int
713 cmpci_round_blocksize(void *handle, int block,
714     int mode, const audio_params_t *param)
715 {
716 
717 	return block & -4;
718 }
719 
720 static int
721 cmpci_halt_output(void *handle)
722 {
723 	struct cmpci_softc *sc;
724 	int s;
725 
726 	sc = handle;
727 	s = splaudio();
728 	sc->sc_play.intr = NULL;
729 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
730 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
731 	/* wait for reset DMA */
732 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
733 	delay(10);
734 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
735 	splx(s);
736 
737 	return 0;
738 }
739 
740 static int
741 cmpci_halt_input(void *handle)
742 {
743 	struct cmpci_softc *sc;
744 	int s;
745 
746 	sc = handle;
747 	s = splaudio();
748 	sc->sc_rec.intr = NULL;
749 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
750 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
751 	/* wait for reset DMA */
752 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
753 	delay(10);
754 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
755 	splx(s);
756 
757 	return 0;
758 }
759 
760 /* get audio device information */
761 static int
762 cmpci_getdev(void *handle, struct audio_device *ad)
763 {
764 	struct cmpci_softc *sc;
765 
766 	sc = handle;
767 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
768 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
769 		 PCI_REVISION(sc->sc_class));
770 	switch (PCI_PRODUCT(sc->sc_id)) {
771 	case PCI_PRODUCT_CMEDIA_CMI8338A:
772 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
773 		break;
774 	case PCI_PRODUCT_CMEDIA_CMI8338B:
775 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
776 		break;
777 	case PCI_PRODUCT_CMEDIA_CMI8738:
778 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
779 		break;
780 	case PCI_PRODUCT_CMEDIA_CMI8738B:
781 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
782 		break;
783 	default:
784 		strncpy(ad->config, "unknown", sizeof(ad->config));
785 	}
786 
787 	return 0;
788 }
789 
790 /* mixer device information */
791 int
792 cmpci_query_devinfo(void *handle, mixer_devinfo_t *dip)
793 {
794 	static const char *const mixer_port_names[] = {
795 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
796 		AudioNmicrophone
797 	};
798 	static const char *const mixer_classes[] = {
799 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
800 		CmpciCspdif
801 	};
802 	struct cmpci_softc *sc;
803 	int i;
804 
805 	sc = handle;
806 	dip->prev = dip->next = AUDIO_MIXER_LAST;
807 
808 	switch (dip->index) {
809 	case CMPCI_INPUT_CLASS:
810 	case CMPCI_OUTPUT_CLASS:
811 	case CMPCI_RECORD_CLASS:
812 	case CMPCI_PLAYBACK_CLASS:
813 	case CMPCI_SPDIF_CLASS:
814 		dip->type = AUDIO_MIXER_CLASS;
815 		dip->mixer_class = dip->index;
816 		strcpy(dip->label.name,
817 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
818 		return 0;
819 
820 	case CMPCI_AUX_IN_VOL:
821 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
822 		goto vol1;
823 	case CMPCI_DAC_VOL:
824 	case CMPCI_FM_VOL:
825 	case CMPCI_CD_VOL:
826 	case CMPCI_LINE_IN_VOL:
827 	case CMPCI_MIC_VOL:
828 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
829 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
830 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
831 		strcpy(dip->label.name, mixer_port_names[dip->index]);
832 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
833 	vol:
834 		dip->type = AUDIO_MIXER_VALUE;
835 		strcpy(dip->un.v.units.name, AudioNvolume);
836 		return 0;
837 
838 	case CMPCI_MIC_MUTE:
839 		dip->next = CMPCI_MIC_PREAMP;
840 		/* FALLTHROUGH */
841 	case CMPCI_DAC_MUTE:
842 	case CMPCI_FM_MUTE:
843 	case CMPCI_CD_MUTE:
844 	case CMPCI_LINE_IN_MUTE:
845 	case CMPCI_AUX_IN_MUTE:
846 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
847 		dip->mixer_class = CMPCI_INPUT_CLASS;
848 		strcpy(dip->label.name, AudioNmute);
849 		goto on_off;
850 	on_off:
851 		dip->type = AUDIO_MIXER_ENUM;
852 		dip->un.e.num_mem = 2;
853 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
854 		dip->un.e.member[0].ord = 0;
855 		strcpy(dip->un.e.member[1].label.name, AudioNon);
856 		dip->un.e.member[1].ord = 1;
857 		return 0;
858 
859 	case CMPCI_MIC_PREAMP:
860 		dip->mixer_class = CMPCI_INPUT_CLASS;
861 		dip->prev = CMPCI_MIC_MUTE;
862 		strcpy(dip->label.name, AudioNpreamp);
863 		goto on_off;
864 	case CMPCI_PCSPEAKER:
865 		dip->mixer_class = CMPCI_INPUT_CLASS;
866 		strcpy(dip->label.name, AudioNspeaker);
867 		dip->un.v.num_channels = 1;
868 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
869 		goto vol;
870 	case CMPCI_RECORD_SOURCE:
871 		dip->mixer_class = CMPCI_RECORD_CLASS;
872 		strcpy(dip->label.name, AudioNsource);
873 		dip->type = AUDIO_MIXER_SET;
874 		dip->un.s.num_mem = 7;
875 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
876 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
877 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
878 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
879 		strcpy(dip->un.s.member[2].label.name, AudioNline);
880 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
881 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
882 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
883 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
884 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
885 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
886 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
887 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
888 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
889 		return 0;
890 	case CMPCI_MIC_RECVOL:
891 		dip->mixer_class = CMPCI_RECORD_CLASS;
892 		strcpy(dip->label.name, AudioNmicrophone);
893 		dip->un.v.num_channels = 1;
894 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
895 		goto vol;
896 
897 	case CMPCI_PLAYBACK_MODE:
898 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
899 		dip->type = AUDIO_MIXER_ENUM;
900 		strcpy(dip->label.name, AudioNmode);
901 		dip->un.e.num_mem = 2;
902 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
903 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
904 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
905 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
906 		return 0;
907 	case CMPCI_SPDIF_IN_SELECT:
908 		dip->mixer_class = CMPCI_SPDIF_CLASS;
909 		dip->type = AUDIO_MIXER_ENUM;
910 		dip->next = CMPCI_SPDIF_IN_PHASE;
911 		strcpy(dip->label.name, AudioNinput);
912 		i = 0;
913 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
914 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
915 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
916 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
917 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
918 		}
919 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
920 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
921 		dip->un.e.num_mem = i;
922 		return 0;
923 	case CMPCI_SPDIF_IN_PHASE:
924 		dip->mixer_class = CMPCI_SPDIF_CLASS;
925 		dip->prev = CMPCI_SPDIF_IN_SELECT;
926 		strcpy(dip->label.name, CmpciNphase);
927 		dip->type = AUDIO_MIXER_ENUM;
928 		dip->un.e.num_mem = 2;
929 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
930 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
931 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
932 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
933 		return 0;
934 	case CMPCI_SPDIF_LOOP:
935 		dip->mixer_class = CMPCI_SPDIF_CLASS;
936 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
937 		strcpy(dip->label.name, AudioNoutput);
938 		dip->type = AUDIO_MIXER_ENUM;
939 		dip->un.e.num_mem = 2;
940 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
941 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
942 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
943 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
944 		return 0;
945 	case CMPCI_SPDIF_OUT_PLAYBACK:
946 		dip->mixer_class = CMPCI_SPDIF_CLASS;
947 		dip->prev = CMPCI_SPDIF_LOOP;
948 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
949 		strcpy(dip->label.name, CmpciNplayback);
950 		dip->type = AUDIO_MIXER_ENUM;
951 		dip->un.e.num_mem = 2;
952 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
953 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
954 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
955 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
956 		return 0;
957 	case CMPCI_SPDIF_OUT_VOLTAGE:
958 		dip->mixer_class = CMPCI_SPDIF_CLASS;
959 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
960 		strcpy(dip->label.name, CmpciNvoltage);
961 		dip->type = AUDIO_MIXER_ENUM;
962 		dip->un.e.num_mem = 2;
963 		strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
964 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
965 		strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
966 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
967 		return 0;
968 	case CMPCI_MONITOR_DAC:
969 		dip->mixer_class = CMPCI_SPDIF_CLASS;
970 		strcpy(dip->label.name, AudioNmonitor);
971 		dip->type = AUDIO_MIXER_ENUM;
972 		dip->un.e.num_mem = 3;
973 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
974 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
975 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
976 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
977 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
978 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
979 		return 0;
980 
981 	case CMPCI_MASTER_VOL:
982 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
983 		strcpy(dip->label.name, AudioNmaster);
984 		dip->un.v.num_channels = 2;
985 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
986 		goto vol;
987 	case CMPCI_REAR:
988 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
989 		dip->next = CMPCI_INDIVIDUAL;
990 		strcpy(dip->label.name, CmpciNrear);
991 		goto on_off;
992 	case CMPCI_INDIVIDUAL:
993 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
994 		dip->prev = CMPCI_REAR;
995 		dip->next = CMPCI_REVERSE;
996 		strcpy(dip->label.name, CmpciNindividual);
997 		goto on_off;
998 	case CMPCI_REVERSE:
999 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1000 		dip->prev = CMPCI_INDIVIDUAL;
1001 		strcpy(dip->label.name, CmpciNreverse);
1002 		goto on_off;
1003 	case CMPCI_SURROUND:
1004 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1005 		strcpy(dip->label.name, CmpciNsurround);
1006 		goto on_off;
1007 	}
1008 
1009 	return ENXIO;
1010 }
1011 
1012 static int
1013 cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, struct malloc_type *type,
1014 		   int flags, void **r_addr)
1015 {
1016 	int error;
1017 	struct cmpci_dmanode *n;
1018 	int w;
1019 
1020 	error = 0;
1021 	n = malloc(sizeof(struct cmpci_dmanode), type, flags);
1022 	if (n == NULL) {
1023 		error = ENOMEM;
1024 		goto quit;
1025 	}
1026 
1027 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
1028 #define CMPCI_DMABUF_ALIGN    0x4
1029 #define CMPCI_DMABUF_BOUNDARY 0x0
1030 	n->cd_tag = sc->sc_dmat;
1031 	n->cd_size = size;
1032 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
1033 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
1034 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w);
1035 	if (error)
1036 		goto mfree;
1037 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
1038 	    &n->cd_addr, w | BUS_DMA_COHERENT);
1039 	if (error)
1040 		goto dmafree;
1041 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
1042 	    w, &n->cd_map);
1043 	if (error)
1044 		goto unmap;
1045 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
1046 	    NULL, w);
1047 	if (error)
1048 		goto destroy;
1049 
1050 	n->cd_next = sc->sc_dmap;
1051 	sc->sc_dmap = n;
1052 	*r_addr = KVADDR(n);
1053 	return 0;
1054 
1055  destroy:
1056 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
1057  unmap:
1058 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1059  dmafree:
1060 	bus_dmamem_free(n->cd_tag,
1061 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1062  mfree:
1063 	free(n, type);
1064  quit:
1065 	return error;
1066 }
1067 
1068 static int
1069 cmpci_free_dmamem(struct cmpci_softc *sc, void *addr, struct malloc_type *type)
1070 {
1071 	struct cmpci_dmanode **nnp;
1072 
1073 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
1074 		if ((*nnp)->cd_addr == addr) {
1075 			struct cmpci_dmanode *n = *nnp;
1076 			bus_dmamap_unload(n->cd_tag, n->cd_map);
1077 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
1078 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1079 			bus_dmamem_free(n->cd_tag, n->cd_segs,
1080 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1081 			free(n, type);
1082 			return 0;
1083 		}
1084 	}
1085 	return -1;
1086 }
1087 
1088 static struct cmpci_dmanode *
1089 cmpci_find_dmamem(struct cmpci_softc *sc, void *addr)
1090 {
1091 	struct cmpci_dmanode *p;
1092 
1093 	for (p = sc->sc_dmap; p; p = p->cd_next)
1094 		if (KVADDR(p) == (void *)addr)
1095 			break;
1096 	return p;
1097 }
1098 
1099 #if 0
1100 static void
1101 cmpci_print_dmamem(struct cmpci_dmanode *);
1102 static void
1103 cmpci_print_dmamem(struct cmpci_dmanode *p)
1104 {
1105 
1106 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
1107 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
1108 		 (void *)DMAADDR(p), (void *)p->cd_size));
1109 }
1110 #endif /* DEBUG */
1111 
1112 static void *
1113 cmpci_allocm(void *handle, int direction, size_t size,
1114 	     struct malloc_type *type, int flags)
1115 {
1116 	void *addr;
1117 
1118 	addr = NULL;	/* XXX gcc */
1119 
1120 	if (cmpci_alloc_dmamem(handle, size, type, flags, &addr))
1121 		return NULL;
1122 	return addr;
1123 }
1124 
1125 static void
1126 cmpci_freem(void *handle, void *addr, struct malloc_type *type)
1127 {
1128 
1129 	cmpci_free_dmamem(handle, addr, type);
1130 }
1131 
1132 #define MAXVAL 256
1133 static int
1134 cmpci_adjust(int val, int mask)
1135 {
1136 
1137 	val += (MAXVAL - mask) >> 1;
1138 	if (val >= MAXVAL)
1139 		val = MAXVAL-1;
1140 	return val & mask;
1141 }
1142 
1143 static void
1144 cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
1145 {
1146 	int src;
1147 	int bits, mask;
1148 
1149 	switch (port) {
1150 	case CMPCI_MIC_VOL:
1151 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
1152 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1153 		return;
1154 	case CMPCI_MASTER_VOL:
1155 		src = CMPCI_SB16_MIXER_MASTER_L;
1156 		break;
1157 	case CMPCI_LINE_IN_VOL:
1158 		src = CMPCI_SB16_MIXER_LINE_L;
1159 		break;
1160 	case CMPCI_AUX_IN_VOL:
1161 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
1162 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
1163 					      sc->sc_gain[port][CMPCI_RIGHT]));
1164 		return;
1165 	case CMPCI_MIC_RECVOL:
1166 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
1167 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
1168 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1169 		return;
1170 	case CMPCI_DAC_VOL:
1171 		src = CMPCI_SB16_MIXER_VOICE_L;
1172 		break;
1173 	case CMPCI_FM_VOL:
1174 		src = CMPCI_SB16_MIXER_FM_L;
1175 		break;
1176 	case CMPCI_CD_VOL:
1177 		src = CMPCI_SB16_MIXER_CDDA_L;
1178 		break;
1179 	case CMPCI_PCSPEAKER:
1180 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
1181 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1182 		return;
1183 	case CMPCI_MIC_PREAMP:
1184 		if (sc->sc_gain[port][CMPCI_LR])
1185 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1186 			    CMPCI_REG_MICGAINZ);
1187 		else
1188 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1189 			    CMPCI_REG_MICGAINZ);
1190 		return;
1191 
1192 	case CMPCI_DAC_MUTE:
1193 		if (sc->sc_gain[port][CMPCI_LR])
1194 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1195 			    CMPCI_REG_WSMUTE);
1196 		else
1197 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1198 			    CMPCI_REG_WSMUTE);
1199 		return;
1200 	case CMPCI_FM_MUTE:
1201 		if (sc->sc_gain[port][CMPCI_LR])
1202 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1203 			    CMPCI_REG_FMMUTE);
1204 		else
1205 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1206 			    CMPCI_REG_FMMUTE);
1207 		return;
1208 	case CMPCI_AUX_IN_MUTE:
1209 		if (sc->sc_gain[port][CMPCI_LR])
1210 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1211 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1212 		else
1213 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1214 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1215 		return;
1216 	case CMPCI_CD_MUTE:
1217 		mask = CMPCI_SB16_SW_CD;
1218 		goto sbmute;
1219 	case CMPCI_MIC_MUTE:
1220 		mask = CMPCI_SB16_SW_MIC;
1221 		goto sbmute;
1222 	case CMPCI_LINE_IN_MUTE:
1223 		mask = CMPCI_SB16_SW_LINE;
1224 	sbmute:
1225 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
1226 		if (sc->sc_gain[port][CMPCI_LR])
1227 			bits = bits & ~mask;
1228 		else
1229 			bits = bits | mask;
1230 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
1231 		return;
1232 
1233 	case CMPCI_SPDIF_IN_SELECT:
1234 	case CMPCI_MONITOR_DAC:
1235 	case CMPCI_PLAYBACK_MODE:
1236 	case CMPCI_SPDIF_LOOP:
1237 	case CMPCI_SPDIF_OUT_PLAYBACK:
1238 		cmpci_set_out_ports(sc);
1239 		return;
1240 	case CMPCI_SPDIF_OUT_VOLTAGE:
1241 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
1242 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
1243 			    == CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
1244 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
1245 			else
1246 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
1247 		}
1248 		return;
1249 	case CMPCI_SURROUND:
1250 		if (CMPCI_ISCAP(sc, SURROUND)) {
1251 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
1252 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1253 						CMPCI_REG_SURROUND);
1254 			else
1255 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1256 						  CMPCI_REG_SURROUND);
1257 		}
1258 		return;
1259 	case CMPCI_REAR:
1260 		if (CMPCI_ISCAP(sc, REAR)) {
1261 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1262 				cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
1263 			else
1264 				cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
1265 		}
1266 		return;
1267 	case CMPCI_INDIVIDUAL:
1268 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
1269 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1270 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1271 						CMPCI_REG_INDIVIDUAL);
1272 			else
1273 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1274 						  CMPCI_REG_INDIVIDUAL);
1275 		}
1276 		return;
1277 	case CMPCI_REVERSE:
1278 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
1279 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
1280 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1281 						CMPCI_REG_REVERSE_FR);
1282 			else
1283 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1284 						  CMPCI_REG_REVERSE_FR);
1285 		}
1286 		return;
1287 	case CMPCI_SPDIF_IN_PHASE:
1288 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
1289 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
1290 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
1291 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1292 						  CMPCI_REG_SPDIN_PHASE);
1293 			else
1294 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1295 						CMPCI_REG_SPDIN_PHASE);
1296 		}
1297 		return;
1298 	default:
1299 		return;
1300 	}
1301 
1302 	cmpci_mixerreg_write(sc, src,
1303 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
1304 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
1305 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
1306 }
1307 
1308 static void
1309 cmpci_set_out_ports(struct cmpci_softc *sc)
1310 {
1311 	uint8_t v;
1312 	int enspdout;
1313 
1314 	if (!CMPCI_ISCAP(sc, SPDLOOP))
1315 		return;
1316 
1317 	/* SPDIF/out select */
1318 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
1319 		/* playback */
1320 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1321 	} else {
1322 		/* monitor SPDIF/in */
1323 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1324 	}
1325 
1326 	/* SPDIF in select */
1327 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
1328 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
1329 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
1330 	else
1331 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
1332 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
1333 		cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
1334 	else
1335 		cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
1336 
1337 	enspdout = 0;
1338 	/* playback to ... */
1339 	if (CMPCI_ISCAP(sc, SPDOUT) &&
1340 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
1341 		== CMPCI_PLAYBACK_MODE_SPDIF &&
1342 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
1343 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
1344 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
1345 		/* playback to SPDIF */
1346 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
1347 		enspdout = 1;
1348 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
1349 			cmpci_reg_set_reg_misc(sc,
1350 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1351 		else
1352 			cmpci_reg_clear_reg_misc(sc,
1353 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1354 	} else {
1355 		/* playback to DAC */
1356 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1357 				  CMPCI_REG_SPDIF0_ENABLE);
1358 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
1359 			cmpci_reg_clear_reg_misc(sc,
1360 				CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
1361 	}
1362 
1363 	/* legacy to SPDIF/out or not */
1364 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
1365 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
1366 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
1367 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1368 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
1369 		else {
1370 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1371 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
1372 			enspdout = 1;
1373 		}
1374 	}
1375 
1376 	/* enable/disable SPDIF/out */
1377 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
1378 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1379 				CMPCI_REG_XSPDIF_ENABLE);
1380 	else
1381 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1382 				CMPCI_REG_XSPDIF_ENABLE);
1383 
1384 	/* SPDIF monitor (digital to analog output) */
1385 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
1386 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
1387 		if (!(v & CMPCI_MONDAC_ENABLE))
1388 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1389 					CMPCI_REG_SPDIN_MONITOR);
1390 		if (v & CMPCI_MONDAC_SPDOUT)
1391 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
1392 					CMPCI_REG_SPDIFOUT_DAC);
1393 		else
1394 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1395 					CMPCI_REG_SPDIFOUT_DAC);
1396 		if (v & CMPCI_MONDAC_ENABLE)
1397 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1398 					CMPCI_REG_SPDIN_MONITOR);
1399 	}
1400 }
1401 
1402 static int
1403 cmpci_set_in_ports(struct cmpci_softc *sc)
1404 {
1405 	int mask;
1406 	int bitsl, bitsr;
1407 
1408 	mask = sc->sc_in_mask;
1409 
1410 	/*
1411 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
1412 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
1413 	 * of the mixer register.
1414 	 */
1415 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1416 	    CMPCI_RECORD_SOURCE_FM);
1417 
1418 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
1419 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
1420 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
1421 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
1422 	}
1423 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
1424 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
1425 
1426 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
1427 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1428 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1429 	else
1430 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1431 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1432 
1433 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
1434 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1435 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1436 	else
1437 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1438 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1439 
1440 	if (CMPCI_ISCAP(sc, SPDIN) &&
1441 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
1442 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
1443 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
1444 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
1445 			/* enable SPDIF/in */
1446 			cmpci_reg_set_4(sc,
1447 					CMPCI_REG_FUNC_1,
1448 					CMPCI_REG_SPDIF1_ENABLE);
1449 		} else {
1450 			cmpci_reg_clear_4(sc,
1451 					CMPCI_REG_FUNC_1,
1452 					CMPCI_REG_SPDIF1_ENABLE);
1453 		}
1454 	}
1455 
1456 	return 0;
1457 }
1458 
1459 static int
1460 cmpci_set_port(void *handle, mixer_ctrl_t *cp)
1461 {
1462 	struct cmpci_softc *sc;
1463 	int lgain, rgain;
1464 
1465 	sc = handle;
1466 	switch (cp->dev) {
1467 	case CMPCI_MIC_VOL:
1468 	case CMPCI_PCSPEAKER:
1469 	case CMPCI_MIC_RECVOL:
1470 		if (cp->un.value.num_channels != 1)
1471 			return EINVAL;
1472 		/* FALLTHROUGH */
1473 	case CMPCI_DAC_VOL:
1474 	case CMPCI_FM_VOL:
1475 	case CMPCI_CD_VOL:
1476 	case CMPCI_LINE_IN_VOL:
1477 	case CMPCI_AUX_IN_VOL:
1478 	case CMPCI_MASTER_VOL:
1479 		if (cp->type != AUDIO_MIXER_VALUE)
1480 			return EINVAL;
1481 		switch (cp->un.value.num_channels) {
1482 		case 1:
1483 			lgain = rgain =
1484 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
1485 			break;
1486 		case 2:
1487 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
1488 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
1489 			break;
1490 		default:
1491 			return EINVAL;
1492 		}
1493 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
1494 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
1495 
1496 		cmpci_set_mixer_gain(sc, cp->dev);
1497 		break;
1498 
1499 	case CMPCI_RECORD_SOURCE:
1500 		if (cp->type != AUDIO_MIXER_SET)
1501 			return EINVAL;
1502 
1503 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
1504 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1505 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
1506 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
1507 			return EINVAL;
1508 
1509 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
1510 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
1511 
1512 		sc->sc_in_mask = cp->un.mask;
1513 		return cmpci_set_in_ports(sc);
1514 
1515 	/* boolean */
1516 	case CMPCI_DAC_MUTE:
1517 	case CMPCI_FM_MUTE:
1518 	case CMPCI_CD_MUTE:
1519 	case CMPCI_LINE_IN_MUTE:
1520 	case CMPCI_AUX_IN_MUTE:
1521 	case CMPCI_MIC_MUTE:
1522 	case CMPCI_MIC_PREAMP:
1523 	case CMPCI_PLAYBACK_MODE:
1524 	case CMPCI_SPDIF_IN_PHASE:
1525 	case CMPCI_SPDIF_LOOP:
1526 	case CMPCI_SPDIF_OUT_PLAYBACK:
1527 	case CMPCI_SPDIF_OUT_VOLTAGE:
1528 	case CMPCI_REAR:
1529 	case CMPCI_INDIVIDUAL:
1530 	case CMPCI_REVERSE:
1531 	case CMPCI_SURROUND:
1532 		if (cp->type != AUDIO_MIXER_ENUM)
1533 			return EINVAL;
1534 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
1535 		cmpci_set_mixer_gain(sc, cp->dev);
1536 		break;
1537 
1538 	case CMPCI_SPDIF_IN_SELECT:
1539 		switch (cp->un.ord) {
1540 		case CMPCI_SPDIF_IN_SPDIN1:
1541 		case CMPCI_SPDIF_IN_SPDIN2:
1542 		case CMPCI_SPDIF_IN_SPDOUT:
1543 			break;
1544 		default:
1545 			return EINVAL;
1546 		}
1547 		goto xenum;
1548 	case CMPCI_MONITOR_DAC:
1549 		switch (cp->un.ord) {
1550 		case CMPCI_MONITOR_DAC_OFF:
1551 		case CMPCI_MONITOR_DAC_SPDIN:
1552 		case CMPCI_MONITOR_DAC_SPDOUT:
1553 			break;
1554 		default:
1555 			return EINVAL;
1556 		}
1557 	xenum:
1558 		if (cp->type != AUDIO_MIXER_ENUM)
1559 			return EINVAL;
1560 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
1561 		cmpci_set_mixer_gain(sc, cp->dev);
1562 		break;
1563 
1564 	default:
1565 	    return EINVAL;
1566 	}
1567 
1568 	return 0;
1569 }
1570 
1571 static int
1572 cmpci_get_port(void *handle, mixer_ctrl_t *cp)
1573 {
1574 	struct cmpci_softc *sc;
1575 
1576 	sc = handle;
1577 	switch (cp->dev) {
1578 	case CMPCI_MIC_VOL:
1579 	case CMPCI_PCSPEAKER:
1580 	case CMPCI_MIC_RECVOL:
1581 		if (cp->un.value.num_channels != 1)
1582 			return EINVAL;
1583 		/*FALLTHROUGH*/
1584 	case CMPCI_DAC_VOL:
1585 	case CMPCI_FM_VOL:
1586 	case CMPCI_CD_VOL:
1587 	case CMPCI_LINE_IN_VOL:
1588 	case CMPCI_AUX_IN_VOL:
1589 	case CMPCI_MASTER_VOL:
1590 		switch (cp->un.value.num_channels) {
1591 		case 1:
1592 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1593 				sc->sc_gain[cp->dev][CMPCI_LEFT];
1594 			break;
1595 		case 2:
1596 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1597 				sc->sc_gain[cp->dev][CMPCI_LEFT];
1598 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1599 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
1600 			break;
1601 		default:
1602 			return EINVAL;
1603 		}
1604 		break;
1605 
1606 	case CMPCI_RECORD_SOURCE:
1607 		cp->un.mask = sc->sc_in_mask;
1608 		break;
1609 
1610 	case CMPCI_DAC_MUTE:
1611 	case CMPCI_FM_MUTE:
1612 	case CMPCI_CD_MUTE:
1613 	case CMPCI_LINE_IN_MUTE:
1614 	case CMPCI_AUX_IN_MUTE:
1615 	case CMPCI_MIC_MUTE:
1616 	case CMPCI_MIC_PREAMP:
1617 	case CMPCI_PLAYBACK_MODE:
1618 	case CMPCI_SPDIF_IN_SELECT:
1619 	case CMPCI_SPDIF_IN_PHASE:
1620 	case CMPCI_SPDIF_LOOP:
1621 	case CMPCI_SPDIF_OUT_PLAYBACK:
1622 	case CMPCI_SPDIF_OUT_VOLTAGE:
1623 	case CMPCI_MONITOR_DAC:
1624 	case CMPCI_REAR:
1625 	case CMPCI_INDIVIDUAL:
1626 	case CMPCI_REVERSE:
1627 	case CMPCI_SURROUND:
1628 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
1629 		break;
1630 
1631 	default:
1632 		return EINVAL;
1633 	}
1634 
1635 	return 0;
1636 }
1637 
1638 /* ARGSUSED */
1639 static size_t
1640 cmpci_round_buffersize(void *handle, int direction,
1641     size_t bufsize)
1642 {
1643 
1644 	if (bufsize > 0x10000)
1645 		bufsize = 0x10000;
1646 
1647 	return bufsize;
1648 }
1649 
1650 static paddr_t
1651 cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
1652 {
1653 	struct cmpci_dmanode *p;
1654 
1655 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(handle, addr)))
1656 		return -1;
1657 
1658 	return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
1659 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
1660 		   offset, prot, BUS_DMA_WAITOK);
1661 }
1662 
1663 /* ARGSUSED */
1664 static int
1665 cmpci_get_props(void *handle)
1666 {
1667 
1668 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1669 }
1670 
1671 static int
1672 cmpci_trigger_output(void *handle, void *start, void *end, int blksize,
1673 		     void (*intr)(void *), void *arg,
1674 		     const audio_params_t *param)
1675 {
1676 	struct cmpci_softc *sc;
1677 	struct cmpci_dmanode *p;
1678 	int bps;
1679 
1680 	sc = handle;
1681 	sc->sc_play.intr = intr;
1682 	sc->sc_play.intr_arg = arg;
1683 	bps = param->channels * param->precision / 8;
1684 	if (!bps)
1685 		return EINVAL;
1686 
1687 	/* set DMA frame */
1688 	if (!(p = cmpci_find_dmamem(sc, start)))
1689 		return EINVAL;
1690 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
1691 	    DMAADDR(p));
1692 	delay(10);
1693 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
1694 	    ((char *)end - (char *)start + 1) / bps - 1);
1695 	delay(10);
1696 
1697 	/* set interrupt count */
1698 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
1699 			  (blksize + bps - 1) / bps - 1);
1700 	delay(10);
1701 
1702 	/* start DMA */
1703 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
1704 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
1705 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
1706 
1707 	return 0;
1708 }
1709 
1710 static int
1711 cmpci_trigger_input(void *handle, void *start, void *end, int blksize,
1712 		    void (*intr)(void *), void *arg,
1713 		    const audio_params_t *param)
1714 {
1715 	struct cmpci_softc *sc;
1716 	struct cmpci_dmanode *p;
1717 	int bps;
1718 
1719 	sc = handle;
1720 	sc->sc_rec.intr = intr;
1721 	sc->sc_rec.intr_arg = arg;
1722 	bps = param->channels * param->precision / 8;
1723 	if (!bps)
1724 		return EINVAL;
1725 
1726 	/* set DMA frame */
1727 	if (!(p=cmpci_find_dmamem(sc, start)))
1728 		return EINVAL;
1729 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
1730 	    DMAADDR(p));
1731 	delay(10);
1732 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
1733 	    ((char *)end - (char *)start + 1) / bps - 1);
1734 	delay(10);
1735 
1736 	/* set interrupt count */
1737 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
1738 	    (blksize + bps - 1) / bps - 1);
1739 	delay(10);
1740 
1741 	/* start DMA */
1742 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
1743 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
1744 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
1745 
1746 	return 0;
1747 }
1748 
1749 /* end of file */
1750