xref: /netbsd-src/sys/dev/pci/chipsfb.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: chipsfb.c,v 1.21 2010/05/04 05:00:33 macallan Exp $	*/
2 
3 /*
4  * Copyright (c) 2006 Michael Lorenz
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * A console driver for Chips & Technologies 65550 graphics controllers
30  * tested on macppc only so far
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: chipsfb.c,v 1.21 2010/05/04 05:00:33 macallan Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40 #include <sys/malloc.h>
41 #include <sys/callout.h>
42 #include <sys/lwp.h>
43 #include <sys/kauth.h>
44 
45 #include <uvm/uvm_extern.h>
46 
47 #include <dev/videomode/videomode.h>
48 
49 #include <dev/pci/pcivar.h>
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcidevs.h>
52 #include <dev/pci/pciio.h>
53 #include <dev/pci/chipsfbreg.h>
54 
55 #include <dev/wscons/wsdisplayvar.h>
56 #include <dev/wscons/wsconsio.h>
57 #include <dev/wsfont/wsfont.h>
58 #include <dev/rasops/rasops.h>
59 #include <dev/wscons/wsdisplay_vconsvar.h>
60 
61 #include <dev/i2c/i2cvar.h>
62 
63 #include "opt_wsemul.h"
64 #include "opt_chipsfb.h"
65 
66 struct chipsfb_softc {
67 	struct device sc_dev;
68 	pci_chipset_tag_t sc_pc;
69 	pcitag_t sc_pcitag;
70 
71 	bus_space_tag_t sc_memt;
72 	bus_space_tag_t sc_iot;
73 	bus_space_handle_t sc_memh;
74 
75 	bus_space_tag_t sc_fbt;
76 	bus_space_tag_t sc_ioregt;
77 	bus_space_handle_t sc_fbh;
78 	bus_space_handle_t sc_ioregh;
79 	bus_addr_t sc_fb, sc_ioreg;
80 	bus_size_t sc_fbsize, sc_ioregsize;
81 
82 	void *sc_ih;
83 
84 	size_t memsize;
85 
86 	int bits_per_pixel;
87 	int width, height, linebytes;
88 
89 	int sc_mode;
90 	uint32_t sc_bg;
91 
92 	u_char sc_cmap_red[256];
93 	u_char sc_cmap_green[256];
94 	u_char sc_cmap_blue[256];
95 	int sc_dacw;
96 
97 	/*
98 	 * I2C stuff
99 	 * DDC2 clock is on GPIO1, data on GPIO0
100 	 */
101 	struct i2c_controller sc_i2c;
102 	uint8_t sc_edid[1024];
103 	int sc_edidbytes;	/* number of bytes read from the monitor */
104 
105 	struct vcons_data vd;
106 };
107 
108 static struct vcons_screen chipsfb_console_screen;
109 
110 extern const u_char rasops_cmap[768];
111 
112 static int	chipsfb_match(device_t, cfdata_t, void *);
113 static void	chipsfb_attach(device_t, device_t, void *);
114 
115 CFATTACH_DECL(chipsfb, sizeof(struct chipsfb_softc), chipsfb_match,
116     chipsfb_attach, NULL, NULL);
117 
118 static void 	chipsfb_init(struct chipsfb_softc *);
119 
120 static void	chipsfb_cursor(void *, int, int, int);
121 static void	chipsfb_copycols(void *, int, int, int, int);
122 static void	chipsfb_erasecols(void *, int, int, int, long);
123 static void	chipsfb_copyrows(void *, int, int, int);
124 static void	chipsfb_eraserows(void *, int, int, long);
125 
126 #if 0
127 static int	chipsfb_allocattr(void *, int, int, int, long *);
128 static void	chipsfb_scroll(void *, void *, int);
129 static int	chipsfb_load_font(void *, void *, struct wsdisplay_font *);
130 #endif
131 
132 static int	chipsfb_putcmap(struct chipsfb_softc *,
133 			    struct wsdisplay_cmap *);
134 static int 	chipsfb_getcmap(struct chipsfb_softc *,
135 			    struct wsdisplay_cmap *);
136 static int 	chipsfb_putpalreg(struct chipsfb_softc *, uint8_t, uint8_t,
137 			    uint8_t, uint8_t);
138 
139 static void	chipsfb_bitblt(struct chipsfb_softc *, int, int, int, int,
140 			    int, int, uint8_t);
141 static void	chipsfb_rectfill(struct chipsfb_softc *, int, int, int, int,
142 			    int);
143 static void	chipsfb_putchar(void *, int, int, u_int, long);
144 static void	chipsfb_setup_mono(struct chipsfb_softc *, int, int, int,
145 			    int, uint32_t, uint32_t);
146 static void	chipsfb_feed(struct chipsfb_softc *, int, uint8_t *);
147 
148 #if 0
149 static void	chipsfb_showpal(struct chipsfb_softc *);
150 #endif
151 static void	chipsfb_restore_palette(struct chipsfb_softc *);
152 
153 static void	chipsfb_wait_idle(struct chipsfb_softc *);
154 
155 static uint32_t chipsfb_probe_vram(struct chipsfb_softc *);
156 
157 struct wsscreen_descr chipsfb_defaultscreen = {
158 	"default",
159 	0, 0,
160 	NULL,
161 	8, 16,
162 	WSSCREEN_WSCOLORS | WSSCREEN_HILIT,
163 };
164 
165 const struct wsscreen_descr *_chipsfb_scrlist[] = {
166 	&chipsfb_defaultscreen,
167 	/* XXX other formats, graphics screen? */
168 };
169 
170 struct wsscreen_list chipsfb_screenlist = {
171 	sizeof(_chipsfb_scrlist) / sizeof(struct wsscreen_descr *), _chipsfb_scrlist
172 };
173 
174 static int	chipsfb_ioctl(void *, void *, u_long, void *, int,
175 		    struct lwp *);
176 static paddr_t	chipsfb_mmap(void *, void *, off_t, int);
177 static void	chipsfb_clearscreen(struct chipsfb_softc *);
178 static void	chipsfb_init_screen(void *, struct vcons_screen *, int,
179 			    long *);
180 
181 
182 struct wsdisplay_accessops chipsfb_accessops = {
183 	chipsfb_ioctl,
184 	chipsfb_mmap,
185 	NULL,	/* load_font */
186 	NULL,	/* polls */
187 	NULL,	/* scroll */
188 };
189 
190 /*
191  * Inline functions for getting access to register aperture.
192  */
193 static inline void
194 chipsfb_write32(struct chipsfb_softc *sc, uint32_t reg, uint32_t val)
195 {
196 	bus_space_write_4(sc->sc_fbt, sc->sc_fbh, reg, val);
197 }
198 
199 static inline uint32_t
200 chipsfb_read32(struct chipsfb_softc *sc, uint32_t reg)
201 {
202 	return bus_space_read_4(sc->sc_fbt, sc->sc_fbh, reg);
203 }
204 
205 static inline void
206 chipsfb_write_vga(struct chipsfb_softc *sc, uint32_t reg,  uint8_t val)
207 {
208 	bus_space_write_1(sc->sc_iot, sc->sc_ioregh, reg, val);
209 }
210 
211 static inline uint8_t
212 chipsfb_read_vga(struct chipsfb_softc *sc, uint32_t reg)
213 {
214 	return bus_space_read_1(sc->sc_iot, sc->sc_ioregh, reg);
215 }
216 
217 static inline uint8_t
218 chipsfb_read_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index)
219 {
220 
221 	chipsfb_write_vga(sc, reg & 0xfffe, index);
222 	return chipsfb_read_vga(sc, reg | 0x0001);
223 }
224 
225 static inline void
226 chipsfb_write_indexed(struct chipsfb_softc *sc, uint32_t reg, uint8_t index,
227     uint8_t val)
228 {
229 
230 	chipsfb_write_vga(sc, reg & 0xfffe, index);
231 	chipsfb_write_vga(sc, reg | 0x0001, val);
232 }
233 
234 static void
235 chipsfb_wait_idle(struct chipsfb_softc *sc)
236 {
237 
238 #ifdef CHIPSFB_DEBUG
239 	chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0);
240 #endif
241 
242 	/* spin until the blitter is idle */
243 	while ((chipsfb_read32(sc, CT_BLT_CONTROL) & BLT_IS_BUSY) != 0) {
244 	}
245 
246 #ifdef CHIPSFB_DEBUG
247 	chipsfb_write32(sc, CT_OFF_FB + (800 * 598) - 4, 0xffffffff);
248 #endif
249 }
250 
251 static int
252 chipsfb_match(device_t parent, cfdata_t match, void *aux)
253 {
254 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
255 
256 	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
257 	    PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
258 		return 0;
259 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) &&
260 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65550))
261 		return 100;
262 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) &&
263 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65554))
264 		return 100;
265 	return 0;
266 }
267 
268 static void
269 chipsfb_attach(device_t parent, device_t self, void *aux)
270 {
271 	struct chipsfb_softc *sc = device_private(self);
272 	struct pci_attach_args *pa = aux;
273 	char devinfo[256];
274 	struct wsemuldisplaydev_attach_args aa;
275 	struct rasops_info *ri;
276 	prop_dictionary_t dict;
277 	pcireg_t screg;
278 	ulong defattr;
279 	bool console = false;
280 	int width, height, i, j;
281 	uint32_t bg, fg, ul;
282 
283 	dict = device_properties(self);
284 	sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
285 	sc->sc_pc = pa->pa_pc;
286 	sc->sc_pcitag = pa->pa_tag;
287 	sc->sc_dacw = -1;
288 
289 	screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
290 	screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
291 	pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg);
292 
293 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
294 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
295 #ifdef CHIPSFB_DEBUG
296 	printf(prop_dictionary_externalize(dict));
297 #endif
298 
299 	sc->sc_memt = pa->pa_memt;
300 	sc->sc_iot = pa->pa_iot;
301 
302 	/* the framebuffer */
303 	if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM,
304 	    BUS_SPACE_MAP_LINEAR,
305 	    &sc->sc_fbt, &sc->sc_fbh, &sc->sc_fb, &sc->sc_fbsize)) {
306 		aprint_error_dev(&sc->sc_dev, "failed to map the frame buffer.\n");
307 	}
308 
309 	/* IO-mapped registers */
310 	if (bus_space_map(sc->sc_iot, 0x0, 0x400, 0, &sc->sc_ioregh) != 0) {
311 		aprint_error_dev(&sc->sc_dev, "failed to map IO registers.\n");
312 	}
313 
314 	sc->memsize = chipsfb_probe_vram(sc);
315 	chipsfb_init(sc);
316 
317 	/* we should read these from the chip instead of depending on OF */
318 	width = height = -1;
319 
320 	/* detect panel size */
321 	width = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HSIZE_LSB);
322 	width |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_HORZ_OVERFLOW_1)
323 	    & 0x0f) << 8;
324 	width = (width + 1) * 8;
325 	height = chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VSIZE_LSB);
326 	height |= (chipsfb_read_indexed(sc, CT_FP_INDEX, FP_VERT_OVERFLOW_1)
327 	    & 0x0f) << 8;
328 	height++;
329 	aprint_verbose("Panel size: %d x %d\n", width, height);
330 
331 	if (!prop_dictionary_get_uint32(dict, "width", &sc->width))
332 		sc->width = width;
333 	if (!prop_dictionary_get_uint32(dict, "height", &sc->height))
334 		sc->height = height;
335 	if (!prop_dictionary_get_uint32(dict, "depth", &sc->bits_per_pixel))
336 		sc->bits_per_pixel = 8;
337 	if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->linebytes))
338 		sc->linebytes = (sc->width * sc->bits_per_pixel) >> 3;
339 
340 	prop_dictionary_get_bool(dict, "is_console", &console);
341 
342 #ifdef notyet
343 	/* XXX this should at least be configurable via kernel config */
344 	chipsfb_set_videomode(sc, &videomode_list[16]);
345 #endif
346 
347 	vcons_init(&sc->vd, sc, &chipsfb_defaultscreen, &chipsfb_accessops);
348 	sc->vd.init_screen = chipsfb_init_screen;
349 
350 	ri = &chipsfb_console_screen.scr_ri;
351 	if (console) {
352 		vcons_init_screen(&sc->vd, &chipsfb_console_screen, 1,
353 		    &defattr);
354 		chipsfb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC;
355 
356 		chipsfb_defaultscreen.textops = &ri->ri_ops;
357 		chipsfb_defaultscreen.capabilities = ri->ri_caps;
358 		chipsfb_defaultscreen.nrows = ri->ri_rows;
359 		chipsfb_defaultscreen.ncols = ri->ri_cols;
360 		wsdisplay_cnattach(&chipsfb_defaultscreen, ri, 0, 0, defattr);
361 	} else {
362 		/*
363 		 * since we're not the console we can postpone the rest
364 		 * until someone actually allocates a screen for us
365 		 */
366 #ifdef notyet
367 		chipsfb_set_videomode(sc, &videomode_list[0]);
368 #endif
369 	}
370 
371 	rasops_unpack_attr(defattr, &fg, &bg, &ul);
372 	sc->sc_bg = ri->ri_devcmap[bg];
373 	chipsfb_clearscreen(sc);
374 
375 	if (console)
376 		vcons_replay_msgbuf(&chipsfb_console_screen);
377 
378 	aprint_normal_dev(&sc->sc_dev, "%d MB aperture, %d MB VRAM at 0x%08x\n",
379 	    (u_int)(sc->sc_fbsize >> 20),
380 	    sc->memsize >> 20, (u_int)sc->sc_fb);
381 #ifdef CHIPSFB_DEBUG
382 	aprint_debug("fb: %08lx\n", (ulong)ri->ri_bits);
383 #endif
384 
385 	j = 0;
386 	for (i = 0; i < 256; i++) {
387 		chipsfb_putpalreg(sc, i, rasops_cmap[j], rasops_cmap[j + 1],
388 		    rasops_cmap[j + 2]);
389 		j += 3;
390 	}
391 
392 	aa.console = console;
393 	aa.scrdata = &chipsfb_screenlist;
394 	aa.accessops = &chipsfb_accessops;
395 	aa.accesscookie = &sc->vd;
396 
397 	config_found(self, &aa, wsemuldisplaydevprint);
398 }
399 
400 static int
401 chipsfb_putpalreg(struct chipsfb_softc *sc, uint8_t index, uint8_t r,
402     uint8_t g, uint8_t b)
403 {
404 
405 	sc->sc_cmap_red[index] = r;
406 	sc->sc_cmap_green[index] = g;
407 	sc->sc_cmap_blue[index] = b;
408 
409 	chipsfb_write_vga(sc, CT_DACMASK, 0xff);
410 	chipsfb_write_vga(sc, CT_WRITEINDEX, index);
411 	chipsfb_write_vga(sc, CT_DACDATA, r);
412 	chipsfb_write_vga(sc, CT_DACDATA, g);
413 	chipsfb_write_vga(sc, CT_DACDATA, b);
414 
415 	return 0;
416 }
417 
418 static int
419 chipsfb_putcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm)
420 {
421 	u_char *r, *g, *b;
422 	u_int index = cm->index;
423 	u_int count = cm->count;
424 	int i, error;
425 	u_char rbuf[256], gbuf[256], bbuf[256];
426 
427 #ifdef CHIPSFB_DEBUG
428 	aprint_debug("putcmap: %d %d\n",index, count);
429 #endif
430 	if (cm->index >= 256 || cm->count > 256 ||
431 	    (cm->index + cm->count) > 256)
432 		return EINVAL;
433 	error = copyin(cm->red, &rbuf[index], count);
434 	if (error)
435 		return error;
436 	error = copyin(cm->green, &gbuf[index], count);
437 	if (error)
438 		return error;
439 	error = copyin(cm->blue, &bbuf[index], count);
440 	if (error)
441 		return error;
442 
443 	memcpy(&sc->sc_cmap_red[index], &rbuf[index], count);
444 	memcpy(&sc->sc_cmap_green[index], &gbuf[index], count);
445 	memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count);
446 
447 	r = &sc->sc_cmap_red[index];
448 	g = &sc->sc_cmap_green[index];
449 	b = &sc->sc_cmap_blue[index];
450 
451 	for (i = 0; i < count; i++) {
452 		chipsfb_putpalreg(sc, index, *r, *g, *b);
453 		index++;
454 		r++, g++, b++;
455 	}
456 	return 0;
457 }
458 
459 static int
460 chipsfb_getcmap(struct chipsfb_softc *sc, struct wsdisplay_cmap *cm)
461 {
462 	u_int index = cm->index;
463 	u_int count = cm->count;
464 	int error;
465 
466 	if (index >= 255 || count > 256 || index + count > 256)
467 		return EINVAL;
468 
469 	error = copyout(&sc->sc_cmap_red[index],   cm->red,   count);
470 	if (error)
471 		return error;
472 	error = copyout(&sc->sc_cmap_green[index], cm->green, count);
473 	if (error)
474 		return error;
475 	error = copyout(&sc->sc_cmap_blue[index],  cm->blue,  count);
476 	if (error)
477 		return error;
478 
479 	return 0;
480 }
481 
482 static void
483 chipsfb_clearscreen(struct chipsfb_softc *sc)
484 {
485 	chipsfb_rectfill(sc, 0, 0, sc->width, sc->height, sc->sc_bg);
486 }
487 
488 /*
489  * wsdisplay_emulops
490  */
491 
492 static void
493 chipsfb_cursor(void *cookie, int on, int row, int col)
494 {
495 	struct rasops_info *ri = cookie;
496 	struct vcons_screen *scr = ri->ri_hw;
497 	struct chipsfb_softc *sc = scr->scr_cookie;
498 	int x, y, wi, he;
499 
500 	wi = ri->ri_font->fontwidth;
501 	he = ri->ri_font->fontheight;
502 
503 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
504 		x = ri->ri_ccol * wi + ri->ri_xorigin;
505 		y = ri->ri_crow * he + ri->ri_yorigin;
506 		if (ri->ri_flg & RI_CURSOR) {
507 			chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST);
508 			ri->ri_flg &= ~RI_CURSOR;
509 		}
510 		ri->ri_crow = row;
511 		ri->ri_ccol = col;
512 		if (on) {
513 			x = ri->ri_ccol * wi + ri->ri_xorigin;
514 			y = ri->ri_crow * he + ri->ri_yorigin;
515 			chipsfb_bitblt(sc, x, y, x, y, wi, he, ROP_NOT_DST);
516 			ri->ri_flg |= RI_CURSOR;
517 		}
518 	} else {
519 		ri->ri_flg &= ~RI_CURSOR;
520 		ri->ri_crow = row;
521 		ri->ri_ccol = col;
522 	}
523 }
524 
525 #if 0
526 int
527 chipsfb_mapchar(void *cookie, int uni, u_int *index)
528 {
529 	return 0;
530 }
531 #endif
532 
533 static void
534 chipsfb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols)
535 {
536 	struct rasops_info *ri = cookie;
537 	struct vcons_screen *scr = ri->ri_hw;
538 	struct chipsfb_softc *sc = scr->scr_cookie;
539 	int32_t xs, xd, y, width, height;
540 
541 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
542 		xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol;
543 		xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol;
544 		y = ri->ri_yorigin + ri->ri_font->fontheight * row;
545 		width = ri->ri_font->fontwidth * ncols;
546 		height = ri->ri_font->fontheight;
547 		chipsfb_bitblt(sc, xs, y, xd, y, width, height, ROP_COPY);
548 	}
549 }
550 
551 static void
552 chipsfb_erasecols(void *cookie, int row, int startcol, int ncols,
553     long fillattr)
554 {
555 	struct rasops_info *ri = cookie;
556 	struct vcons_screen *scr = ri->ri_hw;
557 	struct chipsfb_softc *sc = scr->scr_cookie;
558 	int32_t x, y, width, height, fg, bg, ul;
559 
560 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
561 		x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol;
562 		y = ri->ri_yorigin + ri->ri_font->fontheight * row;
563 		width = ri->ri_font->fontwidth * ncols;
564 		height = ri->ri_font->fontheight;
565 		rasops_unpack_attr(fillattr, &fg, &bg, &ul);
566 
567 		chipsfb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]);
568 	}
569 }
570 
571 static void
572 chipsfb_copyrows(void *cookie, int srcrow, int dstrow, int nrows)
573 {
574 	struct rasops_info *ri = cookie;
575 	struct vcons_screen *scr = ri->ri_hw;
576 	struct chipsfb_softc *sc = scr->scr_cookie;
577 	int32_t x, ys, yd, width, height;
578 
579 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
580 		x = ri->ri_xorigin;
581 		ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow;
582 		yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow;
583 		width = ri->ri_emuwidth;
584 		height = ri->ri_font->fontheight * nrows;
585 		chipsfb_bitblt(sc, x, ys, x, yd, width, height, ROP_COPY);
586 	}
587 }
588 
589 static void
590 chipsfb_eraserows(void *cookie, int row, int nrows, long fillattr)
591 {
592 	struct rasops_info *ri = cookie;
593 	struct vcons_screen *scr = ri->ri_hw;
594 	struct chipsfb_softc *sc = scr->scr_cookie;
595 	int32_t x, y, width, height, fg, bg, ul;
596 
597 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
598 		rasops_unpack_attr(fillattr, &fg, &bg, &ul);
599 		if ((row == 0) && (nrows == ri->ri_rows)) {
600 			/* clear the whole screen */
601 			chipsfb_rectfill(sc, 0, 0, ri->ri_width,
602 			    ri->ri_height, ri->ri_devcmap[bg]);
603 		} else {
604 			x = ri->ri_xorigin;
605 			y = ri->ri_yorigin + ri->ri_font->fontheight * row;
606 			width = ri->ri_emuwidth;
607 			height = ri->ri_font->fontheight * nrows;
608 			chipsfb_rectfill(sc, x, y, width, height,
609 			    ri->ri_devcmap[bg]);
610 		}
611 	}
612 }
613 
614 static void
615 chipsfb_bitblt(struct chipsfb_softc *sc, int xs, int ys, int xd, int yd,
616     int width, int height, uint8_t rop)
617 {
618 	uint32_t src, dst, cmd = rop, stride, size;
619 
620 	cmd |= BLT_PAT_IS_SOLID;
621 
622 	/* we assume 8 bit for now */
623 	src = xs + ys * sc->linebytes;
624 	dst = xd + yd * sc->linebytes;
625 
626 	if (xs < xd) {
627 		/* right-to-left operation */
628 		cmd |= BLT_START_RIGHT;
629 		src += width - 1;
630 		dst += width - 1;
631 	}
632 
633 	if (ys < yd) {
634 		/* bottom-to-top operation */
635 		cmd |= BLT_START_BOTTOM;
636 		src += (height - 1) * sc->linebytes;
637 		dst += (height - 1) * sc->linebytes;
638 	}
639 
640 	stride = (sc->linebytes << 16) | sc->linebytes;
641 	size = (height << 16) | width;
642 
643 	chipsfb_wait_idle(sc);
644 	chipsfb_write32(sc, CT_BLT_STRIDE, stride);
645 	chipsfb_write32(sc, CT_BLT_SRCADDR, src);
646 	chipsfb_write32(sc, CT_BLT_DSTADDR, dst);
647 	chipsfb_write32(sc, CT_BLT_CONTROL, cmd);
648 	chipsfb_write32(sc, CT_BLT_SIZE, size);
649 #ifdef CHIPSFB_WAIT
650 	chipsfb_wait_idle(sc);
651 #endif
652 }
653 
654 static void
655 chipsfb_rectfill(struct chipsfb_softc *sc, int x, int y, int width,
656     int height, int colour)
657 {
658 	uint32_t dst, cmd, stride, size;
659 
660 	cmd = BLT_PAT_IS_SOLID | BLT_PAT_IS_MONO | ROP_PAT;
661 
662 	/* we assume 8 bit for now */
663 	dst = x + y * sc->linebytes;
664 
665 	stride = (sc->linebytes << 16) | sc->linebytes;
666 	size = (height << 16) | width;
667 
668 	chipsfb_wait_idle(sc);
669 	chipsfb_write32(sc, CT_BLT_STRIDE, stride);
670 	chipsfb_write32(sc, CT_BLT_SRCADDR, dst);
671 	chipsfb_write32(sc, CT_BLT_DSTADDR, dst);
672 	chipsfb_write32(sc, CT_BLT_CONTROL, cmd);
673 	chipsfb_write32(sc, CT_BLT_BG, colour);
674 	chipsfb_write32(sc, CT_BLT_FG, colour);
675 	chipsfb_write32(sc, CT_BLT_SIZE, size);
676 #ifdef CHIPSFB_WAIT
677 	chipsfb_wait_idle(sc);
678 #endif
679 }
680 
681 static void
682 chipsfb_putchar(void *cookie, int row, int col, u_int c, long attr)
683 {
684 	struct rasops_info *ri = cookie;
685 	struct wsdisplay_font *font = PICK_FONT(ri, c);
686 	struct vcons_screen *scr = ri->ri_hw;
687 	struct chipsfb_softc *sc = scr->scr_cookie;
688 
689 	if (__predict_false((unsigned int)row > ri->ri_rows ||
690 	    (unsigned int)col > ri->ri_cols))
691 		return;
692 
693 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
694 		uint8_t *data;
695 		int fg, bg, uc;
696 		int x, y, wi, he;
697 
698 		wi = font->fontwidth;
699 		he = font->fontheight;
700 
701 		if (!CHAR_IN_FONT(c, font))
702 			return;
703 		bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf];
704 		fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf];
705 		x = ri->ri_xorigin + col * wi;
706 		y = ri->ri_yorigin + row * he;
707 		if (c == 0x20) {
708 			chipsfb_rectfill(sc, x, y, wi, he, bg);
709 		} else {
710 			uc = c - font->firstchar;
711 			data = (uint8_t *)font->data + uc *
712 			    ri->ri_fontscale;
713 			chipsfb_setup_mono(sc, x, y, wi, he, fg, bg);
714 			chipsfb_feed(sc, font->stride * he, data);
715 		}
716 	}
717 }
718 
719 static void
720 chipsfb_setup_mono(struct chipsfb_softc *sc, int xd, int yd, int width,
721     int height, uint32_t fg, uint32_t bg)
722 {
723 	uint32_t dst, cmd, stride, size;
724 
725 	cmd = BLT_PAT_IS_SOLID | BLT_SRC_IS_CPU | BLT_SRC_IS_MONO | ROP_COPY;
726 
727 	/* we assume 8 bit for now */
728 	dst = xd + yd * sc->linebytes;
729 
730 	stride = (sc->linebytes << 16);
731 	size = (height << 16) | width;
732 
733 	chipsfb_wait_idle(sc);
734 	chipsfb_write32(sc, CT_BLT_STRIDE, stride);
735 	chipsfb_write32(sc, CT_BLT_EXPCTL, MONO_SRC_ALIGN_BYTE);
736 	chipsfb_write32(sc, CT_BLT_DSTADDR, dst);
737 	chipsfb_write32(sc, CT_BLT_SRCADDR, 0);
738 	chipsfb_write32(sc, CT_BLT_CONTROL, cmd);
739 	chipsfb_write32(sc, CT_BLT_BG, bg);
740 	chipsfb_write32(sc, CT_BLT_FG, fg);
741 	chipsfb_write32(sc, CT_BLT_SIZE, size);
742 }
743 
744 static void
745 chipsfb_feed(struct chipsfb_softc *sc, int count, uint8_t *data)
746 {
747 	int i;
748 	uint32_t latch = 0, bork;
749 	int shift = 0;
750 
751 	for (i = 0; i < count; i++) {
752 		bork = data[i];
753 		latch |= (bork << shift);
754 		if (shift == 24) {
755 			chipsfb_write32(sc, CT_OFF_DATA, latch);
756 			latch = 0;
757 			shift = 0;
758 		} else
759 			shift += 8;
760 	}
761 
762 	if (shift != 0) {
763 		chipsfb_write32(sc, CT_OFF_DATA, latch);
764 	}
765 
766 	/* apparently the chip wants 64bit-aligned data or it won't go idle */
767 	if ((count + 3) & 0x04) {
768 		chipsfb_write32(sc, CT_OFF_DATA, 0);
769 	}
770 #ifdef CHIPSFB_WAIT
771 	chipsfb_wait_idle(sc);
772 #endif
773 }
774 
775 #if 0
776 static void
777 chipsfb_showpal(struct chipsfb_softc *sc)
778 {
779 	int i, x = 0;
780 
781 	for (i = 0; i < 16; i++) {
782 		chipsfb_rectfill(sc, x, 0, 64, 64, i);
783 		x += 64;
784 	}
785 }
786 #endif
787 
788 #if 0
789 static int
790 chipsfb_allocattr(void *cookie, int fg, int bg, int flags, long *attrp)
791 {
792 
793 	return 0;
794 }
795 #endif
796 
797 static void
798 chipsfb_restore_palette(struct chipsfb_softc *sc)
799 {
800 	int i;
801 
802 	for (i = 0; i < 256; i++) {
803 		chipsfb_putpalreg(sc,
804 		   i,
805 		   sc->sc_cmap_red[i],
806 		   sc->sc_cmap_green[i],
807 		   sc->sc_cmap_blue[i]);
808 	}
809 }
810 
811 /*
812  * wsdisplay_accessops
813  */
814 
815 static int
816 chipsfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
817 	struct lwp *l)
818 {
819 	struct vcons_data *vd = v;
820 	struct chipsfb_softc *sc = vd->cookie;
821 	struct wsdisplay_fbinfo *wdf;
822 	struct vcons_screen *ms = vd->active;
823 
824 	switch (cmd) {
825 		case WSDISPLAYIO_GTYPE:
826 			*(u_int *)data = WSDISPLAY_TYPE_PCIMISC;
827 			return 0;
828 
829 		case WSDISPLAYIO_GINFO:
830 			wdf = (void *)data;
831 			wdf->height = ms->scr_ri.ri_height;
832 			wdf->width = ms->scr_ri.ri_width;
833 			wdf->depth = ms->scr_ri.ri_depth;
834 			wdf->cmsize = 256;
835 			return 0;
836 
837 		case WSDISPLAYIO_GETCMAP:
838 			return chipsfb_getcmap(sc,
839 			    (struct wsdisplay_cmap *)data);
840 
841 		case WSDISPLAYIO_PUTCMAP:
842 			return chipsfb_putcmap(sc,
843 			    (struct wsdisplay_cmap *)data);
844 
845 		/* PCI config read/write passthrough. */
846 		case PCI_IOC_CFGREAD:
847 		case PCI_IOC_CFGWRITE:
848 			return (pci_devioctl(sc->sc_pc, sc->sc_pcitag,
849 			    cmd, data, flag, l));
850 
851 		case WSDISPLAYIO_SMODE:
852 			{
853 				int new_mode = *(int*)data;
854 				if (new_mode != sc->sc_mode) {
855 					sc->sc_mode = new_mode;
856 					if(new_mode == WSDISPLAYIO_MODE_EMUL) {
857 						chipsfb_restore_palette(sc);
858 						vcons_redraw_screen(ms);
859 					}
860 				}
861 			}
862 			return 0;
863 	}
864 	return EPASSTHROUGH;
865 }
866 
867 static paddr_t
868 chipsfb_mmap(void *v, void *vs, off_t offset, int prot)
869 {
870 	struct vcons_data *vd = v;
871 	struct chipsfb_softc *sc = vd->cookie;
872 	paddr_t pa;
873 
874 	/* 'regular' framebuffer mmap()ing */
875 	if (offset < sc->memsize) {
876 		pa = bus_space_mmap(sc->sc_fbt, offset, 0, prot,
877 		    BUS_SPACE_MAP_LINEAR);
878 		return pa;
879 	}
880 
881 	/*
882 	 * restrict all other mappings to processes with superuser privileges
883 	 * or the kernel itself
884 	 */
885 	if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER,
886 	    NULL) != 0) {
887 		aprint_normal_dev(&sc->sc_dev, "mmap() rejected.\n");
888 		return -1;
889 	}
890 
891 	if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) {
892 		pa = bus_space_mmap(sc->sc_memt, offset, 0, prot,
893 		    BUS_SPACE_MAP_LINEAR);
894 		return pa;
895 	}
896 
897 #ifdef PCI_MAGIC_IO_RANGE
898 	/* allow mapping of IO space */
899 	if ((offset >= PCI_MAGIC_IO_RANGE) &&
900 	    (offset < PCI_MAGIC_IO_RANGE + 0x10000)) {
901 		pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE,
902 		    0, prot, BUS_SPACE_MAP_LINEAR);
903 		return pa;
904 	}
905 #endif
906 
907 #ifdef OFB_ALLOW_OTHERS
908 	if (offset >= 0x80000000) {
909 		pa = bus_space_mmap(sc->sc_memt, offset, 0, prot,
910 		    BUS_SPACE_MAP_LINEAR);
911 		return pa;
912 	}
913 #endif
914 	return -1;
915 }
916 
917 static void
918 chipsfb_init_screen(void *cookie, struct vcons_screen *scr,
919     int existing, long *defattr)
920 {
921 	struct chipsfb_softc *sc = cookie;
922 	struct rasops_info *ri = &scr->scr_ri;
923 
924 	ri->ri_depth = sc->bits_per_pixel;
925 	ri->ri_width = sc->width;
926 	ri->ri_height = sc->height;
927 	ri->ri_stride = sc->width;
928 	ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
929 
930 	ri->ri_bits = bus_space_vaddr(sc->sc_fbt, sc->sc_fbh);
931 
932 #ifdef CHIPSFB_DEBUG
933 	aprint_debug("addr: %08lx\n", (ulong)ri->ri_bits);
934 #endif
935 	if (existing) {
936 		ri->ri_flg |= RI_CLEAR;
937 	}
938 
939 	rasops_init(ri, sc->height/8, sc->width/8);
940 	ri->ri_caps = WSSCREEN_WSCOLORS;
941 
942 	rasops_reconfig(ri, sc->height / ri->ri_font->fontheight,
943 		    sc->width / ri->ri_font->fontwidth);
944 
945 	ri->ri_hw = scr;
946 	ri->ri_ops.copyrows = chipsfb_copyrows;
947 	ri->ri_ops.copycols = chipsfb_copycols;
948 	ri->ri_ops.eraserows = chipsfb_eraserows;
949 	ri->ri_ops.erasecols = chipsfb_erasecols;
950 	ri->ri_ops.cursor = chipsfb_cursor;
951 	ri->ri_ops.putchar = chipsfb_putchar;
952 }
953 
954 #if 0
955 int
956 chipsfb_load_font(void *v, void *cookie, struct wsdisplay_font *data)
957 {
958 
959 	return 0;
960 }
961 #endif
962 
963 static void
964 chipsfb_init(struct chipsfb_softc *sc)
965 {
966 
967 	chipsfb_wait_idle(sc);
968 
969 	chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_IO_CONTROL,
970 	    ENABLE_CRTC_EXT | ENABLE_ATTR_EXT);
971 	chipsfb_write_indexed(sc, CT_CONF_INDEX, XR_ADDR_MAPPING,
972 	    ENABLE_LINEAR);
973 
974 	/* setup the blitter */
975 }
976 
977 static uint32_t
978 chipsfb_probe_vram(struct chipsfb_softc *sc)
979 {
980 	uint32_t ofs = 0x00080000;	/* 512kB */
981 
982 	/*
983 	 * advance in 0.5MB steps, see if we can read back what we wrote and
984 	 * if what we wrote to 0 is left untouched. Max. fb size is 4MB so
985 	 * we voluntarily stop there.
986 	 */
987 	chipsfb_write32(sc, 0, 0xf0f0f0f0);
988 	chipsfb_write32(sc, ofs, 0x0f0f0f0f);
989 	while ((chipsfb_read32(sc, 0) == 0xf0f0f0f0) &&
990 	    (chipsfb_read32(sc, ofs) == 0x0f0f0f0f) &&
991 	    (ofs < 0x00400000)) {
992 
993 		ofs += 0x00080000;
994 		chipsfb_write32(sc, ofs, 0x0f0f0f0f);
995 	}
996 
997 	return ofs;
998 }
999