1 /* $NetBSD: btvmeii.c,v 1.3 2001/07/07 16:37:38 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Driver for the Bit3/SBS PCI-VME adapter Model 2706. 31 * Uses the common Tundra Universe code. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 38 #include <dev/pci/pcireg.h> 39 #include <dev/pci/pcivar.h> 40 #include <dev/pci/pcidevs.h> 41 42 #include <machine/bus.h> 43 #include <sys/malloc.h> 44 #include <sys/extent.h> 45 46 #include <dev/pci/ppbreg.h> 47 48 #include <dev/vme/vmereg.h> 49 #include <dev/vme/vmevar.h> 50 51 #include <dev/pci/universe_pci_var.h> 52 53 static int b3_2706_match __P((struct device *, struct cfdata *, void *)); 54 static void b3_2706_attach __P((struct device *, struct device *, void *)); 55 56 /* exported via tag structs */ 57 int b3_2706_map_vme __P((void *, vme_addr_t, vme_size_t, 58 vme_am_t, vme_datasize_t, vme_swap_t, 59 bus_space_tag_t *, bus_space_handle_t *, vme_mapresc_t*)); 60 void b3_2706_unmap_vme __P((void *, vme_mapresc_t)); 61 62 int b3_2706_vme_probe __P((void *, vme_addr_t, vme_size_t, vme_am_t, 63 vme_datasize_t, 64 int (*)(void *, bus_space_tag_t, bus_space_handle_t), 65 void *)); 66 67 int b3_2706_map_vmeint __P((void *, int, int, vme_intr_handle_t *)); 68 void *b3_2706_establish_vmeint __P((void *, vme_intr_handle_t, int, 69 int (*)(void *), void *)); 70 void b3_2706_disestablish_vmeint __P((void *, void *)); 71 void b3_2706_vmeint __P((void *, int, int)); 72 73 int b3_2706_dmamap_create __P((void *, vme_size_t, 74 vme_am_t, vme_datasize_t, vme_swap_t, 75 int, vme_size_t, vme_addr_t, 76 int, bus_dmamap_t *)); 77 void b3_2706_dmamap_destroy __P((void *, bus_dmamap_t)); 78 79 int b3_2706_dmamem_alloc __P((void *, vme_size_t, 80 vme_am_t, vme_datasize_t, vme_swap_t, 81 bus_dma_segment_t *, int, int *, int)); 82 void b3_2706_dmamem_free __P((void *, bus_dma_segment_t *, int)); 83 84 struct b3_2706_vmemaprescs { 85 int wnd; 86 unsigned long pcibase, maplen; 87 bus_space_handle_t handle; 88 u_int32_t len; 89 }; 90 91 struct b3_2706_vmeintrhand { 92 TAILQ_ENTRY(b3_2706_vmeintrhand) ih_next; 93 int (*ih_fun) __P((void*)); 94 void *ih_arg; 95 int ih_level; 96 int ih_vector; 97 int ih_prior; 98 u_long ih_count; 99 }; 100 101 struct b3_2706_softc { 102 struct device sc_dev; 103 struct univ_pci_data univdata; 104 bus_space_tag_t swapt, vmet; 105 bus_space_handle_t swaph; 106 bus_addr_t vmepbase; 107 108 int windowused[8]; 109 struct b3_2706_vmemaprescs vmemaprescs[8]; 110 struct extent *vmeext; 111 char vmemap[EXTENT_FIXED_STORAGE_SIZE(8)]; 112 113 struct vme_chipset_tag sc_vct; 114 115 /* list of VME interrupt handlers */ 116 TAILQ_HEAD(, b3_2706_vmeintrhand) intrhdls; 117 int strayintrs; 118 }; 119 120 struct cfattach btvmeii_ca = { 121 sizeof(struct b3_2706_softc), b3_2706_match, b3_2706_attach, 122 #if 0 123 b3_2706_detach 124 #endif 125 }; 126 127 /* 128 * The adapter consists of a DEC PCI-PCI-bridge with two 129 * PCI devices behind it: A Tundra Universe as device 4 and 130 * some FPGA with glue logics as device 8. 131 * As long as the autoconf code doesn't provide more support 132 * for dependant devices, we have to duplicate a part of the 133 * "ppb" functions here. 134 */ 135 136 static int 137 b3_2706_match(parent, match, aux) 138 struct device *parent; 139 struct cfdata *match; 140 void *aux; 141 { 142 struct pci_attach_args *pa = aux; 143 pci_chipset_tag_t pc = pa->pa_pc; 144 int secbus; 145 pcitag_t tag; 146 pcireg_t id; 147 148 if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC) 149 || (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_DEC_21152)) 150 return (0); 151 152 secbus = PPB_BUSINFO_SECONDARY(pci_conf_read(pc, pa->pa_tag, 153 PPB_REG_BUSINFO)); 154 if (secbus == 0) { 155 printf("b3_2706_match: ppb not configured\n"); 156 return (0); 157 } 158 159 tag = pci_make_tag(pc, secbus, 4, 0); 160 id = pci_conf_read(pc, tag, PCI_ID_REG); 161 162 if ((PCI_VENDOR(id) != PCI_VENDOR_NEWBRIDGE) 163 || (PCI_PRODUCT(id) != PCI_PRODUCT_NEWBRIDGE_CA91CX42)) { 164 #ifdef DEBUG 165 printf("b3_2706_match: no tundra\n"); 166 #endif 167 return (0); 168 } 169 170 tag = pci_make_tag(pc, secbus, 8, 0); 171 id = pci_conf_read(pc, tag, PCI_ID_REG); 172 173 if ((PCI_VENDOR(id) != PCI_VENDOR_BIT3) 174 || (PCI_PRODUCT(id) != PCI_PRODUCT_BIT3_PCIVME2706)) { 175 #ifdef DEBUG 176 printf("b3_2706_match: no bit3 chip\n"); 177 #endif 178 return (0); 179 } 180 181 return (5); /* beat "ppb" */ 182 } 183 184 static void 185 b3_2706_attach(parent, self, aux) 186 struct device *parent, *self; 187 void *aux; 188 { 189 struct b3_2706_softc *sc = (struct b3_2706_softc *)self; 190 struct pci_attach_args *pa = aux; 191 pci_chipset_tag_t pc = pa->pa_pc; 192 struct pci_attach_args aa; 193 int secbus; 194 pcireg_t intr; 195 pcitag_t tag; 196 bus_addr_t swappbase; 197 int i; 198 199 struct vmebus_attach_args vaa; 200 201 printf("\n"); 202 203 secbus = PPB_BUSINFO_SECONDARY(pci_conf_read(pc, pa->pa_tag, 204 PPB_REG_BUSINFO)); 205 206 memcpy(&aa, pa, sizeof(struct pci_attach_args)); 207 aa.pa_device = 4; 208 aa.pa_function = 0; 209 aa.pa_tag = pci_make_tag(pc, secbus, 4, 0); 210 aa.pa_intrswiz += 4; 211 intr = pci_conf_read(pc, aa.pa_tag, PCI_INTERRUPT_REG); 212 /* 213 * swizzle it based on the number of 214 * busses we're behind and our device 215 * number. 216 */ 217 aa.pa_intrpin = ((1 + aa.pa_intrswiz - 1) % 4) + 1; 218 aa.pa_intrline = PCI_INTERRUPT_LINE(intr); 219 220 if (univ_pci_attach(&sc->univdata, &aa, self->dv_xname, 221 b3_2706_vmeint, sc)) { 222 printf("%s: error initializing universe chip\n", 223 self->dv_xname); 224 return; 225 } 226 227 /* 228 * don't waste KVM - the byteswap register is aliased in 229 * a 512k window, we need it only once 230 */ 231 tag = pci_make_tag(pc, secbus, 8, 0); 232 sc->swapt = pa->pa_memt; 233 if (pci_mapreg_info(pc, tag, 0x10, 234 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 235 &swappbase, 0, 0) || 236 bus_space_map(sc->swapt, swappbase, 4, 0, &sc->swaph)) { 237 printf("%s: can't map byteswap register\n", self->dv_xname); 238 return; 239 } 240 /* 241 * Set up cycle specific byteswap mode. 242 * XXX Readback yields "all-ones" for me, and it doesn't seem 243 * to matter what I write into the register - the data don't 244 * get swapped. Adapter fault or documentation bug? 245 */ 246 bus_space_write_4(sc->swapt, sc->swaph, 0, 0x00000490); 247 248 /* VME space is mapped as needed */ 249 sc->vmet = pa->pa_memt; 250 if (pci_mapreg_info(pc, tag, 0x14, 251 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 252 &sc->vmepbase, 0, 0)) { 253 printf("%s: VME range not assigned\n", self->dv_xname); 254 return; 255 } 256 #ifdef BIT3DEBUG 257 printf("%s: VME window @%lx\n", self->dv_xname, (long)sc->vmepbase); 258 #endif 259 260 for (i = 0; i < 8; i++) { 261 sc->windowused[i] = 0; 262 } 263 sc->vmeext = extent_create("pcivme", sc->vmepbase, 264 sc->vmepbase + 32*1024*1024 - 1, M_DEVBUF, 265 sc->vmemap, sizeof(sc->vmemap), 266 EX_NOCOALESCE); 267 268 sc->sc_vct.cookie = self; 269 sc->sc_vct.vct_probe = b3_2706_vme_probe; 270 sc->sc_vct.vct_map = b3_2706_map_vme; 271 sc->sc_vct.vct_unmap = b3_2706_unmap_vme; 272 sc->sc_vct.vct_int_map = b3_2706_map_vmeint; 273 sc->sc_vct.vct_int_establish = b3_2706_establish_vmeint; 274 sc->sc_vct.vct_int_disestablish = b3_2706_disestablish_vmeint; 275 sc->sc_vct.vct_dmamap_create = b3_2706_dmamap_create; 276 sc->sc_vct.vct_dmamap_destroy = b3_2706_dmamap_destroy; 277 sc->sc_vct.vct_dmamem_alloc = b3_2706_dmamem_alloc; 278 sc->sc_vct.vct_dmamem_free = b3_2706_dmamem_free; 279 280 vaa.va_vct = &(sc->sc_vct); 281 vaa.va_bdt = pa->pa_dmat; /* XXX */ 282 vaa.va_slaveconfig = 0; /* XXX CSR window? */ 283 284 config_found(self, &vaa, 0); 285 } 286 287 #define sc ((struct b3_2706_softc*)vsc) 288 289 int 290 b3_2706_map_vme(vsc, vmeaddr, len, am, datasizes, swap, tag, handle, resc) 291 void *vsc; 292 vme_addr_t vmeaddr; 293 vme_size_t len; 294 vme_am_t am; 295 vme_datasize_t datasizes; 296 vme_swap_t swap; 297 bus_space_tag_t *tag; 298 bus_space_handle_t *handle; 299 vme_mapresc_t *resc; 300 { 301 int idx, i, wnd, res; 302 unsigned long boundary, maplen, pcibase; 303 vme_addr_t vmebase, vmeend; 304 static int windoworder[8] = {1, 2, 3, 5, 6, 7, 0, 4}; 305 306 /* prefer windows with fine granularity for small mappings */ 307 wnd = -1; 308 if (len <= 32*1024) 309 idx = 6; 310 else 311 idx = 0; 312 for (i = 0; i < 8; i++) { 313 if (!sc->windowused[windoworder[idx]]) { 314 wnd = windoworder[idx]; 315 sc->windowused[wnd] = 1; 316 break; 317 } 318 idx = (idx + 1) % 8; 319 } 320 if (wnd == -1) 321 return (ENOSPC); 322 323 boundary = (wnd & 3) ? 64*1024 : 4*1024; 324 325 /* first mapped address */ 326 vmebase = vmeaddr & ~(boundary - 1); 327 /* base of last mapped page */ 328 vmeend = (vmeaddr + len - 1) & ~(boundary - 1); 329 /* bytes in outgoing window required */ 330 maplen = vmeend - vmebase + boundary; 331 332 if (extent_alloc(sc->vmeext, maplen, boundary, 0, EX_FAST, &pcibase)) { 333 sc->windowused[wnd] = 0; 334 return (ENOMEM); 335 } 336 337 res = univ_pci_mapvme(&sc->univdata, wnd, vmebase, maplen, 338 am, datasizes, pcibase); 339 if (res) { 340 extent_free(sc->vmeext, pcibase, maplen, 0); 341 sc->windowused[wnd] = 0; 342 return (res); 343 } 344 345 res = bus_space_map(sc->vmet, pcibase + (vmeaddr - vmebase), len, 346 0, handle); 347 if (res) { 348 univ_pci_unmapvme(&sc->univdata, wnd); 349 extent_free(sc->vmeext, pcibase, maplen, 0); 350 sc->windowused[wnd] = 0; 351 return (res); 352 } 353 354 *tag = sc->vmet; 355 356 /* 357 * save all data needed for later unmapping 358 */ 359 sc->vmemaprescs[wnd].wnd = wnd; 360 sc->vmemaprescs[wnd].pcibase = pcibase; 361 sc->vmemaprescs[wnd].maplen = maplen; 362 sc->vmemaprescs[wnd].handle = *handle; 363 sc->vmemaprescs[wnd].len = len; 364 *resc = &sc->vmemaprescs[wnd]; 365 return (0); 366 } 367 368 void 369 b3_2706_unmap_vme(vsc, resc) 370 void *vsc; 371 vme_mapresc_t resc; 372 { 373 struct b3_2706_vmemaprescs *r = resc; 374 375 bus_space_unmap(sc->vmet, r->handle, r->len); 376 extent_free(sc->vmeext, r->pcibase, r->maplen, 0); 377 378 if (!sc->windowused[r->wnd]) 379 panic("b3_2706_unmap_vme: bad window"); 380 univ_pci_unmapvme(&sc->univdata, r->wnd); 381 sc->windowused[r->wnd] = 0; 382 } 383 384 int 385 b3_2706_vme_probe(vsc, addr, len, am, datasize, callback, cbarg) 386 void *vsc; 387 vme_addr_t addr; 388 vme_size_t len; 389 vme_am_t am; 390 vme_datasize_t datasize; 391 int (*callback) __P((void *, bus_space_tag_t, bus_space_handle_t)); 392 void *cbarg; 393 { 394 bus_space_tag_t tag; 395 bus_space_handle_t handle; 396 vme_mapresc_t resc; 397 int res, i; 398 volatile u_int32_t dummy; 399 400 res = b3_2706_map_vme(vsc, addr, len, am, datasize, 0, 401 &tag, &handle, &resc); 402 if (res) 403 return (res); 404 405 if (univ_pci_vmebuserr(&sc->univdata, 1)) 406 printf("b3_2706_vme_badaddr: TA bit not clean - reset\n"); 407 408 if (callback) 409 res = (*callback)(cbarg, tag, handle); 410 else { 411 for (i = 0; i < len;) { 412 switch (datasize) { 413 case VME_D8: 414 dummy = bus_space_read_1(tag, handle, i); 415 i++; 416 break; 417 case VME_D16: 418 dummy = bus_space_read_2(tag, handle, i); 419 i += 2; 420 break; 421 case VME_D32: 422 dummy = bus_space_read_4(tag, handle, i); 423 i += 4; 424 break; 425 default: 426 panic("b3_2706_vme_probe: invalid datasize %x", 427 datasize); 428 } 429 } 430 } 431 432 if (univ_pci_vmebuserr(&sc->univdata, 0)) { 433 #ifdef BIT3DEBUG 434 printf("b3_2706_vme_badaddr: caught TA\n"); 435 #endif 436 univ_pci_vmebuserr(&sc->univdata, 1); 437 res = EIO; 438 } 439 440 b3_2706_unmap_vme(vsc, resc); 441 return (res); 442 } 443 444 int 445 b3_2706_map_vmeint(vsc, level, vector, handlep) 446 void *vsc; 447 int level, vector; 448 vme_intr_handle_t *handlep; 449 { 450 451 *handlep = (void *)(long)((level << 8) | vector); /* XXX */ 452 return (0); 453 } 454 455 void * 456 b3_2706_establish_vmeint(vsc, handle, prior, func, arg) 457 void *vsc; 458 vme_intr_handle_t handle; 459 int prior; 460 int (*func) __P((void *)); 461 void *arg; 462 { 463 struct b3_2706_vmeintrhand *ih; 464 long lv; 465 int s; 466 extern int cold; 467 468 /* no point in sleeping unless someone can free memory. */ 469 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 470 if (ih == NULL) 471 panic("b3_2706_map_vmeint: can't malloc handler info"); 472 473 lv = (long)handle; /* XXX */ 474 475 ih->ih_fun = func; 476 ih->ih_arg = arg; 477 ih->ih_level = lv >> 8; 478 ih->ih_vector = lv & 0xff; 479 ih->ih_prior = prior; 480 ih->ih_count = 0; 481 482 s = splhigh(); 483 TAILQ_INSERT_TAIL(&(sc->intrhdls), ih, ih_next); 484 splx(s); 485 486 return (ih); 487 } 488 489 void 490 b3_2706_disestablish_vmeint(vsc, cookie) 491 void *vsc; 492 void *cookie; 493 { 494 struct b3_2706_vmeintrhand *ih = cookie; 495 int s; 496 497 if (!ih) { 498 printf("b3_2706_unmap_vmeint: NULL arg\n"); 499 return; 500 } 501 502 s = splhigh(); 503 TAILQ_REMOVE(&(sc->intrhdls), ih, ih_next); 504 splx(s); 505 506 free(ih, M_DEVBUF); 507 } 508 509 void 510 b3_2706_vmeint(vsc, level, vector) 511 void *vsc; 512 int level, vector; 513 { 514 struct b3_2706_vmeintrhand *ih; 515 int found; 516 517 #ifdef BIT3DEBUG 518 printf("b3_2706_vmeint: VME IRQ %d, vec %x\n", level, vector); 519 #endif 520 found = 0; 521 522 for (ih = sc->intrhdls.tqh_first; ih; 523 ih = ih->ih_next.tqe_next) { 524 if ((ih->ih_level == level) && 525 ((ih->ih_vector == -1) || 526 (ih->ih_vector == vector))) { 527 int s, res; 528 /* 529 * We should raise the interrupt level 530 * to ih->ih_prior here. How to do this 531 * machine-independantly? 532 * To be safe, raise to the maximum. 533 */ 534 s = splhigh(); 535 found |= (res = (*(ih->ih_fun))(ih->ih_arg)); 536 splx(s); 537 if (res) 538 ih->ih_count++; 539 if (res == 1) 540 break; 541 } 542 } 543 if (!found) 544 sc->strayintrs++; 545 } 546 547 int 548 b3_2706_dmamap_create(vsc, len, am, datasize, swap, 549 nsegs, segsz, bound, 550 flags, mapp) 551 void *vsc; 552 vme_size_t len; 553 vme_am_t am; 554 vme_datasize_t datasize; 555 vme_swap_t swap; 556 int nsegs; 557 vme_size_t segsz; 558 vme_addr_t bound; 559 int flags; 560 bus_dmamap_t *mapp; 561 { 562 return (EINVAL); 563 } 564 565 void 566 b3_2706_dmamap_destroy(vsc, map) 567 void *vsc; 568 bus_dmamap_t map; 569 { 570 } 571 572 int 573 b3_2706_dmamem_alloc(vsc, len, am, datasizes, swap, segs, nsegs, rsegs, flags) 574 void *vsc; 575 vme_size_t len; 576 vme_am_t am; 577 vme_datasize_t datasizes; 578 vme_swap_t swap; 579 bus_dma_segment_t *segs; 580 int nsegs; 581 int *rsegs; 582 int flags; 583 { 584 return (EINVAL); 585 } 586 587 void 588 b3_2706_dmamem_free(vsc, segs, nsegs) 589 void *vsc; 590 bus_dma_segment_t *segs; 591 int nsegs; 592 { 593 } 594 595 #undef sc 596