1 /* $NetBSD: auich.c,v 1.3 2000/12/28 22:59:11 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 2000 Michael Shalayeff 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 60 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 63 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 64 * THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp 67 */ 68 69 /* #define ICH_DEBUG */ 70 /* 71 * AC'97 audio found on Intel 810/820/440MX chipsets. 72 * http://developer.intel.com/design/chipsets/datashts/290655.htm 73 * http://developer.intel.com/design/chipsets/manuals/298028.htm 74 * 75 * TODO: 76 * 77 * - Probe codecs for supported sample rates. 78 * 79 * - Add support for the microphone input. 80 */ 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/kernel.h> 85 #include <sys/malloc.h> 86 #include <sys/device.h> 87 #include <sys/fcntl.h> 88 #include <sys/proc.h> 89 90 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */ 91 92 #include <dev/pci/pcidevs.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/auichreg.h> 95 96 #include <sys/audioio.h> 97 #include <dev/audio_if.h> 98 #include <dev/mulaw.h> 99 #include <dev/auconv.h> 100 101 #include <machine/bus.h> 102 103 #include <dev/ic/ac97reg.h> 104 #include <dev/ic/ac97var.h> 105 106 struct auich_dma { 107 bus_dmamap_t map; 108 caddr_t addr; 109 bus_dma_segment_t segs[1]; 110 int nsegs; 111 size_t size; 112 struct auich_dma *next; 113 }; 114 115 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 116 #define KERNADDR(p) ((void *)((p)->addr)) 117 118 struct auich_cdata { 119 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX]; 120 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX]; 121 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX]; 122 }; 123 124 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x) 125 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)]) 126 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)]) 127 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)]) 128 129 struct auich_softc { 130 struct device sc_dev; 131 void *sc_ih; 132 133 audio_device_t sc_audev; 134 135 bus_space_tag_t iot; 136 bus_space_handle_t mix_ioh; 137 bus_space_handle_t aud_ioh; 138 bus_dma_tag_t dmat; 139 140 struct ac97_codec_if *codec_if; 141 struct ac97_host_if host_if; 142 143 /* DMA scatter-gather lists. */ 144 bus_dmamap_t sc_cddmamap; 145 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr 146 147 struct auich_cdata *sc_cdata; 148 #define dmalist_pcmo sc_cdata->ic_dmalist_pcmo 149 #define dmalist_pcmi sc_cdata->ic_dmalist_pcmi 150 #define dmalist_mici sc_cdata->ic_dmalist_mici 151 152 int ptr_pcmo, 153 ptr_pcmi, 154 ptr_mici; 155 156 /* i/o buffer pointers */ 157 u_int32_t pcmo_start, pcmo_p, pcmo_end; 158 int pcmo_blksize, pcmo_fifoe; 159 160 u_int32_t pcmi_start, pcmi_p, pcmi_end; 161 int pcmi_blksize, pcmi_fifoe; 162 163 u_int32_t mici_start, mici_p, mici_end; 164 int mici_blksize, mici_fifoe; 165 166 struct auich_dma *sc_dmas; 167 168 void (*sc_pintr)(void *); 169 void *sc_parg; 170 171 void (*sc_rintr)(void *); 172 void *sc_rarg; 173 }; 174 175 /* Debug */ 176 #ifdef AUDIO_DEBUG 177 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0) 178 int auich_debug = 0xfffe; 179 #define ICH_DEBUG_CODECIO 0x0001 180 #define ICH_DEBUG_DMA 0x0002 181 #define ICH_DEBUG_PARAM 0x0004 182 #else 183 #define DPRINTF(x,y) /* nothing */ 184 #endif 185 186 int auich_match(struct device *, struct cfdata *, void *); 187 void auich_attach(struct device *, struct device *, void *); 188 int auich_intr(void *); 189 190 struct cfattach auich_ca = { 191 sizeof(struct auich_softc), auich_match, auich_attach 192 }; 193 194 int auich_open(void *, int); 195 void auich_close(void *); 196 int auich_query_encoding(void *, struct audio_encoding *); 197 int auich_set_params(void *, int, int, struct audio_params *, 198 struct audio_params *); 199 int auich_round_blocksize(void *, int); 200 int auich_halt_output(void *); 201 int auich_halt_input(void *); 202 int auich_getdev(void *, struct audio_device *); 203 int auich_set_port(void *, mixer_ctrl_t *); 204 int auich_get_port(void *, mixer_ctrl_t *); 205 int auich_query_devinfo(void *, mixer_devinfo_t *); 206 void *auich_allocm(void *, int, size_t, int, int); 207 void auich_freem(void *, void *, int); 208 size_t auich_round_buffersize(void *, int, size_t); 209 paddr_t auich_mappage(void *, void *, off_t, int); 210 int auich_get_props(void *); 211 int auich_trigger_output(void *, void *, void *, int, void (*)(void *), 212 void *, struct audio_params *); 213 int auich_trigger_input(void *, void *, void *, int, void (*)(void *), 214 void *, struct audio_params *); 215 216 int auich_alloc_cdata(struct auich_softc *); 217 218 int auich_allocmem(struct auich_softc *, size_t, size_t, 219 struct auich_dma *); 220 int auich_freemem(struct auich_softc *, struct auich_dma *); 221 222 struct audio_hw_if auich_hw_if = { 223 auich_open, 224 auich_close, 225 NULL, /* drain */ 226 auich_query_encoding, 227 auich_set_params, 228 auich_round_blocksize, 229 NULL, /* commit_setting */ 230 NULL, /* init_output */ 231 NULL, /* init_input */ 232 NULL, /* start_output */ 233 NULL, /* start_input */ 234 auich_halt_output, 235 auich_halt_input, 236 NULL, /* speaker_ctl */ 237 auich_getdev, 238 NULL, /* getfd */ 239 auich_set_port, 240 auich_get_port, 241 auich_query_devinfo, 242 auich_allocm, 243 auich_freem, 244 auich_round_buffersize, 245 auich_mappage, 246 auich_get_props, 247 auich_trigger_output, 248 auich_trigger_input, 249 }; 250 251 int auich_attach_codec(void *, struct ac97_codec_if *); 252 int auich_read_codec(void *, u_int8_t, u_int16_t *); 253 int auich_write_codec(void *, u_int8_t, u_int16_t); 254 void auich_reset_codec(void *); 255 256 static const struct auich_devtype { 257 int product; 258 const char *name; 259 const char *shortname; 260 } auich_devices[] = { 261 { PCI_PRODUCT_INTEL_82801AA_ACA, 262 "i82801AA (ICH) AC-97 Audio", "ICH" }, 263 { PCI_PRODUCT_INTEL_82801AB_ACA, 264 "i82801AB (ICH0) AC-97 Audio", "ICH0" }, 265 { PCI_PRODUCT_INTEL_82801BA_ACA, 266 "i82801BA (ICH2) AC-97 Audio", "ICH2" }, 267 { PCI_PRODUCT_INTEL_82440MX_ACA, 268 "i82440MX AC-97 Audio", "440MX" }, 269 270 { 0, 271 NULL, NULL }, 272 }; 273 274 static const struct auich_devtype * 275 auich_lookup(struct pci_attach_args *pa) 276 { 277 const struct auich_devtype *d; 278 279 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 280 return (NULL); 281 282 for (d = auich_devices; d->name != NULL; d++) { 283 if (PCI_PRODUCT(pa->pa_id) == d->product) 284 return (d); 285 } 286 287 return (NULL); 288 } 289 290 int 291 auich_match(struct device *parent, struct cfdata *match, void *aux) 292 { 293 struct pci_attach_args *pa = aux; 294 295 if (auich_lookup(pa) != NULL) 296 return (1); 297 298 return (0); 299 } 300 301 void 302 auich_attach(struct device *parent, struct device *self, void *aux) 303 { 304 struct auich_softc *sc = (struct auich_softc *)self; 305 struct pci_attach_args *pa = aux; 306 pci_intr_handle_t ih; 307 bus_size_t mix_size, aud_size; 308 pcireg_t csr; 309 const char *intrstr; 310 const struct auich_devtype *d; 311 312 d = auich_lookup(pa); 313 if (d == NULL) 314 panic("auich_attach: impossible"); 315 316 printf(": %s\n", d->name); 317 318 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0, 319 &sc->iot, &sc->mix_ioh, NULL, &mix_size)) { 320 printf("%s: can't map codec i/o space\n", 321 sc->sc_dev.dv_xname); 322 return; 323 } 324 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0, 325 &sc->iot, &sc->aud_ioh, NULL, &aud_size)) { 326 printf("%s: can't map device i/o space\n", 327 sc->sc_dev.dv_xname); 328 return; 329 } 330 sc->dmat = pa->pa_dmat; 331 332 /* enable bus mastering */ 333 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 334 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 335 csr | PCI_COMMAND_MASTER_ENABLE); 336 337 /* Map and establish the interrupt. */ 338 if (pci_intr_map(pa, &ih)) { 339 printf("%s: can't map interrupt\n", sc->sc_dev.dv_xname); 340 return; 341 } 342 intrstr = pci_intr_string(pa->pa_pc, ih); 343 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, 344 auich_intr, sc); 345 if (sc->sc_ih == NULL) { 346 printf("%s: can't establish interrupt", sc->sc_dev.dv_xname); 347 if (intrstr != NULL) 348 printf(" at %s", intrstr); 349 printf("\n"); 350 return; 351 } 352 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 353 354 sprintf(sc->sc_audev.name, "%s AC97", d->shortname); 355 sprintf(sc->sc_audev.version, "0x%02x", PCI_REVISION(pa->pa_class)); 356 strcpy(sc->sc_audev.config, sc->sc_dev.dv_xname); 357 358 /* Set up DMA lists. */ 359 sc->ptr_pcmo = sc->ptr_pcmi = sc->ptr_mici = 0; 360 auich_alloc_cdata(sc); 361 362 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n", 363 sc->dmalist_pcmo, sc->dmalist_pcmi, sc->dmalist_mici)); 364 365 /* Reset codec and AC'97 */ 366 auich_reset_codec(sc); 367 368 sc->host_if.arg = sc; 369 sc->host_if.attach = auich_attach_codec; 370 sc->host_if.read = auich_read_codec; 371 sc->host_if.write = auich_write_codec; 372 sc->host_if.reset = auich_reset_codec; 373 374 if (ac97_attach(&sc->host_if) != 0) 375 return; 376 377 audio_attach_mi(&auich_hw_if, sc, &sc->sc_dev); 378 } 379 380 int 381 auich_read_codec(void *v, u_int8_t reg, u_int16_t *val) 382 { 383 struct auich_softc *sc = v; 384 int i; 385 386 /* wait for an access semaphore */ 387 for (i = ICH_SEMATIMO; i-- && 388 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 389 390 if (i > 0) { 391 *val = bus_space_read_2(sc->iot, sc->mix_ioh, reg); 392 DPRINTF(ICH_DEBUG_CODECIO, 393 ("auich_read_codec(%x, %x)\n", reg, *val)); 394 395 return 0; 396 } else { 397 DPRINTF(ICH_DEBUG_CODECIO, 398 ("%s: read_codec timeout\n", sc->sc_dev.dv_xname)); 399 return -1; 400 } 401 } 402 403 int 404 auich_write_codec(void *v, u_int8_t reg, u_int16_t val) 405 { 406 struct auich_softc *sc = v; 407 int i; 408 409 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val)); 410 411 /* wait for an access semaphore */ 412 for (i = ICH_SEMATIMO; i-- && 413 bus_space_read_1(sc->iot, sc->aud_ioh, ICH_CAS) & 1; DELAY(1)); 414 415 if (i > 0) { 416 bus_space_write_2(sc->iot, sc->mix_ioh, reg, val); 417 return 0; 418 } else { 419 DPRINTF(ICH_DEBUG_CODECIO, 420 ("%s: write_codec timeout\n", sc->sc_dev.dv_xname)); 421 return -1; 422 } 423 } 424 425 int 426 auich_attach_codec(void *v, struct ac97_codec_if *cif) 427 { 428 struct auich_softc *sc = v; 429 430 sc->codec_if = cif; 431 return 0; 432 } 433 434 void 435 auich_reset_codec(void *v) 436 { 437 struct auich_softc *sc = v; 438 439 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, 0); 440 DELAY(10); 441 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_GCTRL, ICH_CRESET); 442 } 443 444 int 445 auich_open(void *v, int flags) 446 { 447 448 return 0; 449 } 450 451 void 452 auich_close(void *v) 453 { 454 struct auich_softc *sc = v; 455 456 auich_halt_output(sc); 457 auich_halt_input(sc); 458 459 sc->sc_pintr = NULL; 460 sc->sc_rintr = NULL; 461 } 462 463 int 464 auich_query_encoding(void *v, struct audio_encoding *aep) 465 { 466 switch (aep->index) { 467 #if 0 /* XXX Not until we emulate it. */ 468 case 0: 469 strcpy(aep->name, AudioEulinear); 470 aep->encoding = AUDIO_ENCODING_ULINEAR; 471 aep->precision = 8; 472 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 473 return (0); 474 #endif 475 case 1: 476 strcpy(aep->name, AudioEmulaw); 477 aep->encoding = AUDIO_ENCODING_ULAW; 478 aep->precision = 8; 479 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 480 return (0); 481 case 2: 482 strcpy(aep->name, AudioEalaw); 483 aep->encoding = AUDIO_ENCODING_ALAW; 484 aep->precision = 8; 485 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 486 return (0); 487 case 3: 488 strcpy(aep->name, AudioEslinear); 489 aep->encoding = AUDIO_ENCODING_SLINEAR; 490 aep->precision = 8; 491 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 492 return (0); 493 case 4: 494 strcpy(aep->name, AudioEslinear_le); 495 aep->encoding = AUDIO_ENCODING_SLINEAR_LE; 496 aep->precision = 16; 497 aep->flags = 0; 498 return (0); 499 case 5: 500 strcpy(aep->name, AudioEulinear_le); 501 aep->encoding = AUDIO_ENCODING_ULINEAR_LE; 502 aep->precision = 16; 503 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 504 return (0); 505 case 6: 506 strcpy(aep->name, AudioEslinear_be); 507 aep->encoding = AUDIO_ENCODING_SLINEAR_BE; 508 aep->precision = 16; 509 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 510 return (0); 511 case 7: 512 strcpy(aep->name, AudioEulinear_be); 513 aep->encoding = AUDIO_ENCODING_ULINEAR_BE; 514 aep->precision = 16; 515 aep->flags = AUDIO_ENCODINGFLAG_EMULATED; 516 return (0); 517 default: 518 return (EINVAL); 519 } 520 } 521 522 int 523 auich_set_params(void *v, int setmode, int usemode, struct audio_params *play, 524 struct audio_params *rec) 525 { 526 struct auich_softc *sc = v; 527 struct audio_params *p; 528 int mode; 529 u_int16_t val, rate, inout; 530 531 for (mode = AUMODE_RECORD; mode != -1; 532 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 533 if ((setmode & mode) == 0) 534 continue; 535 536 p = mode == AUMODE_PLAY ? play : rec; 537 if (p == NULL) 538 continue; 539 540 inout = mode == AUMODE_PLAY ? ICH_PM_PCMO : ICH_PM_PCMI; 541 542 /* 543 * XXX NEED TO DETERMINE WHICH RATES THE CODEC SUPPORTS! 544 */ 545 if (p->sample_rate != 48000) 546 return (EINVAL); 547 548 p->factor = 1; 549 p->sw_code = NULL; 550 switch (p->encoding) { 551 case AUDIO_ENCODING_SLINEAR_BE: 552 if (p->precision == 16) 553 p->sw_code = swap_bytes; 554 else { 555 if (mode == AUMODE_PLAY) 556 p->sw_code = linear8_to_linear16_le; 557 else 558 p->sw_code = linear16_to_linear8_le; 559 } 560 break; 561 562 case AUDIO_ENCODING_SLINEAR_LE: 563 if (p->precision != 16) { 564 if (mode == AUMODE_PLAY) 565 p->sw_code = linear8_to_linear16_le; 566 else 567 p->sw_code = linear16_to_linear8_le; 568 } 569 break; 570 571 case AUDIO_ENCODING_ULINEAR_BE: 572 if (p->precision == 16) { 573 if (mode == AUMODE_PLAY) 574 p->sw_code = 575 swap_bytes_change_sign16_le; 576 else 577 p->sw_code = 578 change_sign16_swap_bytes_le; 579 } else { 580 /* 581 * XXX ulinear8_to_slinear16_le 582 */ 583 return (EINVAL); 584 } 585 break; 586 587 case AUDIO_ENCODING_ULINEAR_LE: 588 if (p->precision == 16) 589 p->sw_code = change_sign16_le; 590 else { 591 /* 592 * XXX ulinear8_to_slinear16_le 593 */ 594 return (EINVAL); 595 } 596 break; 597 598 case AUDIO_ENCODING_ULAW: 599 if (mode == AUMODE_PLAY) { 600 p->factor = 2; 601 p->sw_code = mulaw_to_slinear16_le; 602 } else { 603 /* 604 * XXX slinear16_le_to_mulaw 605 */ 606 return (EINVAL); 607 } 608 break; 609 610 case AUDIO_ENCODING_ALAW: 611 if (mode == AUMODE_PLAY) { 612 p->factor = 2; 613 p->sw_code = alaw_to_slinear16_le; 614 } else { 615 /* 616 * XXX slinear16_le_to_alaw 617 */ 618 return (EINVAL); 619 } 620 break; 621 622 default: 623 return (EINVAL); 624 } 625 626 auich_read_codec(sc, AC97_REG_POWER, &val); 627 auich_write_codec(sc, AC97_REG_POWER, val | inout); 628 629 auich_write_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, 630 p->sample_rate); 631 auich_read_codec(sc, AC97_REG_PCM_FRONT_DAC_RATE, &rate); 632 p->sample_rate = rate; 633 634 auich_write_codec(sc, AC97_REG_POWER, val); 635 } 636 637 return (0); 638 } 639 640 int 641 auich_round_blocksize(void *v, int blk) 642 { 643 644 return (blk & ~0x3f); /* keep good alignment */ 645 } 646 647 int 648 auich_halt_output(void *v) 649 { 650 struct auich_softc *sc = v; 651 652 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", sc->sc_dev.dv_xname)); 653 654 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, ICH_RR); 655 656 return (0); 657 } 658 659 int 660 auich_halt_input(void *v) 661 { 662 struct auich_softc *sc = v; 663 664 DPRINTF(ICH_DEBUG_DMA, 665 ("%s: halt_input\n", sc->sc_dev.dv_xname)); 666 667 /* XXX halt both unless known otherwise */ 668 669 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR); 670 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_MICI + ICH_CTRL, ICH_RR); 671 672 return (0); 673 } 674 675 int 676 auich_getdev(void *v, struct audio_device *adp) 677 { 678 struct auich_softc *sc = v; 679 680 *adp = sc->sc_audev; 681 return (0); 682 } 683 684 int 685 auich_set_port(void *v, mixer_ctrl_t *cp) 686 { 687 struct auich_softc *sc = v; 688 689 return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp)); 690 } 691 692 int 693 auich_get_port(void *v, mixer_ctrl_t *cp) 694 { 695 struct auich_softc *sc = v; 696 697 return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp)); 698 } 699 700 int 701 auich_query_devinfo(void *v, mixer_devinfo_t *dp) 702 { 703 struct auich_softc *sc = v; 704 705 return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp)); 706 } 707 708 void * 709 auich_allocm(void *v, int direction, size_t size, int pool, int flags) 710 { 711 struct auich_softc *sc = v; 712 struct auich_dma *p; 713 int error; 714 715 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 716 return (NULL); 717 718 p = malloc(sizeof(*p), pool, flags); 719 if (p == NULL) 720 return (NULL); 721 memset(p, 0, sizeof(*p)); 722 723 error = auich_allocmem(sc, size, 0, p); 724 if (error) { 725 free(p, pool); 726 return (NULL); 727 } 728 729 p->next = sc->sc_dmas; 730 sc->sc_dmas = p; 731 732 return (KERNADDR(p)); 733 } 734 735 void 736 auich_freem(void *v, void *ptr, int pool) 737 { 738 struct auich_softc *sc = v; 739 struct auich_dma *p, **pp; 740 741 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 742 if (KERNADDR(p) == ptr) { 743 auich_freemem(sc, p); 744 *pp = p->next; 745 free(p, pool); 746 return; 747 } 748 } 749 } 750 751 size_t 752 auich_round_buffersize(void *v, int direction, size_t size) 753 { 754 755 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX)) 756 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX; 757 758 return size; 759 } 760 761 paddr_t 762 auich_mappage(void *v, void *mem, off_t off, int prot) 763 { 764 struct auich_softc *sc = v; 765 struct auich_dma *p; 766 767 if (off < 0) 768 return (-1); 769 770 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 771 ; 772 if (!p) 773 return (-1); 774 return (bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs, 775 off, prot, BUS_DMA_WAITOK)); 776 } 777 778 int 779 auich_get_props(void *v) 780 { 781 782 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 783 AUDIO_PROP_FULLDUPLEX); 784 } 785 786 int 787 auich_intr(void *v) 788 { 789 struct auich_softc *sc = v; 790 int ret = 0, sts, gsts, i, qptr; 791 792 gsts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_GSTS); 793 DPRINTF(ICH_DEBUG_DMA, ("auich_intr: gsts=0x%x\n", gsts)); 794 795 if (gsts & ICH_POINT) { 796 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMO+ICH_STS); 797 DPRINTF(ICH_DEBUG_DMA, 798 ("auich_intr: osts=0x%x\n", sts)); 799 800 if (sts & ICH_FIFOE) { 801 printf("%s: fifo underrun # %u\n", 802 sc->sc_dev.dv_xname, ++sc->pcmo_fifoe); 803 } 804 805 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CIV); 806 if (sts & (ICH_LVBCI | ICH_CELV)) { 807 struct auich_dmalist *q; 808 809 qptr = sc->ptr_pcmo; 810 811 while (qptr != i) { 812 q = &sc->dmalist_pcmo[qptr]; 813 814 q->base = sc->pcmo_p; 815 q->len = (sc->pcmo_blksize / 2) | ICH_DMAF_IOC; 816 DPRINTF(ICH_DEBUG_DMA, 817 ("auich_intr: %p, %p = %x @ 0x%x\n", 818 &sc->dmalist_pcmo[i], q, 819 sc->pcmo_blksize / 2, sc->pcmo_p)); 820 821 sc->pcmo_p += sc->pcmo_blksize; 822 if (sc->pcmo_p >= sc->pcmo_end) 823 sc->pcmo_p = sc->pcmo_start; 824 825 if (++qptr == ICH_DMALIST_MAX) 826 qptr = 0; 827 } 828 829 sc->ptr_pcmo = qptr; 830 bus_space_write_1(sc->iot, sc->aud_ioh, 831 ICH_PCMO + ICH_LVI, 832 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 833 } 834 835 if (sts & ICH_BCIS && sc->sc_pintr) 836 sc->sc_pintr(sc->sc_parg); 837 838 /* int ack */ 839 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_STS, 840 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 841 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 842 ret++; 843 } 844 845 if (gsts & ICH_PIINT) { 846 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_PCMI+ICH_STS); 847 DPRINTF(ICH_DEBUG_DMA, 848 ("auich_intr: ists=0x%x\n", sts)); 849 850 if (sts & ICH_FIFOE) { 851 printf("%s: fifo overrun # %u\n", 852 sc->sc_dev.dv_xname, ++sc->pcmi_fifoe); 853 } 854 855 i = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV); 856 if (sts & (ICH_LVBCI | ICH_CELV)) { 857 struct auich_dmalist *q; 858 859 qptr = sc->ptr_pcmi; 860 861 while (qptr != i) { 862 q = &sc->dmalist_pcmi[qptr]; 863 864 q->base = sc->pcmi_p; 865 q->len = (sc->pcmi_blksize / 2) | ICH_DMAF_IOC; 866 DPRINTF(ICH_DEBUG_DMA, 867 ("auich_intr: %p, %p = %x @ 0x%x\n", 868 &sc->dmalist_pcmi[i], q, 869 sc->pcmi_blksize / 2, sc->pcmi_p)); 870 871 sc->pcmi_p += sc->pcmi_blksize; 872 if (sc->pcmi_p >= sc->pcmi_end) 873 sc->pcmi_p = sc->pcmi_start; 874 875 if (++qptr == ICH_DMALIST_MAX) 876 qptr = 0; 877 } 878 879 sc->ptr_pcmi = qptr; 880 bus_space_write_1(sc->iot, sc->aud_ioh, 881 ICH_PCMI + ICH_LVI, 882 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 883 } 884 885 if (sts & ICH_BCIS && sc->sc_rintr) 886 sc->sc_rintr(sc->sc_rarg); 887 888 /* int ack */ 889 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_STS, 890 sts & (ICH_LVBCI | ICH_CELV | ICH_BCIS | ICH_FIFOE)); 891 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_POINT); 892 ret++; 893 } 894 895 if (gsts & ICH_MIINT) { 896 sts = bus_space_read_2(sc->iot, sc->aud_ioh, ICH_MICI+ICH_STS); 897 DPRINTF(ICH_DEBUG_DMA, 898 ("auich_intr: ists=0x%x\n", sts)); 899 if (sts & ICH_FIFOE) 900 printf("%s: fifo overrun\n", sc->sc_dev.dv_xname); 901 902 /* TODO mic input dma */ 903 904 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_GSTS, ICH_MIINT); 905 } 906 907 return ret; 908 } 909 910 int 911 auich_trigger_output(void *v, void *start, void *end, int blksize, 912 void (*intr)(void *), void *arg, struct audio_params *param) 913 { 914 struct auich_softc *sc = v; 915 struct auich_dmalist *q; 916 struct auich_dma *p; 917 size_t size; 918 919 DPRINTF(ICH_DEBUG_DMA, 920 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n", 921 start, end, blksize, intr, arg, param)); 922 923 sc->sc_pintr = intr; 924 sc->sc_parg = arg; 925 926 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 927 ; 928 if (!p) { 929 printf("auich_trigger_output: bad addr %p\n", start); 930 return (EINVAL); 931 } 932 933 size = (size_t)((caddr_t)end - (caddr_t)start); 934 935 /* 936 * The logic behind this is: 937 * setup one buffer to play, then LVI dump out the rest 938 * to the scatter-gather chain. 939 */ 940 sc->pcmo_start = DMAADDR(p); 941 sc->pcmo_p = sc->pcmo_start + blksize; 942 sc->pcmo_end = sc->pcmo_start + size; 943 sc->pcmo_blksize = blksize; 944 945 sc->ptr_pcmo = 0; 946 q = &sc->dmalist_pcmo[sc->ptr_pcmo]; 947 q->base = sc->pcmo_start; 948 q->len = (blksize / 2) | ICH_DMAF_IOC; 949 if (++sc->ptr_pcmo == ICH_DMALIST_MAX) 950 sc->ptr_pcmo = 0; 951 952 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR, 953 sc->sc_cddma + ICH_PCMO_OFF(0)); 954 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_CTRL, 955 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 956 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_LVI, 957 (sc->ptr_pcmo - 1) & ICH_LVI_MASK); 958 959 return (0); 960 } 961 962 int 963 auich_trigger_input(v, start, end, blksize, intr, arg, param) 964 void *v; 965 void *start, *end; 966 int blksize; 967 void (*intr)(void *); 968 void *arg; 969 struct audio_params *param; 970 { 971 struct auich_softc *sc = v; 972 struct auich_dmalist *q; 973 struct auich_dma *p; 974 size_t size; 975 976 DPRINTF(ICH_DEBUG_DMA, 977 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n", 978 start, end, blksize, intr, arg, param)); 979 980 sc->sc_rintr = intr; 981 sc->sc_rarg = arg; 982 983 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 984 ; 985 if (!p) { 986 printf("auich_trigger_input: bad addr %p\n", start); 987 return (EINVAL); 988 } 989 990 size = (size_t)((caddr_t)end - (caddr_t)start); 991 992 /* 993 * The logic behind this is: 994 * setup one buffer to play, then LVI dump out the rest 995 * to the scatter-gather chain. 996 */ 997 sc->pcmi_start = DMAADDR(p); 998 sc->pcmi_p = sc->pcmi_start + blksize; 999 sc->pcmi_end = sc->pcmi_start + size; 1000 sc->pcmi_blksize = blksize; 1001 1002 sc->ptr_pcmi = 0; 1003 q = &sc->dmalist_pcmi[sc->ptr_pcmi]; 1004 q->base = sc->pcmi_start; 1005 q->len = (blksize / 2) | ICH_DMAF_IOC; 1006 if (++sc->ptr_pcmi == ICH_DMALIST_MAX) 1007 sc->ptr_pcmi = 0; 1008 1009 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR, 1010 sc->sc_cddma + ICH_PCMI_OFF(0)); 1011 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 1012 ICH_IOCE | ICH_FEIE | ICH_LVBIE | ICH_RPBM); 1013 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI, 1014 (sc->ptr_pcmi - 1) & ICH_LVI_MASK); 1015 1016 return (0); 1017 } 1018 1019 int 1020 auich_allocmem(struct auich_softc *sc, size_t size, size_t align, 1021 struct auich_dma *p) 1022 { 1023 int error; 1024 1025 p->size = size; 1026 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0, 1027 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1028 &p->nsegs, BUS_DMA_NOWAIT); 1029 if (error) 1030 return (error); 1031 1032 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size, 1033 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1034 if (error) 1035 goto free; 1036 1037 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size, 1038 0, BUS_DMA_NOWAIT, &p->map); 1039 if (error) 1040 goto unmap; 1041 1042 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL, 1043 BUS_DMA_NOWAIT); 1044 if (error) 1045 goto destroy; 1046 return (0); 1047 1048 destroy: 1049 bus_dmamap_destroy(sc->dmat, p->map); 1050 unmap: 1051 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1052 free: 1053 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1054 return (error); 1055 } 1056 1057 int 1058 auich_freemem(struct auich_softc *sc, struct auich_dma *p) 1059 { 1060 1061 bus_dmamap_unload(sc->dmat, p->map); 1062 bus_dmamap_destroy(sc->dmat, p->map); 1063 bus_dmamem_unmap(sc->dmat, p->addr, p->size); 1064 bus_dmamem_free(sc->dmat, p->segs, p->nsegs); 1065 return (0); 1066 } 1067 1068 int 1069 auich_alloc_cdata(struct auich_softc *sc) 1070 { 1071 bus_dma_segment_t seg; 1072 int error, rseg; 1073 1074 /* 1075 * Allocate the control data structure, and create and load the 1076 * DMA map for it. 1077 */ 1078 if ((error = bus_dmamem_alloc(sc->dmat, 1079 sizeof(struct auich_cdata), 1080 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) { 1081 printf("%s: unable to allocate control data, error = %d\n", 1082 sc->sc_dev.dv_xname, error); 1083 goto fail_0; 1084 } 1085 1086 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg, 1087 sizeof(struct auich_cdata), 1088 (caddr_t *) &sc->sc_cdata, 1089 BUS_DMA_COHERENT)) != 0) { 1090 printf("%s: unable to map control data, error = %d\n", 1091 sc->sc_dev.dv_xname, error); 1092 goto fail_1; 1093 } 1094 1095 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1, 1096 sizeof(struct auich_cdata), 0, 0, 1097 &sc->sc_cddmamap)) != 0) { 1098 printf("%s: unable to create control data DMA map, " 1099 "error = %d\n", sc->sc_dev.dv_xname, error); 1100 goto fail_2; 1101 } 1102 1103 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap, 1104 sc->sc_cdata, sizeof(struct auich_cdata), 1105 NULL, 0)) != 0) { 1106 printf("%s: unable tp load control data DMA map, " 1107 "error = %d\n", sc->sc_dev.dv_xname, error); 1108 goto fail_3; 1109 } 1110 1111 return (0); 1112 1113 fail_3: 1114 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap); 1115 fail_2: 1116 bus_dmamem_unmap(sc->dmat, (caddr_t) sc->sc_cdata, 1117 sizeof(struct auich_cdata)); 1118 fail_1: 1119 bus_dmamem_free(sc->dmat, &seg, rseg); 1120 fail_0: 1121 return (error); 1122 } 1123