1 /* $NetBSD: artsata.c,v 1.4 2004/08/20 06:39:38 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcidevs.h> 44 #include <dev/pci/pciidereg.h> 45 #include <dev/pci/pciidevar.h> 46 47 static void artisea_chip_map(struct pciide_softc*, struct pci_attach_args *); 48 49 static int artsata_match(struct device *, struct cfdata *, void *); 50 static void artsata_attach(struct device *, struct device *, void *); 51 52 static const struct pciide_product_desc pciide_artsata_products[] = { 53 { PCI_PRODUCT_INTEL_31244, 54 0, 55 "Intel 31244 Serial ATA Controller", 56 artisea_chip_map, 57 }, 58 { 0, 59 0, 60 NULL, 61 NULL 62 } 63 }; 64 65 CFATTACH_DECL(artsata, sizeof(struct pciide_softc), 66 artsata_match, artsata_attach, NULL, NULL); 67 68 static int 69 artsata_match(struct device *parent, struct cfdata *match, void *aux) 70 { 71 struct pci_attach_args *pa = aux; 72 73 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { 74 if (pciide_lookup_product(pa->pa_id, pciide_artsata_products)) 75 return (2); 76 } 77 return (0); 78 } 79 80 static void 81 artsata_attach(struct device *parent, struct device *self, void *aux) 82 { 83 struct pci_attach_args *pa = aux; 84 struct pciide_softc *sc = (struct pciide_softc *)self; 85 86 pciide_common_attach(sc, pa, 87 pciide_lookup_product(pa->pa_id, pciide_artsata_products)); 88 89 } 90 91 static void 92 artisea_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 93 { 94 struct pciide_channel *cp; 95 bus_size_t cmdsize, ctlsize; 96 pcireg_t interface; 97 int channel; 98 99 if (pciide_chipen(sc, pa) == 0) 100 return; 101 102 aprint_normal("%s: bus-master DMA support present", 103 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 104 #ifndef PCIIDE_I31244_ENABLEDMA 105 if (sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_31244 && 106 PCI_REVISION(pa->pa_class) == 0) { 107 aprint_normal(" but disabled due to rev. 0"); 108 sc->sc_dma_ok = 0; 109 } else 110 #endif 111 pciide_mapreg_dma(sc, pa); 112 aprint_normal("\n"); 113 114 /* 115 * XXX Configure LEDs to show activity. 116 */ 117 118 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 119 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 120 if (sc->sc_dma_ok) { 121 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 122 sc->sc_wdcdev.irqack = pciide_irqack; 123 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 124 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 125 } 126 sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; 127 128 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 129 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 130 131 wdc_allocate_regs(&sc->sc_wdcdev); 132 133 interface = PCI_INTERFACE(pa->pa_class); 134 135 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 136 channel++) { 137 cp = &sc->pciide_channels[channel]; 138 if (pciide_chansetup(sc, channel, interface) == 0) 139 continue; 140 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 141 pciide_pci_intr); 142 } 143 } 144