xref: /netbsd-src/sys/dev/pci/ahcisata_pci.c (revision 466a16a118933bd295a8a104f095714fadf9cf68)
1 /*	$NetBSD: ahcisata_pci.c,v 1.13 2008/12/08 15:35:23 tron Exp $	*/
2 
3 /*
4  * Copyright (c) 2006 Manuel Bouyer.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Manuel Bouyer.
17  * 4. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.13 2008/12/08 15:35:23 tron Exp $");
35 
36 #include <sys/types.h>
37 #include <sys/malloc.h>
38 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/disklabel.h>
42 #include <sys/pmf.h>
43 
44 #include <uvm/uvm_extern.h>
45 
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcidevs.h>
48 #include <dev/pci/pciidereg.h>
49 #include <dev/pci/pciidevar.h>
50 #include <dev/ic/ahcisatavar.h>
51 
52 #define AHCI_PCI_QUIRK_FORCE	1	/* force attach */
53 
54 static const struct pci_quirkdata ahci_pci_quirks[] = {
55 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA,
56 	    AHCI_PCI_QUIRK_FORCE },
57 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA,
58 	    AHCI_PCI_QUIRK_FORCE },
59 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_1,
60 	    AHCI_PCI_QUIRK_FORCE },
61 };
62 
63 struct ahci_pci_softc {
64 	struct ahci_softc ah_sc;
65 	pci_chipset_tag_t sc_pc;
66 	pcitag_t sc_pcitag;
67 };
68 
69 
70 static int  ahci_pci_match(device_t, cfdata_t, void *);
71 static void ahci_pci_attach(device_t, device_t, void *);
72 const struct pci_quirkdata *ahci_pci_lookup_quirkdata(pci_vendor_id_t,
73 						      pci_product_id_t);
74 static bool ahci_pci_resume(device_t PMF_FN_PROTO);
75 
76 
77 CFATTACH_DECL_NEW(ahcisata_pci, sizeof(struct ahci_pci_softc),
78     ahci_pci_match, ahci_pci_attach, NULL, NULL);
79 
80 static int
81 ahci_pci_match(device_t parent, cfdata_t match, void *aux)
82 {
83 	struct pci_attach_args *pa = aux;
84 	bus_space_tag_t regt;
85 	bus_space_handle_t regh;
86 	bus_size_t size;
87 	int ret = 0;
88 	const struct pci_quirkdata *quirks;
89 
90 	quirks = ahci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
91 					   PCI_PRODUCT(pa->pa_id));
92 
93 	/* if wrong class and not forced by quirks, don't match */
94 	if ((PCI_CLASS(pa->pa_class) != PCI_CLASS_MASS_STORAGE ||
95 	    ((PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_SATA ||
96 	     PCI_INTERFACE(pa->pa_class) != PCI_INTERFACE_SATA_AHCI) &&
97 	     PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_RAID)) &&
98 	    (quirks == NULL || (quirks->quirks & AHCI_PCI_QUIRK_FORCE) == 0))
99 		return 0;
100 
101 	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
102 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
103 	    &regt, &regh, NULL, &size) != 0)
104 		return 0;
105 
106 	if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
107 	     PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) ||
108 	    (quirks && quirks->quirks & AHCI_PCI_QUIRK_FORCE) ||
109 	    (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE))
110 		ret = 3;
111 
112 	bus_space_unmap(regt, regh, size);
113 	return ret;
114 }
115 
116 static void
117 ahci_pci_attach(device_t parent, device_t self, void *aux)
118 {
119 	struct pci_attach_args *pa = aux;
120 	struct ahci_pci_softc *psc = device_private(self);
121 	struct ahci_softc *sc = &psc->ah_sc;
122 	bus_size_t size;
123 	char devinfo[256];
124 	const char *intrstr;
125 	pci_intr_handle_t intrhandle;
126 	void *ih;
127 
128 	sc->sc_atac.atac_dev = self;
129 
130 	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
131 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
132 	    &sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) {
133 		aprint_error_dev(self, "can't map ahci registers\n");
134 		return;
135 	}
136 	psc->sc_pc = pa->pa_pc;
137 	psc->sc_pcitag = pa->pa_tag;
138 
139 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
140 	aprint_naive(": AHCI disk controller\n");
141 	aprint_normal(": %s\n", devinfo);
142 
143 	if (pci_intr_map(pa, &intrhandle) != 0) {
144 		aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc));
145 		return;
146 	}
147 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
148 	ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
149 	if (ih == NULL) {
150 		aprint_error("%s: couldn't establish interrupt", AHCINAME(sc));
151 		return;
152 	}
153 	aprint_normal("%s: interrupting at %s\n", AHCINAME(sc),
154 	    intrstr ? intrstr : "unknown interrupt");
155 	sc->sc_dmat = pa->pa_dmat;
156 
157 	if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) {
158 		AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE);
159 		sc->sc_atac_capflags = ATAC_CAP_RAID;
160 	} else {
161 		AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE);
162 	}
163 
164 	ahci_attach(sc);
165 
166 	if (!pmf_device_register(self, NULL, ahci_pci_resume))
167 		aprint_error_dev(self, "couldn't establish power handler\n");
168 }
169 
170 static bool
171 ahci_pci_resume(device_t dv PMF_FN_ARGS)
172 {
173 	struct ahci_pci_softc *psc = device_private(dv);
174 	struct ahci_softc *sc = &psc->ah_sc;
175 	int s;
176 
177 	s = splbio();
178 	ahci_reset(sc);
179 	ahci_setup_ports(sc);
180 	ahci_reprobe_drives(sc);
181 	ahci_enable_intrs(sc);
182 	splx(s);
183 
184 	return true;
185 }
186 
187 const struct pci_quirkdata *
188 ahci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product)
189 {
190 	int i;
191 
192 	for (i = 0; i < (sizeof ahci_pci_quirks / sizeof ahci_pci_quirks[0]);
193 	     i++)
194 		if (vendor == ahci_pci_quirks[i].vendor &&
195 		    product == ahci_pci_quirks[i].product)
196 			return (&ahci_pci_quirks[i]);
197 	return (NULL);
198 }
199