xref: /netbsd-src/sys/dev/pci/agp_via.c (revision daf6c4152fcddc27c445489775ed1f66ab4ea9a9)
1 /*	$NetBSD: agp_via.c,v 1.20 2011/02/15 08:56:11 jmcneill Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000 Doug Rabson
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  *	$FreeBSD: src/sys/pci/agp_via.c,v 1.3 2001/07/05 21:28:47 jhb Exp $
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: agp_via.c,v 1.20 2011/02/15 08:56:11 jmcneill Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/malloc.h>
37 #include <sys/kernel.h>
38 #include <sys/proc.h>
39 #include <sys/conf.h>
40 #include <sys/device.h>
41 #include <sys/agpio.h>
42 
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/agpvar.h>
46 #include <dev/pci/agpreg.h>
47 #include <dev/pci/pcidevs.h>
48 
49 #include <sys/bus.h>
50 
51 static u_int32_t agp_via_get_aperture(struct agp_softc *);
52 static int agp_via_set_aperture(struct agp_softc *, u_int32_t);
53 static int agp_via_bind_page(struct agp_softc *, off_t, bus_addr_t);
54 static int agp_via_unbind_page(struct agp_softc *, off_t);
55 static void agp_via_flush_tlb(struct agp_softc *);
56 
57 static struct agp_methods agp_via_methods = {
58 	agp_via_get_aperture,
59 	agp_via_set_aperture,
60 	agp_via_bind_page,
61 	agp_via_unbind_page,
62 	agp_via_flush_tlb,
63 	agp_generic_enable,
64 	agp_generic_alloc_memory,
65 	agp_generic_free_memory,
66 	agp_generic_bind_memory,
67 	agp_generic_unbind_memory,
68 };
69 
70 struct agp_via_softc {
71 	u_int32_t	initial_aperture; /* aperture size at startup */
72 	struct agp_gatt *gatt;
73 	int		*regs;
74 };
75 
76 #define REG_GARTCTRL	0
77 #define REG_APSIZE	1
78 #define REG_ATTBASE	2
79 
80 static int via_v2_regs[] =
81 	{ AGP_VIA_GARTCTRL, AGP_VIA_APSIZE, AGP_VIA_ATTBASE };
82 static int via_v3_regs[] =
83 	{ AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE, AGP3_VIA_ATTBASE };
84 
85 int
86 agp_via_attach(device_t parent, device_t self, void *aux)
87 {
88 	struct pci_attach_args *pa = aux;
89 	struct agp_softc *sc = device_private(self);
90 	struct agp_via_softc *asc;
91 	struct agp_gatt *gatt;
92 	pcireg_t agpsel, capval;
93 
94 	asc = malloc(sizeof *asc, M_AGP, M_NOWAIT|M_ZERO);
95 	if (asc == NULL) {
96 		aprint_error(": can't allocate chipset-specific softc\n");
97 		return ENOMEM;
98 	}
99 	sc->as_chipc = asc;
100 	sc->as_methods = &agp_via_methods;
101 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
102 	    &capval);
103 
104 	if (PCI_CAP_AGP_MAJOR(capval) >= 3) {
105 		agpsel = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_VIA_AGPSEL);
106 		if ((agpsel & (1 << 9)) == 0) {
107 			asc->regs = via_v3_regs;
108 			aprint_debug(" (v3)");
109 		} else {
110 			asc->regs = via_v2_regs;
111 			aprint_debug(" (v2 compat mode)");
112 		}
113 	} else {
114 		asc->regs = via_v2_regs;
115 		aprint_debug(" (v2)");
116 	}
117 
118 	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
119 		aprint_error(": can't map aperture\n");
120 		free(asc, M_AGP);
121 		return ENXIO;
122 	}
123 
124 	asc->initial_aperture = AGP_GET_APERTURE(sc);
125 
126 	for (;;) {
127 		gatt = agp_alloc_gatt(sc);
128 		if (gatt)
129 			break;
130 
131 		/*
132 		 * Probably contigmalloc failure. Try reducing the
133 		 * aperture so that the gatt size reduces.
134 		 */
135 		if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
136 			agp_generic_detach(sc);
137 			aprint_error(": can't set aperture size\n");
138 			return ENOMEM;
139 		}
140 	}
141 	asc->gatt = gatt;
142 
143 	if (asc->regs == via_v2_regs) {
144 		/* Install the gatt. */
145 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
146 				 gatt->ag_physical | 3);
147 		/* Enable the aperture. */
148 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
149 				 0x0000000f);
150 	} else {
151 		pcireg_t gartctrl;
152 		/* Install the gatt. */
153 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
154 				 gatt->ag_physical);
155 		/* Enable the aperture. */
156 		gartctrl = pci_conf_read(pa->pa_pc, pa->pa_tag,
157 				 asc->regs[REG_ATTBASE]);
158 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
159 				 gartctrl | (3 << 7));
160 	}
161 
162 	return 0;
163 }
164 
165 #if 0
166 static int
167 agp_via_detach(struct agp_softc *sc)
168 {
169 	struct agp_via_softc *asc = sc->as_chipc;
170 	int error;
171 
172 	error = agp_generic_detach(sc);
173 	if (error)
174 		return error;
175 
176 	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL], 0);
177 	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_ATTBASE], 0);
178 	AGP_SET_APERTURE(sc, asc->initial_aperture);
179 	agp_free_gatt(sc, asc->gatt);
180 
181 	return 0;
182 }
183 #endif
184 
185 static u_int32_t
186 agp_via_get_aperture(struct agp_softc *sc)
187 {
188 	struct agp_via_softc *asc = sc->as_chipc;
189 	u_int32_t apsize;
190 
191 	apsize = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE])
192 				& 0x1f;
193 
194 	/*
195 	 * The size is determined by the number of low bits of
196 	 * register APBASE which are forced to zero. The low 20 bits
197 	 * are always forced to zero and each zero bit in the apsize
198 	 * field just read forces the corresponding bit in the 27:20
199 	 * to be zero. We calculate the aperture size accordingly.
200 	 */
201 	return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
202 }
203 
204 static int
205 agp_via_set_aperture(struct agp_softc *sc, u_int32_t aperture)
206 {
207 	struct agp_via_softc *asc = sc->as_chipc;
208 	u_int32_t apsize;
209 	pcireg_t reg;
210 
211 	/*
212 	 * Reverse the magic from get_aperture.
213 	 */
214 	apsize = ((aperture - 1) >> 20) ^ 0xff;
215 
216 	/*
217 	 * Double check for sanity.
218 	 */
219 	if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
220 		return EINVAL;
221 
222 	reg = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE]);
223 	reg &= ~0xff;
224 	reg |= apsize;
225 	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE], reg);
226 
227 	return 0;
228 }
229 
230 static int
231 agp_via_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
232 {
233 	struct agp_via_softc *asc = sc->as_chipc;
234 
235 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
236 		return EINVAL;
237 
238 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
239 	return 0;
240 }
241 
242 static int
243 agp_via_unbind_page(struct agp_softc *sc, off_t offset)
244 {
245 	struct agp_via_softc *asc = sc->as_chipc;
246 
247 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
248 		return EINVAL;
249 
250 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
251 	return 0;
252 }
253 
254 static void
255 agp_via_flush_tlb(struct agp_softc *sc)
256 {
257 	struct agp_via_softc *asc = sc->as_chipc;
258 	pcireg_t gartctrl;
259 
260 	if (asc->regs == via_v2_regs) {
261 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
262 				0x8f);
263 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
264 				0x0f);
265 	} else {
266 		gartctrl = pci_conf_read(sc->as_pc, sc->as_tag,
267 					 asc->regs[REG_GARTCTRL]);
268 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
269 			       gartctrl & ~(1 << 7));
270 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
271 			       gartctrl);
272 	}
273 }
274