xref: /netbsd-src/sys/dev/pci/agp_via.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: agp_via.c,v 1.18 2010/01/31 00:43:37 hubertf Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000 Doug Rabson
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  *	$FreeBSD: src/sys/pci/agp_via.c,v 1.3 2001/07/05 21:28:47 jhb Exp $
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: agp_via.c,v 1.18 2010/01/31 00:43:37 hubertf Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/malloc.h>
37 #include <sys/kernel.h>
38 #include <sys/proc.h>
39 #include <sys/conf.h>
40 #include <sys/device.h>
41 #include <sys/agpio.h>
42 
43 #include <uvm/uvm_extern.h>
44 
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcireg.h>
47 #include <dev/pci/agpvar.h>
48 #include <dev/pci/agpreg.h>
49 #include <dev/pci/pcidevs.h>
50 
51 #include <sys/bus.h>
52 
53 static u_int32_t agp_via_get_aperture(struct agp_softc *);
54 static int agp_via_set_aperture(struct agp_softc *, u_int32_t);
55 static int agp_via_bind_page(struct agp_softc *, off_t, bus_addr_t);
56 static int agp_via_unbind_page(struct agp_softc *, off_t);
57 static void agp_via_flush_tlb(struct agp_softc *);
58 
59 static struct agp_methods agp_via_methods = {
60 	agp_via_get_aperture,
61 	agp_via_set_aperture,
62 	agp_via_bind_page,
63 	agp_via_unbind_page,
64 	agp_via_flush_tlb,
65 	agp_generic_enable,
66 	agp_generic_alloc_memory,
67 	agp_generic_free_memory,
68 	agp_generic_bind_memory,
69 	agp_generic_unbind_memory,
70 };
71 
72 struct agp_via_softc {
73 	u_int32_t	initial_aperture; /* aperture size at startup */
74 	struct agp_gatt *gatt;
75 	int		*regs;
76 };
77 
78 #define REG_GARTCTRL	0
79 #define REG_APSIZE	1
80 #define REG_ATTBASE	2
81 
82 static int via_v2_regs[] =
83 	{ AGP_VIA_GARTCTRL, AGP_VIA_APSIZE, AGP_VIA_ATTBASE };
84 static int via_v3_regs[] =
85 	{ AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE, AGP3_VIA_ATTBASE };
86 
87 int
88 agp_via_attach(device_t parent, device_t self, void *aux)
89 {
90 	struct pci_attach_args *pa = aux;
91 	struct agp_softc *sc = device_private(self);
92 	struct agp_via_softc *asc;
93 	struct agp_gatt *gatt;
94 	pcireg_t agpsel, capval;
95 
96 	asc = malloc(sizeof *asc, M_AGP, M_NOWAIT|M_ZERO);
97 	if (asc == NULL) {
98 		aprint_error(": can't allocate chipset-specific softc\n");
99 		return ENOMEM;
100 	}
101 	sc->as_chipc = asc;
102 	sc->as_methods = &agp_via_methods;
103 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
104 	    &capval);
105 
106 	if (PCI_CAP_AGP_MAJOR(capval) >= 3) {
107 		agpsel = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_VIA_AGPSEL);
108 		if ((agpsel & (1 << 9)) == 0) {
109 			asc->regs = via_v3_regs;
110 			aprint_normal(" (v3)");
111 		} else {
112 			asc->regs = via_v2_regs;
113 			aprint_normal(" (v2 compat mode)");
114 		}
115 	} else {
116 		asc->regs = via_v2_regs;
117 		aprint_normal(" (v2)");
118 	}
119 
120 	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
121 		aprint_error(": can't map aperture\n");
122 		free(asc, M_AGP);
123 		return ENXIO;
124 	}
125 
126 	asc->initial_aperture = AGP_GET_APERTURE(sc);
127 
128 	for (;;) {
129 		gatt = agp_alloc_gatt(sc);
130 		if (gatt)
131 			break;
132 
133 		/*
134 		 * Probably contigmalloc failure. Try reducing the
135 		 * aperture so that the gatt size reduces.
136 		 */
137 		if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
138 			agp_generic_detach(sc);
139 			aprint_error(": can't set aperture size\n");
140 			return ENOMEM;
141 		}
142 	}
143 	asc->gatt = gatt;
144 
145 	if (asc->regs == via_v2_regs) {
146 		/* Install the gatt. */
147 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
148 				 gatt->ag_physical | 3);
149 		/* Enable the aperture. */
150 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
151 				 0x0000000f);
152 	} else {
153 		pcireg_t gartctrl;
154 		/* Install the gatt. */
155 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
156 				 gatt->ag_physical);
157 		/* Enable the aperture. */
158 		gartctrl = pci_conf_read(pa->pa_pc, pa->pa_tag,
159 				 asc->regs[REG_ATTBASE]);
160 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
161 				 gartctrl | (3 << 7));
162 	}
163 
164 	return 0;
165 }
166 
167 #if 0
168 static int
169 agp_via_detach(struct agp_softc *sc)
170 {
171 	struct agp_via_softc *asc = sc->as_chipc;
172 	int error;
173 
174 	error = agp_generic_detach(sc);
175 	if (error)
176 		return error;
177 
178 	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL], 0);
179 	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_ATTBASE], 0);
180 	AGP_SET_APERTURE(sc, asc->initial_aperture);
181 	agp_free_gatt(sc, asc->gatt);
182 
183 	return 0;
184 }
185 #endif
186 
187 static u_int32_t
188 agp_via_get_aperture(struct agp_softc *sc)
189 {
190 	struct agp_via_softc *asc = sc->as_chipc;
191 	u_int32_t apsize;
192 
193 	apsize = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE])
194 				& 0x1f;
195 
196 	/*
197 	 * The size is determined by the number of low bits of
198 	 * register APBASE which are forced to zero. The low 20 bits
199 	 * are always forced to zero and each zero bit in the apsize
200 	 * field just read forces the corresponding bit in the 27:20
201 	 * to be zero. We calculate the aperture size accordingly.
202 	 */
203 	return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
204 }
205 
206 static int
207 agp_via_set_aperture(struct agp_softc *sc, u_int32_t aperture)
208 {
209 	struct agp_via_softc *asc = sc->as_chipc;
210 	u_int32_t apsize;
211 	pcireg_t reg;
212 
213 	/*
214 	 * Reverse the magic from get_aperture.
215 	 */
216 	apsize = ((aperture - 1) >> 20) ^ 0xff;
217 
218 	/*
219 	 * Double check for sanity.
220 	 */
221 	if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
222 		return EINVAL;
223 
224 	reg = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE]);
225 	reg &= ~0xff;
226 	reg |= apsize;
227 	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE], reg);
228 
229 	return 0;
230 }
231 
232 static int
233 agp_via_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
234 {
235 	struct agp_via_softc *asc = sc->as_chipc;
236 
237 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
238 		return EINVAL;
239 
240 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
241 	return 0;
242 }
243 
244 static int
245 agp_via_unbind_page(struct agp_softc *sc, off_t offset)
246 {
247 	struct agp_via_softc *asc = sc->as_chipc;
248 
249 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
250 		return EINVAL;
251 
252 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
253 	return 0;
254 }
255 
256 static void
257 agp_via_flush_tlb(struct agp_softc *sc)
258 {
259 	struct agp_via_softc *asc = sc->as_chipc;
260 	pcireg_t gartctrl;
261 
262 	if (asc->regs == via_v2_regs) {
263 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
264 				0x8f);
265 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
266 				0x0f);
267 	} else {
268 		gartctrl = pci_conf_read(sc->as_pc, sc->as_tag,
269 					 asc->regs[REG_GARTCTRL]);
270 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
271 			       gartctrl & ~(1 << 7));
272 		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_GARTCTRL],
273 			       gartctrl);
274 	}
275 }
276