xref: /netbsd-src/sys/dev/pci/agp_amd.c (revision 8a8f936f250a330d54f8a24ed0e92aadf9743a7b)
1 /*	$NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000 Doug Rabson
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  *	$FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
29  */
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/kernel.h>
35 #include <sys/lock.h>
36 #include <sys/proc.h>
37 #include <sys/conf.h>
38 #include <sys/device.h>
39 #include <sys/agpio.h>
40 
41 #include <uvm/uvm_extern.h>
42 
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/agpvar.h>
46 #include <dev/pci/agpreg.h>
47 
48 #include <dev/pci/pcidevs.h>
49 
50 #define READ2(off)	bus_space_read_2(asc->iot, asc->ioh, off)
51 #define READ4(off)	bus_space_read_4(asc->iot, asc->ioh, off)
52 #define WRITE2(off,v)	bus_space_write_2(asc->iot, asc->ioh, off, v)
53 #define WRITE4(off,v)	bus_space_write_4(asc->iot, asc->ioh, off, v)
54 
55 struct agp_amd_gatt {
56 	bus_dmamap_t	ag_dmamap;
57 	bus_dma_segment_t ag_dmaseg;
58 	int		ag_nseg;
59 	u_int32_t	ag_entries;
60 	u_int32_t      *ag_vdir;	/* virtual address of page dir */
61 	bus_addr_t	ag_pdir;	/* bus address of page dir */
62 	u_int32_t      *ag_virtual;	/* virtual address of gatt */
63 	bus_addr_t	ag_physical;	/* bus address of gatt */
64 	size_t		ag_size;
65 };
66 
67 struct agp_amd_softc {
68 	u_int32_t	initial_aperture; /* aperture size at startup */
69 	struct agp_amd_gatt *gatt;
70 	bus_space_handle_t ioh;
71 	bus_space_tag_t iot;
72 };
73 
74 static u_int32_t agp_amd_get_aperture(struct agp_softc *);
75 static int agp_amd_set_aperture(struct agp_softc *, u_int32_t);
76 static int agp_amd_bind_page(struct agp_softc *, off_t, bus_addr_t);
77 static int agp_amd_unbind_page(struct agp_softc *, off_t);
78 static void agp_amd_flush_tlb(struct agp_softc *);
79 
80 
81 struct agp_methods agp_amd_methods = {
82 	agp_amd_get_aperture,
83 	agp_amd_set_aperture,
84 	agp_amd_bind_page,
85 	agp_amd_unbind_page,
86 	agp_amd_flush_tlb,
87 	agp_generic_enable,
88 	agp_generic_alloc_memory,
89 	agp_generic_free_memory,
90 	agp_generic_bind_memory,
91 	agp_generic_unbind_memory,
92 };
93 
94 
95 static struct agp_amd_gatt *
96 agp_amd_alloc_gatt(struct agp_softc *sc)
97 {
98 	u_int32_t apsize = AGP_GET_APERTURE(sc);
99 	u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
100 	struct agp_amd_gatt *gatt;
101 	int i, npages;
102 	caddr_t vdir;
103 
104 	gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
105 	if (!gatt)
106 		return 0;
107 
108 	if (agp_alloc_dmamem(sc->as_dmat,
109 	    AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0,
110 	    &gatt->ag_dmamap, &vdir, &gatt->ag_pdir,
111 	    &gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) {
112 		printf("failed to allocate GATT\n");
113 		free(gatt, M_AGP);
114 		return NULL;
115 	}
116 
117 	gatt->ag_vdir = (u_int32_t *)vdir;
118 	gatt->ag_entries = entries;
119 	gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE);
120 	gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
121 	gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
122 
123 	memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE);
124 	memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t));
125 
126 	/*
127 	 * Map the pages of the GATT into the page directory.
128 	 */
129 	npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
130 		  >> AGP_PAGE_SHIFT);
131 
132 	for (i = 0; i < npages; i++)
133 		gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
134 
135 	/*
136 	 * Make sure the chipset can see everything.
137 	 */
138 	agp_flush_cache();
139 
140 	return gatt;
141 }
142 
143 #if 0
144 static void
145 agp_amd_free_gatt(struct agp_softc *sc, struct agp_amd_gatt *gatt)
146 {
147 	agp_free_dmamem(sc->as_dmat, gatt->ag_size,
148 	    gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg,
149 	    gatt->ag_nseg);
150 	free(gatt, M_AGP);
151 }
152 #endif
153 
154 int
155 agp_amd_match(const struct pci_attach_args *pa)
156 {
157 
158 	switch (PCI_PRODUCT(pa->pa_id)) {
159 	case PCI_PRODUCT_AMD_SC751_SC:
160 	case PCI_PRODUCT_AMD_SC762_NB:
161 		return 1;
162 	}
163 
164 	return 0;
165 }
166 
167 int
168 agp_amd_attach(struct device *parent, struct device *self, void *aux)
169 {
170 	struct agp_softc *sc = (void *)self;
171 	struct agp_amd_softc *asc;
172 	struct pci_attach_args *pa = aux;
173 	struct agp_amd_gatt *gatt;
174 	pcireg_t reg;
175 	int error;
176 
177 	asc = malloc(sizeof *asc, M_AGP, M_NOWAIT);
178 	if (asc == NULL) {
179 		printf(": can't allocate softc\n");
180 		/* agp_generic_detach(sc) */
181 		return ENOMEM;
182 	}
183 	memset(asc, 0, sizeof *asc);
184 
185 	error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, PCI_MAPREG_TYPE_MEM, 0,
186 	    &asc->iot, &asc->ioh, NULL, NULL);
187 	if (error != 0) {
188 		printf(": can't map AGP registers\n");
189 		agp_generic_detach(sc);
190 		return error;
191 	}
192 
193 	if (agp_map_aperture(pa, sc) != 0) {
194 		printf(": can't map aperture\n");
195 		agp_generic_detach(sc);
196 		free(asc, M_AGP);
197 		return ENXIO;
198 	}
199 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
200 	    NULL);
201 	sc->as_methods = &agp_amd_methods;
202 	sc->as_chipc = asc;
203 	asc->initial_aperture = AGP_GET_APERTURE(sc);
204 
205 	for (;;) {
206 		gatt = agp_amd_alloc_gatt(sc);
207 		if (gatt)
208 			break;
209 
210 		/*
211 		 * Probably contigmalloc failure. Try reducing the
212 		 * aperture so that the gatt size reduces.
213 		 */
214 		if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
215 			printf(": can't set aperture\n");
216 			return ENOMEM;
217 		}
218 	}
219 	asc->gatt = gatt;
220 
221 	/* Install the gatt. */
222 	WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
223 
224 	/* Enable synchronisation between host and agp. */
225 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL);
226 	reg &= ~0x00ff00ff;
227 	reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
228 	pci_conf_write(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL, reg);
229 	/* Enable the TLB and flush */
230 	WRITE2(AGP_AMD751_STATUS,
231 	       READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
232 	AGP_FLUSH_TLB(sc);
233 
234 	return 0;
235 }
236 
237 #if 0
238 static int
239 agp_amd_detach(struct agp_softc *sc)
240 {
241 	pcireg_t reg;
242 	struct agp_amd_softc *asc = sc->as_chipc;
243 
244 	/* Disable the TLB.. */
245 	WRITE2(AGP_AMD751_STATUS,
246 	       READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
247 
248 	/* Disable host-agp sync */
249 	reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL);
250 	reg &= 0xffffff00;
251 	pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL, reg);
252 
253 	/* Clear the GATT base */
254 	WRITE4(AGP_AMD751_ATTBASE, 0);
255 
256 	/* Put the aperture back the way it started. */
257 	AGP_SET_APERTURE(sc, asc->initial_aperture);
258 
259 	agp_amd_free_gatt(sc, asc->gatt);
260 
261 	/* XXXfvdl no pci_mapreg_unmap */
262 
263 	return 0;
264 }
265 #endif
266 
267 static u_int32_t
268 agp_amd_get_aperture(struct agp_softc *sc)
269 {
270 	int vas;
271 
272 	vas = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL) & 0x06);
273 	vas >>= 1;
274 	/*
275 	 * The aperture size is equal to 32M<<vas.
276 	 */
277 	return (32*1024*1024) << vas;
278 }
279 
280 static int
281 agp_amd_set_aperture(struct agp_softc *sc, u_int32_t aperture)
282 {
283 	int vas;
284 	pcireg_t reg;
285 
286 	/*
287 	 * Check for a power of two and make sure its within the
288 	 * programmable range.
289 	 */
290 	if (aperture & (aperture - 1)
291 	    || aperture < 32*1024*1024
292 	    || aperture > 2U*1024*1024*1024)
293 		return EINVAL;
294 
295 	vas = ffs(aperture / 32*1024*1024) - 1;
296 
297 	reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL);
298 	reg = (reg & ~0x06) | (vas << 1);
299 	pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL, reg);
300 
301 	return 0;
302 }
303 
304 static int
305 agp_amd_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
306 {
307 	struct agp_amd_softc *asc = sc->as_chipc;
308 
309 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
310 		return EINVAL;
311 
312 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
313 	return 0;
314 }
315 
316 static int
317 agp_amd_unbind_page(struct agp_softc *sc, off_t offset)
318 {
319 	struct agp_amd_softc *asc = sc->as_chipc;
320 
321 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
322 		return EINVAL;
323 
324 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
325 	return 0;
326 }
327 
328 static void
329 agp_amd_flush_tlb(struct agp_softc *sc)
330 {
331 	struct agp_amd_softc *asc = sc->as_chipc;
332 
333 	/* Set the cache invalidate bit and wait for the chipset to clear */
334 	WRITE4(AGP_AMD751_TLBCTRL, 1);
335 	do {
336 		DELAY(1);
337 	} while (READ4(AGP_AMD751_TLBCTRL));
338 }
339