1 /* $NetBSD: adv_pci.c,v 1.18 2005/12/11 12:22:48 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * Author: Baldassare Dante Profeta <dante@mclink.it> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Device probe and attach routines for the following 38 * Advanced Systems Inc. SCSI controllers: 39 * 40 * Connectivity Products: 41 * ABP920 - Bus-Master PCI (16 CDB) 42 * ABP930 - Bus-Master PCI (16 CDB) (Footnote 1) 43 * ABP930U - Bus-Master PCI Ultra (16 CDB) 44 * ABP930UA - Bus-Master PCI Ultra (16 CDB) 45 * ABP960 - Bus-Master PCI MAC/PC (16 CDB) (Footnote 2) 46 * ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) (Footnote 2) 47 * 48 * Single Channel Products: 49 * ABP940 - Bus-Master PCI (240 CDB) 50 * ABP940U - Bus-Master PCI Ultra (240 CDB) 51 * ABP970 - Bus-Master PCI MAC/PC (240 CDB) 52 * ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) 53 * ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB) 54 * 55 * Multi Channel Products: 56 * ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) 57 * ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) 58 * ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) 59 * 60 * Footnotes: 61 * 1. This board has been sold by SIIG as the Fast SCSI Pro PCI. 62 * 2. This board has been sold by Iomega as a Jaz Jet PCI adapter. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: adv_pci.c,v 1.18 2005/12/11 12:22:48 christos Exp $"); 67 68 #include <sys/param.h> 69 #include <sys/systm.h> 70 #include <sys/malloc.h> 71 #include <sys/kernel.h> 72 #include <sys/queue.h> 73 #include <sys/device.h> 74 75 #include <machine/bus.h> 76 #include <machine/intr.h> 77 78 #include <dev/scsipi/scsi_all.h> 79 #include <dev/scsipi/scsipi_all.h> 80 #include <dev/scsipi/scsiconf.h> 81 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/pcidevs.h> 85 86 #include <dev/ic/advlib.h> 87 #include <dev/ic/adv.h> 88 89 /******************************************************************************/ 90 91 #define PCI_BASEADR_IO 0x10 92 93 /******************************************************************************/ 94 /* 95 * Check the slots looking for a board we recognise 96 * If we find one, note it's address (slot) and call 97 * the actual probe routine to check it out. 98 */ 99 static int 100 adv_pci_match(struct device *parent, struct cfdata *match, void *aux) 101 { 102 struct pci_attach_args *pa = aux; 103 104 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 105 switch (PCI_PRODUCT(pa->pa_id)) { 106 case PCI_PRODUCT_ADVSYS_1200A: 107 case PCI_PRODUCT_ADVSYS_1200B: 108 case PCI_PRODUCT_ADVSYS_ULTRA: 109 return (1); 110 } 111 112 return 0; 113 } 114 115 static void 116 adv_pci_attach(struct device *parent, struct device *self, void *aux) 117 { 118 struct pci_attach_args *pa = aux; 119 ASC_SOFTC *sc = (void *) self; 120 bus_space_tag_t iot; 121 bus_space_handle_t ioh; 122 pci_intr_handle_t ih; 123 pci_chipset_tag_t pc = pa->pa_pc; 124 u_int32_t command; 125 const char *intrstr; 126 127 aprint_naive(": SCSI controller\n"); 128 129 sc->sc_flags = 0x0; 130 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 131 switch (PCI_PRODUCT(pa->pa_id)) { 132 case PCI_PRODUCT_ADVSYS_1200A: 133 aprint_normal(": AdvanSys ASC1200A SCSI adapter\n"); 134 break; 135 136 case PCI_PRODUCT_ADVSYS_1200B: 137 aprint_normal(": AdvanSys ASC1200B SCSI adapter\n"); 138 break; 139 140 case PCI_PRODUCT_ADVSYS_ULTRA: 141 switch (PCI_REVISION(pa->pa_class)) { 142 case ASC_PCI_REVISION_3050: 143 aprint_normal( 144 ": AdvanSys ABP-9xxUA SCSI adapter\n"); 145 break; 146 147 case ASC_PCI_REVISION_3150: 148 aprint_normal( 149 ": AdvanSys ABP-9xxU SCSI adapter\n"); 150 break; 151 } 152 break; 153 154 default: 155 aprint_error(": unknown model!\n"); 156 return; 157 } 158 159 160 /* 161 * Make sure IO/MEM/MASTER are enabled 162 */ 163 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 164 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 165 PCI_COMMAND_MASTER_ENABLE)) != 166 (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 167 PCI_COMMAND_MASTER_ENABLE)) { 168 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 169 command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 170 PCI_COMMAND_MASTER_ENABLE)); 171 } 172 /* 173 * Latency timer settings. 174 */ 175 { 176 u_int32_t bhlcr; 177 178 bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG); 179 180 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200A || 181 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200B) { 182 bhlcr &= 0xFFFF00FFul; 183 pci_conf_write(pa->pa_pc, pa->pa_tag, 184 PCI_BHLC_REG, bhlcr); 185 } else if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_ULTRA) 186 && (PCI_LATTIMER(bhlcr) < 0x20)) { 187 bhlcr &= 0xFFFF00FFul; 188 bhlcr |= 0x00002000ul; 189 pci_conf_write(pa->pa_pc, pa->pa_tag, 190 PCI_BHLC_REG, bhlcr); 191 } 192 } 193 194 195 /* 196 * Map Device Registers for I/O 197 */ 198 if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0, 199 &iot, &ioh, NULL, NULL)) { 200 aprint_error("%s: unable to map device registers\n", 201 sc->sc_dev.dv_xname); 202 return; 203 } 204 205 ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); 206 ASC_SET_CHIP_STATUS(iot, ioh, 0); 207 208 sc->sc_iot = iot; 209 sc->sc_ioh = ioh; 210 sc->sc_dmat = pa->pa_dmat; 211 sc->pci_device_id = pa->pa_id; 212 sc->bus_type = ASC_IS_PCI; 213 sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); 214 215 /* 216 * Initialize the board 217 */ 218 if (adv_init(sc)) 219 panic("adv_pci_attach: adv_init failed"); 220 221 /* 222 * Map Interrupt line 223 */ 224 if (pci_intr_map(pa, &ih)) { 225 aprint_error("%s: couldn't map interrupt\n", 226 sc->sc_dev.dv_xname); 227 return; 228 } 229 intrstr = pci_intr_string(pc, ih); 230 231 /* 232 * Establish Interrupt handler 233 */ 234 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc); 235 if (sc->sc_ih == NULL) { 236 aprint_error("%s: couldn't establish interrupt", 237 sc->sc_dev.dv_xname); 238 if (intrstr != NULL) 239 aprint_normal(" at %s", intrstr); 240 aprint_normal("\n"); 241 return; 242 } 243 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 244 245 /* 246 * Attach all the sub-devices we can find 247 */ 248 adv_attach(sc); 249 } 250 251 CFATTACH_DECL(adv_pci, sizeof(ASC_SOFTC), 252 adv_pci_match, adv_pci_attach, NULL, NULL); 253