xref: /netbsd-src/sys/dev/pci/acardide.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: acardide.c,v 1.23 2008/05/14 13:29:29 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 Izumi Tsutsui.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: acardide.c,v 1.23 2008/05/14 13:29:29 tsutsui Exp $");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 
33 #include <dev/pci/pcivar.h>
34 #include <dev/pci/pcidevs.h>
35 #include <dev/pci/pciidereg.h>
36 #include <dev/pci/pciidevar.h>
37 #include <dev/pci/pciide_acard_reg.h>
38 
39 static void acard_chip_map(struct pciide_softc*, struct pci_attach_args*);
40 static void acard_setup_channel(struct ata_channel*);
41 #if 0 /* XXX !! */
42 static int  acard_pci_intr(void *);
43 #endif
44 
45 static int  acardide_match(device_t, cfdata_t, void *);
46 static void acardide_attach(device_t, device_t, void *);
47 
48 CFATTACH_DECL_NEW(acardide, sizeof(struct pciide_softc),
49     acardide_match, acardide_attach, NULL, NULL);
50 
51 static const struct pciide_product_desc pciide_acard_products[] =  {
52 	{ PCI_PRODUCT_ACARD_ATP850U,
53 	  0,
54 	  "Acard ATP850U Ultra33 IDE Controller",
55 	  acard_chip_map,
56 	},
57 	{ PCI_PRODUCT_ACARD_ATP860,
58 	  0,
59 	  "Acard ATP860 Ultra66 IDE Controller",
60 	  acard_chip_map,
61 	},
62 	{ PCI_PRODUCT_ACARD_ATP860A,
63 	  0,
64 	  "Acard ATP860-A Ultra66 IDE Controller",
65 	  acard_chip_map,
66 	},
67 	{ PCI_PRODUCT_ACARD_ATP865,
68 	  0,
69 	  "Acard ATP865 Ultra133 IDE Controller",
70 	  acard_chip_map,
71 	},
72 	{ PCI_PRODUCT_ACARD_ATP865A,
73 	  0,
74 	  "Acard ATP865-A Ultra133 IDE Controller",
75 	  acard_chip_map,
76 	},
77 	{ 0,
78 	  0,
79 	  NULL,
80 	  NULL
81 	}
82 };
83 
84 static int
85 acardide_match(device_t parent, cfdata_t match, void *aux)
86 {
87 	struct pci_attach_args *pa = aux;
88 
89 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ACARD) {
90 		if (pciide_lookup_product(pa->pa_id, pciide_acard_products))
91 			return (2);
92 	}
93 	return (0);
94 }
95 
96 static void
97 acardide_attach(device_t parent, device_t self, void *aux)
98 {
99 	struct pci_attach_args *pa = aux;
100 	struct pciide_softc *sc = device_private(self);
101 
102 	sc->sc_wdcdev.sc_atac.atac_dev = self;
103 
104 	pciide_common_attach(sc, pa,
105 	    pciide_lookup_product(pa->pa_id, pciide_acard_products));
106 
107 }
108 
109 #define	ACARD_IS_850(sc)						\
110 	((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U)
111 
112 static void
113 acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
114 {
115 	struct pciide_channel *cp;
116 	int i;
117 	pcireg_t interface;
118 	bus_size_t cmdsize, ctlsize;
119 
120 	if (pciide_chipen(sc, pa) == 0)
121 		return;
122 
123 	/*
124 	 * when the chip is in native mode it identifies itself as a
125 	 * 'misc mass storage'. Fake interface in this case.
126 	 */
127 	if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
128 		interface = PCI_INTERFACE(pa->pa_class);
129 	} else {
130 		interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
131 		    PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
132 	}
133 
134 	aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
135 	    "bus-master DMA support present");
136 	pciide_mapreg_dma(sc, pa);
137 	aprint_verbose("\n");
138 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
139 
140 	if (sc->sc_dma_ok) {
141 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
142 		sc->sc_wdcdev.irqack = pciide_irqack;
143 	}
144 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
145 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
146 	switch (sc->sc_pp->ide_product) {
147 	case PCI_PRODUCT_ACARD_ATP860:
148 	case PCI_PRODUCT_ACARD_ATP860A:
149 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 4;
150 		break;
151 	case PCI_PRODUCT_ACARD_ATP865:
152 	case PCI_PRODUCT_ACARD_ATP865A:
153 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
154 		break;
155 	default:
156 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
157 		break;
158 	}
159 
160 	sc->sc_wdcdev.sc_atac.atac_set_modes = acard_setup_channel;
161 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
162 	sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
163 
164 	wdc_allocate_regs(&sc->sc_wdcdev);
165 
166 	for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
167 		cp = &sc->pciide_channels[i];
168 		if (pciide_chansetup(sc, i, interface) == 0)
169 			continue;
170 		pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
171 		    pciide_pci_intr);
172 	}
173 	if (!ACARD_IS_850(sc)) {
174 		u_int32_t reg;
175 		reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
176 		reg &= ~ATP860_CTRL_INT;
177 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg);
178 	}
179 }
180 
181 static void
182 acard_setup_channel(struct ata_channel *chp)
183 {
184 	struct ata_drive_datas *drvp;
185 	struct atac_softc *atac = chp->ch_atac;
186 	struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
187 	struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
188 	int channel = chp->ch_channel;
189 	int drive, s;
190 	u_int32_t idetime, udma_mode;
191 	u_int32_t idedma_ctl;
192 
193 	/* setup DMA if needed */
194 	pciide_channel_dma_setup(cp);
195 
196 	if (ACARD_IS_850(sc)) {
197 		idetime = 0;
198 		udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
199 		udma_mode &= ~ATP850_UDMA_MASK(channel);
200 	} else {
201 		idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
202 		idetime &= ~ATP860_SETTIME_MASK(channel);
203 		udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
204 		udma_mode &= ~ATP860_UDMA_MASK(channel);
205 
206 		/* check 80 pins cable */
207 		if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) ||
208 		    (chp->ch_drive[1].drive_flags & DRIVE_UDMA)) {
209 			if (pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
210 			    & ATP860_CTRL_80P(chp->ch_channel)) {
211 				if (chp->ch_drive[0].UDMA_mode > 2)
212 					chp->ch_drive[0].UDMA_mode = 2;
213 				if (chp->ch_drive[1].UDMA_mode > 2)
214 					chp->ch_drive[1].UDMA_mode = 2;
215 			}
216 		}
217 	}
218 
219 	idedma_ctl = 0;
220 
221 	/* Per drive settings */
222 	for (drive = 0; drive < 2; drive++) {
223 		drvp = &chp->ch_drive[drive];
224 		/* If no drive, skip */
225 		if ((drvp->drive_flags & DRIVE) == 0)
226 			continue;
227 		/* add timing values, setup DMA if needed */
228 		if ((atac->atac_cap & ATAC_CAP_UDMA) &&
229 		    (drvp->drive_flags & DRIVE_UDMA)) {
230 			/* use Ultra/DMA */
231 			if (ACARD_IS_850(sc)) {
232 				idetime |= ATP850_SETTIME(drive,
233 				    acard_act_udma[drvp->UDMA_mode],
234 				    acard_rec_udma[drvp->UDMA_mode]);
235 				udma_mode |= ATP850_UDMA_MODE(channel, drive,
236 				    acard_udma_conf[drvp->UDMA_mode]);
237 			} else {
238 				idetime |= ATP860_SETTIME(channel, drive,
239 				    acard_act_udma[drvp->UDMA_mode],
240 				    acard_rec_udma[drvp->UDMA_mode]);
241 				udma_mode |= ATP860_UDMA_MODE(channel, drive,
242 				    acard_udma_conf[drvp->UDMA_mode]);
243 			}
244 			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
245 		} else if ((atac->atac_cap & ATAC_CAP_DMA) &&
246 		    (drvp->drive_flags & DRIVE_DMA)) {
247 			/* use Multiword DMA */
248 			s = splbio();
249 			drvp->drive_flags &= ~DRIVE_UDMA;
250 			splx(s);
251 			if (ACARD_IS_850(sc)) {
252 				idetime |= ATP850_SETTIME(drive,
253 				    acard_act_dma[drvp->DMA_mode],
254 				    acard_rec_dma[drvp->DMA_mode]);
255 			} else {
256 				idetime |= ATP860_SETTIME(channel, drive,
257 				    acard_act_dma[drvp->DMA_mode],
258 				    acard_rec_dma[drvp->DMA_mode]);
259 			}
260 			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
261 		} else {
262 			/* PIO only */
263 			s = splbio();
264 			drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA);
265 			splx(s);
266 			if (ACARD_IS_850(sc)) {
267 				idetime |= ATP850_SETTIME(drive,
268 				    acard_act_pio[drvp->PIO_mode],
269 				    acard_rec_pio[drvp->PIO_mode]);
270 			} else {
271 				idetime |= ATP860_SETTIME(channel, drive,
272 				    acard_act_pio[drvp->PIO_mode],
273 				    acard_rec_pio[drvp->PIO_mode]);
274 			}
275 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL,
276 		    pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
277 		    | ATP8x0_CTRL_EN(channel));
278 		}
279 	}
280 
281 	if (idedma_ctl != 0) {
282 		/* Add software bits in status register */
283 		bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
284 		    idedma_ctl);
285 	}
286 
287 	if (ACARD_IS_850(sc)) {
288 		pci_conf_write(sc->sc_pc, sc->sc_tag,
289 		    ATP850_IDETIME(channel), idetime);
290 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode);
291 	} else {
292 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime);
293 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode);
294 	}
295 }
296 
297 #if 0 /* XXX !! */
298 static int
299 acard_pci_intr(void *arg)
300 {
301 	struct pciide_softc *sc = arg;
302 	struct pciide_channel *cp;
303 	struct ata_channel *wdc_cp;
304 	int rv = 0;
305 	int dmastat, i, crv;
306 
307 	for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
308 		cp = &sc->pciide_channels[i];
309 		dmastat = bus_space_read_1(sc->sc_dma_iot,
310 		    cp->dma_iohs[IDEDMA_CTL], 0);
311 		if ((dmastat & IDEDMA_CTL_INTR) == 0)
312 			continue;
313 		wdc_cp = &cp->ata_channel;
314 		if ((wdc_cp->ch_flags & ATACH_IRQ_WAIT) == 0) {
315 			(void)wdcintr(wdc_cp);
316 			bus_space_write_1(sc->sc_dma_iot,
317 			    cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
318 			continue;
319 		}
320 		crv = wdcintr(wdc_cp);
321 		if (crv == 0) {
322 			printf("%s:%d: bogus intr\n",
323 			    device_xname(sc->sc_wdcdev.sc_atac.atac_dev), i);
324 			bus_space_write_1(sc->sc_dma_iot,
325 			    cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
326 		} else if (crv == 1)
327 			rv = 1;
328 		else if (rv == 0)
329 			rv = crv;
330 	}
331 	return rv;
332 }
333 #endif
334