1 /* $NetBSD: wdc_ofisa.c,v 1.6 2001/03/04 03:22:23 matt Exp $ */ 2 3 /* 4 * Copyright 1997, 1998 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* 37 * OFW Attachment for 'wdc' disk controller driver 38 */ 39 40 #include <sys/param.h> 41 #include <sys/device.h> 42 #include <sys/systm.h> 43 #include <sys/tty.h> 44 #include <sys/malloc.h> 45 46 #include <machine/intr.h> 47 #include <machine/bus.h> 48 49 #include <dev/ofw/openfirm.h> 50 #include <dev/isa/isavar.h> 51 #include <dev/ofisa/ofisavar.h> 52 53 #include <dev/ic/wdcreg.h> /* ??? */ 54 #include <dev/ata/atavar.h> 55 #include <dev/ic/wdcvar.h> 56 57 struct wdc_ofisa_softc { 58 struct wdc_softc sc_wdcdev; 59 struct channel_softc *wdc_chanptr; 60 struct channel_softc wdc_channel; 61 void *sc_ih; 62 }; 63 64 int wdc_ofisa_probe __P((struct device *, struct cfdata *, void *)); 65 void wdc_ofisa_attach __P((struct device *, struct device *, void *)); 66 67 struct cfattach wdc_ofisa_ca = { 68 sizeof(struct wdc_ofisa_softc), wdc_ofisa_probe, wdc_ofisa_attach 69 }; 70 71 int 72 wdc_ofisa_probe(parent, cf, aux) 73 struct device *parent; 74 struct cfdata *cf; 75 void *aux; 76 { 77 struct ofisa_attach_args *aa = aux; 78 const char *compatible_strings[] = { "pnpPNP,600", NULL }; 79 int rv = 0; 80 81 if (of_compatible(aa->oba.oba_phandle, compatible_strings) != -1) 82 rv = 5; 83 #ifdef _WDC_OFISA_MD_MATCH 84 if (!rv) 85 rv = wdc_ofisa_md_match(parent, cf, aux); 86 #endif 87 return (rv); 88 } 89 90 void 91 wdc_ofisa_attach(parent, self, aux) 92 struct device *parent, *self; 93 void *aux; 94 { 95 struct wdc_ofisa_softc *sc = (void *)self; 96 struct ofisa_attach_args *aa = aux; 97 struct ofisa_reg_desc reg[2]; 98 struct ofisa_intr_desc intr; 99 int n; 100 101 /* 102 * We're living on an ofw. We have to ask the OFW what our 103 * registers and interrupts properties look like. 104 * 105 * We expect exactly two register regions and one interrupt. 106 */ 107 108 n = ofisa_reg_get(aa->oba.oba_phandle, reg, 2); 109 #ifdef _WDC_OFISA_MD_REG_FIXUP 110 n = wdc_ofisa_md_reg_fixup(parent, self, aux, reg, 2, n); 111 #endif 112 if (n != 2) { 113 printf(": error getting register data\n"); 114 return; 115 } 116 if (reg[0].len != 8 || reg[1].len != 2) { 117 printf(": weird register size (%lu/%lu, expected 8/2)\n", 118 (unsigned long)reg[0].len, (unsigned long)reg[1].len); 119 return; 120 } 121 122 n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1); 123 #ifdef _WDC_OFISA_MD_INTR_FIXUP 124 n = wdc_ofisa_md_intr_fixup(parent, self, aux, &intr, 1, n); 125 #endif 126 if (n != 1) { 127 printf(": error getting interrupt data\n"); 128 return; 129 } 130 131 sc->wdc_channel.cmd_iot = 132 (reg[0].type == OFISA_REG_TYPE_IO) ? aa->iot : aa->memt; 133 sc->wdc_channel.ctl_iot = 134 (reg[1].type == OFISA_REG_TYPE_IO) ? aa->iot : aa->memt; 135 if (bus_space_map(sc->wdc_channel.cmd_iot, reg[0].addr, 8, 0, 136 &sc->wdc_channel.cmd_ioh) || 137 bus_space_map(sc->wdc_channel.ctl_iot, reg[1].addr, 1, 0, 138 &sc->wdc_channel.ctl_ioh)) { 139 printf(": can't map register spaces\n"); 140 return; 141 } 142 143 sc->sc_ih = isa_intr_establish(aa->ic, intr.irq, intr.share, 144 IPL_BIO, wdcintr, &sc->wdc_channel); 145 146 printf("\n"); 147 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16; 148 sc->wdc_chanptr = &sc->wdc_channel; 149 sc->sc_wdcdev.channels = &sc->wdc_chanptr; 150 sc->sc_wdcdev.nchannels = 1; 151 sc->wdc_channel.channel = 0; 152 sc->wdc_channel.wdc = &sc->sc_wdcdev; 153 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 154 M_DEVBUF, M_NOWAIT); 155 if (sc->wdc_channel.ch_queue == NULL) { 156 printf("%s: can't allocate memory for command queue", 157 sc->sc_wdcdev.sc_dev.dv_xname); 158 return; 159 } 160 wdcattach(&sc->wdc_channel); 161 wdc_print_modes(&sc->wdc_channel); 162 163 #if 0 164 printf("%s: registers: ", sc->sc_dev.dv_xname); 165 ofisa_reg_print(reg, 2); 166 printf("\n"); 167 printf("%s: interrupts: ", sc->sc_dev.dv_xname); 168 ofisa_intr_print(&intr, 1); 169 printf("\n"); 170 #endif 171 } 172