1 /* $NetBSD: nand_toshiba.c,v 1.1 2017/11/09 21:50:15 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2012-2017 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Adam Hoka. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Device specific functions for legacy Toshiba NAND chips 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand_toshiba.c,v 1.1 2017/11/09 21:50:15 jmcneill Exp $"); 38 39 #include "nand.h" 40 #include "onfi.h" 41 42 enum { 43 NAND_TOSHIBA_PAGEMASK = 0x3, 44 NAND_TOSHIBA_OOBMASK = 0x1 << 2, 45 NAND_TOSHIBA_BLOCKMASK = 0x3 << 4, 46 NAND_TOSHIBA_BITSMASK = 0x1 << 6 47 }; 48 49 enum { 50 NAND_TOSHIBA_PLANENUMMASK = 0x3 << 2 51 }; 52 53 int 54 nand_read_parameters_toshiba(device_t self, struct nand_chip * const chip) 55 { 56 uint8_t mfgrid; 57 uint8_t devid; 58 uint8_t params1; 59 uint8_t params2; 60 uint8_t params3; 61 62 nand_select(self, true); 63 nand_command(self, ONFI_READ_ID); 64 nand_address(self, 0x00); 65 nand_read_1(self, &mfgrid); 66 nand_read_1(self, &devid); 67 nand_read_1(self, ¶ms1); 68 nand_read_1(self, ¶ms2); 69 nand_read_1(self, ¶ms3); 70 nand_select(self, false); 71 72 aprint_debug_dev(self, 73 "ID Definition table: 0x%2.x 0x%2.x 0x%2.x 0x%2.x 0x%2.x\n", 74 mfgrid, devid, params1, params2, params3); 75 76 if (devid == 0xdc) { 77 /* From the documentation */ 78 chip->nc_addr_cycles_column = 2; 79 chip->nc_addr_cycles_row = 3; 80 chip->nc_lun_blocks = 2048; 81 82 switch (params2 & NAND_TOSHIBA_PAGEMASK) { 83 case 0x0: 84 chip->nc_page_size = 1024; 85 break; 86 case 0x1: 87 chip->nc_page_size = 2048; 88 break; 89 case 0x2: 90 chip->nc_page_size = 4096; 91 break; 92 case 0x3: 93 chip->nc_page_size = 8192; 94 break; 95 default: 96 KASSERTMSG(false, "ID Data parsing bug detected!"); 97 } 98 99 chip->nc_spare_size = 100 (8 << __SHIFTOUT(params2, NAND_TOSHIBA_OOBMASK)) * 101 (chip->nc_page_size >> 9); 102 103 switch ((params2 & NAND_TOSHIBA_BLOCKMASK) >> 4) { 104 case 0x0: 105 chip->nc_block_size = 64 * 1024; 106 break; 107 case 0x1: 108 chip->nc_block_size = 128 * 1024; 109 break; 110 case 0x2: 111 chip->nc_block_size = 256 * 1024; 112 break; 113 case 0x3: 114 chip->nc_block_size = 512 * 1024; 115 break; 116 default: 117 KASSERTMSG(false, "ID Data parsing bug detected!"); 118 } 119 120 switch ((params2 & NAND_TOSHIBA_BITSMASK) >> 6) { 121 case 0x0: 122 /* its an 8bit chip */ 123 break; 124 case 0x1: 125 chip->nc_flags |= NC_BUSWIDTH_16; 126 break; 127 default: 128 KASSERTMSG(false, "ID Data parsing bug detected!"); 129 } 130 131 switch ((params3 & NAND_TOSHIBA_PLANENUMMASK) >> 2) { 132 case 0x0: 133 chip->nc_num_luns = 1; 134 break; 135 case 0x1: 136 chip->nc_num_luns = 2; 137 break; 138 case 0x2: 139 chip->nc_num_luns = 4; 140 break; 141 case 0x3: 142 chip->nc_num_luns = 8; 143 break; 144 default: 145 KASSERTMSG(false, "ID Data parsing bug detected!"); 146 } 147 148 chip->nc_size = (uint64_t)chip->nc_lun_blocks * 149 chip->nc_block_size; 150 } else { 151 return 1; 152 } 153 154 return 0; 155 } 156