1 /* $NetBSD: nand.c,v 1.17 2012/07/12 03:05:01 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka@NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.17 2012/07/12 03:05:01 matt Exp $"); 38 39 #include "locators.h" 40 41 #include <sys/param.h> 42 #include <sys/types.h> 43 #include <sys/device.h> 44 #include <sys/kmem.h> 45 #include <sys/atomic.h> 46 47 #include <dev/flash/flash.h> 48 #include <dev/flash/flash_io.h> 49 #include <dev/nand/nand.h> 50 #include <dev/nand/onfi.h> 51 #include <dev/nand/hamming.h> 52 #include <dev/nand/nand_bbt.h> 53 #include <dev/nand/nand_crc.h> 54 55 #include "opt_nand.h" 56 57 int nand_match(device_t, cfdata_t, void *); 58 void nand_attach(device_t, device_t, void *); 59 int nand_detach(device_t, int); 60 bool nand_shutdown(device_t, int); 61 62 int nand_print(void *, const char *); 63 64 static int nand_search(device_t, cfdata_t, const int *, void *); 65 static void nand_address_row(device_t, size_t); 66 static void nand_address_column(device_t, size_t, size_t); 67 static int nand_fill_chip_structure(device_t, struct nand_chip *); 68 static int nand_scan_media(device_t, struct nand_chip *); 69 static bool nand_check_wp(device_t); 70 71 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc), 72 nand_match, nand_attach, nand_detach, NULL); 73 74 #ifdef NAND_DEBUG 75 int nanddebug = NAND_DEBUG; 76 #endif 77 78 struct flash_interface nand_flash_if = { 79 .type = FLASH_TYPE_NAND, 80 81 .read = nand_flash_read, 82 .write = nand_flash_write, 83 .erase = nand_flash_erase, 84 .block_isbad = nand_flash_isbad, 85 .block_markbad = nand_flash_markbad, 86 87 .submit = nand_flash_submit 88 }; 89 90 #ifdef NAND_VERBOSE 91 const struct nand_manufacturer nand_mfrs[] = { 92 { NAND_MFR_AMD, "AMD" }, 93 { NAND_MFR_FUJITSU, "Fujitsu" }, 94 { NAND_MFR_RENESAS, "Renesas" }, 95 { NAND_MFR_STMICRO, "ST Micro" }, 96 { NAND_MFR_MICRON, "Micron" }, 97 { NAND_MFR_NATIONAL, "National" }, 98 { NAND_MFR_TOSHIBA, "Toshiba" }, 99 { NAND_MFR_HYNIX, "Hynix" }, 100 { NAND_MFR_SAMSUNG, "Samsung" }, 101 { NAND_MFR_UNKNOWN, "Unknown" } 102 }; 103 104 static const char * 105 nand_midtoname(int id) 106 { 107 int i; 108 109 for (i = 0; nand_mfrs[i].id != 0; i++) { 110 if (nand_mfrs[i].id == id) 111 return nand_mfrs[i].name; 112 } 113 114 KASSERT(nand_mfrs[i].id == 0); 115 116 return nand_mfrs[i].name; 117 } 118 #endif 119 120 /* ARGSUSED */ 121 int 122 nand_match(device_t parent, cfdata_t match, void *aux) 123 { 124 /* pseudo device, always attaches */ 125 return 1; 126 } 127 128 void 129 nand_attach(device_t parent, device_t self, void *aux) 130 { 131 struct nand_softc *sc = device_private(self); 132 struct nand_attach_args *naa = aux; 133 struct nand_chip *chip = &sc->sc_chip; 134 135 sc->sc_dev = self; 136 sc->controller_dev = parent; 137 sc->nand_if = naa->naa_nand_if; 138 139 aprint_naive("\n"); 140 141 if (nand_check_wp(self)) { 142 aprint_error("NAND chip is write protected!\n"); 143 return; 144 } 145 146 if (nand_scan_media(self, chip)) { 147 return; 148 } 149 150 nand_flash_if.erasesize = chip->nc_block_size; 151 nand_flash_if.page_size = chip->nc_page_size; 152 nand_flash_if.writesize = chip->nc_page_size; 153 154 /* allocate cache */ 155 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP); 156 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP); 157 158 mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE); 159 160 if (flash_sync_thread_init(&sc->sc_flash_io, self, &nand_flash_if)) { 161 goto error; 162 } 163 164 if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown)) 165 aprint_error_dev(sc->sc_dev, 166 "couldn't establish power handler\n"); 167 168 #ifdef NAND_BBT 169 nand_bbt_init(self); 170 nand_bbt_scan(self); 171 #endif 172 173 /* 174 * Attach all our devices 175 */ 176 config_search_ia(nand_search, self, NULL, NULL); 177 178 return; 179 error: 180 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 181 kmem_free(chip->nc_page_cache, chip->nc_page_size); 182 mutex_destroy(&sc->sc_device_lock); 183 } 184 185 static int 186 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 187 { 188 struct nand_softc *sc = device_private(parent); 189 struct nand_chip *chip = &sc->sc_chip; 190 struct flash_attach_args faa; 191 192 faa.flash_if = &nand_flash_if; 193 194 faa.partinfo.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET]; 195 196 if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) { 197 faa.partinfo.part_size = chip->nc_size - 198 faa.partinfo.part_offset; 199 } else { 200 faa.partinfo.part_size = cf->cf_loc[FLASHBUSCF_SIZE]; 201 } 202 203 if (cf->cf_loc[FLASHBUSCF_READONLY]) 204 faa.partinfo.part_flags = FLASH_PART_READONLY; 205 else 206 faa.partinfo.part_flags = 0; 207 208 if (config_match(parent, cf, &faa)) { 209 if (config_attach(parent, cf, &faa, nand_print) != NULL) { 210 return 0; 211 } else { 212 return 1; 213 } 214 } 215 216 return 1; 217 } 218 219 int 220 nand_detach(device_t self, int flags) 221 { 222 struct nand_softc *sc = device_private(self); 223 struct nand_chip *chip = &sc->sc_chip; 224 int error = 0; 225 226 error = config_detach_children(self, flags); 227 if (error) { 228 return error; 229 } 230 231 flash_sync_thread_destroy(&sc->sc_flash_io); 232 #ifdef NAND_BBT 233 nand_bbt_detach(self); 234 #endif 235 /* free oob cache */ 236 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 237 kmem_free(chip->nc_page_cache, chip->nc_page_size); 238 kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size); 239 240 mutex_destroy(&sc->sc_device_lock); 241 242 pmf_device_deregister(sc->sc_dev); 243 244 return error; 245 } 246 247 int 248 nand_print(void *aux, const char *pnp) 249 { 250 if (pnp != NULL) 251 aprint_normal("nand at %s\n", pnp); 252 253 return UNCONF; 254 } 255 256 /* ask for a nand driver to attach to the controller */ 257 device_t 258 nand_attach_mi(struct nand_interface *nand_if, device_t parent) 259 { 260 struct nand_attach_args arg; 261 262 KASSERT(nand_if != NULL); 263 264 /* fill the defaults if we have null pointers */ 265 if (nand_if->program_page == NULL) { 266 nand_if->program_page = &nand_default_program_page; 267 } 268 269 if (nand_if->read_page == NULL) { 270 nand_if->read_page = &nand_default_read_page; 271 } 272 273 arg.naa_nand_if = nand_if; 274 return config_found_ia(parent, "nandbus", &arg, nand_print); 275 } 276 277 /* default everything to reasonable values, to ease future api changes */ 278 void 279 nand_init_interface(struct nand_interface *interface) 280 { 281 interface->select = &nand_default_select; 282 interface->command = NULL; 283 interface->address = NULL; 284 interface->read_buf_1 = NULL; 285 interface->read_buf_2 = NULL; 286 interface->read_1 = NULL; 287 interface->read_2 = NULL; 288 interface->write_buf_1 = NULL; 289 interface->write_buf_2 = NULL; 290 interface->write_1 = NULL; 291 interface->write_2 = NULL; 292 interface->busy = NULL; 293 294 /*- 295 * most drivers dont want to change this, but some implement 296 * read/program in one step 297 */ 298 interface->program_page = &nand_default_program_page; 299 interface->read_page = &nand_default_read_page; 300 301 /* default to soft ecc, that should work everywhere */ 302 interface->ecc_compute = &nand_default_ecc_compute; 303 interface->ecc_correct = &nand_default_ecc_correct; 304 interface->ecc_prepare = NULL; 305 interface->ecc.necc_code_size = 3; 306 interface->ecc.necc_block_size = 256; 307 interface->ecc.necc_type = NAND_ECC_TYPE_SW; 308 } 309 310 #if 0 311 /* handle quirks here */ 312 static void 313 nand_quirks(device_t self, struct nand_chip *chip) 314 { 315 /* this is an example only! */ 316 switch (chip->nc_manf_id) { 317 case NAND_MFR_SAMSUNG: 318 if (chip->nc_dev_id == 0x00) { 319 /* do something only samsung chips need */ 320 /* or */ 321 /* chip->nc_quirks |= NC_QUIRK_NO_READ_START */ 322 } 323 } 324 325 return; 326 } 327 #endif 328 329 static int 330 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip) 331 { 332 switch (chip->nc_manf_id) { 333 case NAND_MFR_MICRON: 334 return nand_read_parameters_micron(self, chip); 335 default: 336 return 1; 337 } 338 339 return 0; 340 } 341 342 /** 343 * scan media to determine the chip's properties 344 * this function resets the device 345 */ 346 static int 347 nand_scan_media(device_t self, struct nand_chip *chip) 348 { 349 struct nand_softc *sc = device_private(self); 350 struct nand_ecc *ecc; 351 uint8_t onfi_signature[4]; 352 353 nand_select(self, true); 354 nand_command(self, ONFI_RESET); 355 nand_select(self, false); 356 357 /* check if the device implements the ONFI standard */ 358 nand_select(self, true); 359 nand_command(self, ONFI_READ_ID); 360 nand_address(self, 0x20); 361 nand_read_1(self, &onfi_signature[0]); 362 nand_read_1(self, &onfi_signature[1]); 363 nand_read_1(self, &onfi_signature[2]); 364 nand_read_1(self, &onfi_signature[3]); 365 nand_select(self, false); 366 367 if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' || 368 onfi_signature[2] != 'F' || onfi_signature[3] != 'I') { 369 chip->nc_isonfi = false; 370 371 aprint_normal(": Legacy NAND Flash\n"); 372 373 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 374 375 if (nand_fill_chip_structure_legacy(self, chip)) { 376 aprint_error_dev(self, 377 "can't read device parameters for legacy chip\n"); 378 return 1; 379 } 380 } else { 381 chip->nc_isonfi = true; 382 383 aprint_normal(": ONFI NAND Flash\n"); 384 385 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 386 387 if (nand_fill_chip_structure(self, chip)) { 388 aprint_error_dev(self, 389 "can't read device parameters\n"); 390 return 1; 391 } 392 } 393 394 #ifdef NAND_VERBOSE 395 aprint_normal_dev(self, 396 "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n", 397 chip->nc_manf_id, 398 nand_midtoname(chip->nc_manf_id), 399 chip->nc_dev_id); 400 #endif 401 402 aprint_normal_dev(self, 403 "page size: %zu bytes, spare size: %zu bytes, " 404 "block size: %zu bytes\n", 405 chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size); 406 407 aprint_normal_dev(self, 408 "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8 409 ", total storage size: %zu MB\n", 410 chip->nc_lun_blocks, chip->nc_num_luns, 411 chip->nc_size / 1024 / 1024); 412 413 #ifdef NAND_VERBOSE 414 aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %" 415 PRIu8 "\n", 416 chip->nc_addr_cycles_column, chip->nc_addr_cycles_row); 417 #endif 418 419 ecc = chip->nc_ecc = &sc->nand_if->ecc; 420 421 /* 422 * calculate the place of ecc data in oob 423 * we try to be compatible with Linux here 424 */ 425 switch (chip->nc_spare_size) { 426 case 8: 427 ecc->necc_offset = 0; 428 break; 429 case 16: 430 ecc->necc_offset = 0; 431 break; 432 case 32: 433 ecc->necc_offset = 0; 434 break; 435 case 64: 436 ecc->necc_offset = 40; 437 break; 438 case 128: 439 ecc->necc_offset = 80; 440 break; 441 default: 442 panic("OOB size %zu is unexpected", chip->nc_spare_size); 443 } 444 445 ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size; 446 ecc->necc_size = ecc->necc_steps * ecc->necc_code_size; 447 448 /* check if we fit in oob */ 449 if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) { 450 panic("NAND ECC bits dont fit in OOB"); 451 } 452 453 /* TODO: mark free oob area available for file systems */ 454 455 chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP); 456 457 /* 458 * calculate badblock marker offset in oob 459 * we try to be compatible with linux here 460 */ 461 if (chip->nc_page_size > 512) 462 chip->nc_badmarker_offs = 0; 463 else 464 chip->nc_badmarker_offs = 5; 465 466 /* Calculate page shift and mask */ 467 chip->nc_page_shift = ffs(chip->nc_page_size) - 1; 468 chip->nc_page_mask = ~(chip->nc_page_size - 1); 469 /* same for block */ 470 chip->nc_block_shift = ffs(chip->nc_block_size) - 1; 471 chip->nc_block_mask = ~(chip->nc_block_size - 1); 472 473 /* look for quirks here if needed in future */ 474 /* nand_quirks(self, chip); */ 475 476 return 0; 477 } 478 479 void 480 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev) 481 { 482 nand_select(self, true); 483 nand_command(self, ONFI_READ_ID); 484 nand_address(self, 0x00); 485 486 nand_read_1(self, manf); 487 nand_read_1(self, dev); 488 489 nand_select(self, false); 490 } 491 492 int 493 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params) 494 { 495 uint8_t *bufp; 496 uint16_t crc; 497 int i;//, tries = 0; 498 499 KASSERT(sizeof(*params) == 256); 500 501 //read_params: 502 // tries++; 503 504 nand_select(self, true); 505 nand_command(self, ONFI_READ_PARAMETER_PAGE); 506 nand_address(self, 0x00); 507 508 nand_busy(self); 509 510 /* TODO check the signature if it contains at least 2 letters */ 511 512 bufp = (uint8_t *)params; 513 /* XXX why i am not using read_buf? */ 514 for (i = 0; i < 256; i++) { 515 nand_read_1(self, &bufp[i]); 516 } 517 nand_select(self, false); 518 519 /* validate the parameter page with the crc */ 520 crc = nand_crc16(bufp, 254); 521 522 if (crc != params->param_integrity_crc) { 523 aprint_error_dev(self, "parameter page crc check failed\n"); 524 /* TODO: we should read the next parameter page copy */ 525 return 1; 526 } 527 528 return 0; 529 } 530 531 static int 532 nand_fill_chip_structure(device_t self, struct nand_chip *chip) 533 { 534 struct onfi_parameter_page params; 535 uint8_t vendor[13], model[21]; 536 int i; 537 538 if (nand_read_parameter_page(self, ¶ms)) { 539 return 1; 540 } 541 542 /* strip manufacturer and model string */ 543 strlcpy(vendor, params.param_manufacturer, sizeof(vendor)); 544 for (i = 11; i > 0 && vendor[i] == ' '; i--) 545 vendor[i] = 0; 546 strlcpy(model, params.param_model, sizeof(model)); 547 for (i = 19; i > 0 && model[i] == ' '; i--) 548 model[i] = 0; 549 550 aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model); 551 552 /* XXX TODO multiple LUNs */ 553 if (params.param_numluns != 1) { 554 aprint_error_dev(self, 555 "more than one LUNs are not supported yet!\n"); 556 557 return 1; 558 } 559 560 chip->nc_size = params.param_pagesize * params.param_blocksize * 561 params.param_lunsize * params.param_numluns; 562 563 chip->nc_page_size = params.param_pagesize; 564 chip->nc_block_pages = params.param_blocksize; 565 chip->nc_block_size = params.param_blocksize * params.param_pagesize; 566 chip->nc_spare_size = params.param_sparesize; 567 chip->nc_lun_blocks = params.param_lunsize; 568 chip->nc_num_luns = params.param_numluns; 569 570 /* the lower 4 bits contain the row address cycles */ 571 chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07; 572 /* the upper 4 bits contain the column address cycles */ 573 chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4; 574 575 if (params.param_features & ONFI_FEATURE_16BIT) 576 chip->nc_flags |= NC_BUSWIDTH_16; 577 578 if (params.param_features & ONFI_FEATURE_EXTENDED_PARAM) 579 chip->nc_flags |= NC_EXTENDED_PARAM; 580 581 return 0; 582 } 583 584 /* ARGSUSED */ 585 bool 586 nand_shutdown(device_t self, int howto) 587 { 588 return true; 589 } 590 591 static void 592 nand_address_column(device_t self, size_t row, size_t column) 593 { 594 struct nand_softc *sc = device_private(self); 595 struct nand_chip *chip = &sc->sc_chip; 596 uint8_t i; 597 598 DPRINTF(("addressing row: 0x%jx column: %zu\n", 599 (uintmax_t )row, column)); 600 601 /* XXX TODO */ 602 row >>= chip->nc_page_shift; 603 604 /* Write the column (subpage) address */ 605 if (chip->nc_flags & NC_BUSWIDTH_16) 606 column >>= 1; 607 for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8) 608 nand_address(self, column & 0xff); 609 610 /* Write the row (page) address */ 611 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 612 nand_address(self, row & 0xff); 613 } 614 615 static void 616 nand_address_row(device_t self, size_t row) 617 { 618 struct nand_softc *sc = device_private(self); 619 struct nand_chip *chip = &sc->sc_chip; 620 int i; 621 622 /* XXX TODO */ 623 row >>= chip->nc_page_shift; 624 625 /* Write the row (page) address */ 626 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 627 nand_address(self, row & 0xff); 628 } 629 630 static inline uint8_t 631 nand_get_status(device_t self) 632 { 633 uint8_t status; 634 635 nand_command(self, ONFI_READ_STATUS); 636 nand_busy(self); 637 nand_read_1(self, &status); 638 639 return status; 640 } 641 642 static bool 643 nand_check_wp(device_t self) 644 { 645 if (nand_get_status(self) & 0x80) 646 return false; 647 else 648 return true; 649 } 650 651 static void 652 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column) 653 { 654 nand_command(self, ONFI_READ); 655 nand_address_column(self, row, column); 656 nand_command(self, ONFI_READ_START); 657 658 nand_busy(self); 659 } 660 661 /* read a page with ecc correction, default implementation */ 662 int 663 nand_default_read_page(device_t self, size_t offset, uint8_t *data) 664 { 665 struct nand_softc *sc = device_private(self); 666 struct nand_chip *chip = &sc->sc_chip; 667 size_t b, bs, e, cs; 668 uint8_t *ecc; 669 int result; 670 671 nand_prepare_read(self, offset, 0); 672 673 bs = chip->nc_ecc->necc_block_size; 674 cs = chip->nc_ecc->necc_code_size; 675 676 /* decide if we access by 8 or 16 bits */ 677 if (chip->nc_flags & NC_BUSWIDTH_16) { 678 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 679 nand_ecc_prepare(self, NAND_ECC_READ); 680 nand_read_buf_2(self, data + b, bs); 681 nand_ecc_compute(self, data + b, 682 chip->nc_ecc_cache + e); 683 } 684 } else { 685 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 686 nand_ecc_prepare(self, NAND_ECC_READ); 687 nand_read_buf_1(self, data + b, bs); 688 nand_ecc_compute(self, data + b, 689 chip->nc_ecc_cache + e); 690 } 691 } 692 693 /* for debugging new drivers */ 694 #if 0 695 nand_dump_data("page", data, chip->nc_page_size); 696 #endif 697 698 nand_read_oob(self, offset, chip->nc_oob_cache); 699 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 700 701 /* useful for debugging new ecc drivers */ 702 #if 0 703 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 704 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 705 printf("0x"); 706 for (b = 0; b < cs; b++) { 707 printf("%.2hhx", ecc[e+b]); 708 } 709 printf(" 0x"); 710 for (b = 0; b < cs; b++) { 711 printf("%.2hhx", chip->nc_ecc_cache[e+b]); 712 } 713 printf("\n"); 714 } 715 printf("--------------\n"); 716 #endif 717 718 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 719 result = nand_ecc_correct(self, data + b, ecc + e, 720 chip->nc_ecc_cache + e); 721 722 switch (result) { 723 case NAND_ECC_OK: 724 break; 725 case NAND_ECC_CORRECTED: 726 aprint_error_dev(self, 727 "data corrected with ECC at page offset 0x%jx " 728 "block %zu\n", (uintmax_t)offset, b); 729 break; 730 case NAND_ECC_TWOBIT: 731 aprint_error_dev(self, 732 "uncorrectable ECC error at page offset 0x%jx " 733 "block %zu\n", (uintmax_t)offset, b); 734 return EIO; 735 break; 736 case NAND_ECC_INVALID: 737 aprint_error_dev(self, 738 "invalid ECC in oob at page offset 0x%jx " 739 "block %zu\n", (uintmax_t)offset, b); 740 return EIO; 741 break; 742 default: 743 panic("invalid ECC correction errno"); 744 } 745 } 746 747 return 0; 748 } 749 750 int 751 nand_default_program_page(device_t self, size_t page, const uint8_t *data) 752 { 753 struct nand_softc *sc = device_private(self); 754 struct nand_chip *chip = &sc->sc_chip; 755 size_t bs, cs, e, b; 756 uint8_t status; 757 uint8_t *ecc; 758 759 nand_command(self, ONFI_PAGE_PROGRAM); 760 nand_address_column(self, page, 0); 761 762 nand_busy(self); 763 764 bs = chip->nc_ecc->necc_block_size; 765 cs = chip->nc_ecc->necc_code_size; 766 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 767 768 /* XXX code duplication */ 769 /* decide if we access by 8 or 16 bits */ 770 if (chip->nc_flags & NC_BUSWIDTH_16) { 771 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 772 nand_ecc_prepare(self, NAND_ECC_WRITE); 773 nand_write_buf_2(self, data + b, bs); 774 nand_ecc_compute(self, data + b, ecc + e); 775 } 776 /* write oob with ecc correction code */ 777 nand_write_buf_2(self, chip->nc_oob_cache, 778 chip->nc_spare_size); 779 } else { 780 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 781 nand_ecc_prepare(self, NAND_ECC_WRITE); 782 nand_write_buf_1(self, data + b, bs); 783 nand_ecc_compute(self, data + b, ecc + e); 784 } 785 /* write oob with ecc correction code */ 786 nand_write_buf_1(self, chip->nc_oob_cache, 787 chip->nc_spare_size); 788 } 789 790 nand_command(self, ONFI_PAGE_PROGRAM_START); 791 792 nand_busy(self); 793 794 /* for debugging ecc */ 795 #if 0 796 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 797 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 798 printf("0x"); 799 for (b = 0; b < cs; b++) { 800 printf("%.2hhx", ecc[e+b]); 801 } 802 printf("\n"); 803 } 804 printf("--------------\n"); 805 #endif 806 807 status = nand_get_status(self); 808 KASSERT(status & ONFI_STATUS_RDY); 809 if (status & ONFI_STATUS_FAIL) { 810 aprint_error_dev(self, "page program failed!\n"); 811 return EIO; 812 } 813 814 return 0; 815 } 816 817 /* read the OOB of a page */ 818 int 819 nand_read_oob(device_t self, size_t page, uint8_t *oob) 820 { 821 struct nand_softc *sc = device_private(self); 822 struct nand_chip *chip = &sc->sc_chip; 823 824 nand_prepare_read(self, page, chip->nc_page_size); 825 826 if (chip->nc_flags & NC_BUSWIDTH_16) 827 nand_read_buf_2(self, oob, chip->nc_spare_size); 828 else 829 nand_read_buf_1(self, oob, chip->nc_spare_size); 830 831 /* for debugging drivers */ 832 #if 0 833 nand_dump_data("oob", oob, chip->nc_spare_size); 834 #endif 835 836 return 0; 837 } 838 839 static int 840 nand_write_oob(device_t self, size_t offset, const void *oob) 841 { 842 struct nand_softc *sc = device_private(self); 843 struct nand_chip *chip = &sc->sc_chip; 844 uint8_t status; 845 846 nand_command(self, ONFI_PAGE_PROGRAM); 847 nand_address_column(self, offset, chip->nc_page_size); 848 nand_command(self, ONFI_PAGE_PROGRAM_START); 849 850 nand_busy(self); 851 852 if (chip->nc_flags & NC_BUSWIDTH_16) 853 nand_write_buf_2(self, oob, chip->nc_spare_size); 854 else 855 nand_write_buf_1(self, oob, chip->nc_spare_size); 856 857 status = nand_get_status(self); 858 KASSERT(status & ONFI_STATUS_RDY); 859 if (status & ONFI_STATUS_FAIL) 860 return EIO; 861 else 862 return 0; 863 } 864 865 void 866 nand_markbad(device_t self, size_t offset) 867 { 868 struct nand_softc *sc = device_private(self); 869 struct nand_chip *chip = &sc->sc_chip; 870 flash_off_t blockoffset, marker; 871 #ifdef NAND_BBT 872 flash_off_t block; 873 874 block = offset / chip->nc_block_size; 875 876 nand_bbt_block_markbad(self, block); 877 #endif 878 blockoffset = offset & chip->nc_block_mask; 879 marker = chip->nc_badmarker_offs & ~0x01; 880 881 /* check if it is already marked bad */ 882 if (nand_isbad(self, blockoffset)) 883 return; 884 885 nand_read_oob(self, blockoffset, chip->nc_oob_cache); 886 887 chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00; 888 chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00; 889 890 nand_write_oob(self, blockoffset, chip->nc_oob_cache); 891 } 892 893 bool 894 nand_isfactorybad(device_t self, flash_off_t offset) 895 { 896 struct nand_softc *sc = device_private(self); 897 struct nand_chip *chip = &sc->sc_chip; 898 flash_off_t block, first_page, last_page, page; 899 int i; 900 901 /* Check for factory bad blocks first 902 * Factory bad blocks are marked in the first or last 903 * page of the blocks, see: ONFI 2.2, 3.2.2. 904 */ 905 block = offset / chip->nc_block_size; 906 first_page = block * chip->nc_block_size; 907 last_page = (block + 1) * chip->nc_block_size 908 - chip->nc_page_size; 909 910 for (i = 0, page = first_page; i < 2; i++, page = last_page) { 911 /* address OOB */ 912 nand_prepare_read(self, page, chip->nc_page_size); 913 914 if (chip->nc_flags & NC_BUSWIDTH_16) { 915 uint16_t word; 916 nand_read_2(self, &word); 917 if (word == 0x0000) 918 return true; 919 } else { 920 uint8_t byte; 921 nand_read_1(self, &byte); 922 if (byte == 0x00) 923 return true; 924 } 925 } 926 927 return false; 928 } 929 930 bool 931 nand_iswornoutbad(device_t self, flash_off_t offset) 932 { 933 struct nand_softc *sc = device_private(self); 934 struct nand_chip *chip = &sc->sc_chip; 935 flash_off_t block; 936 937 /* we inspect the first page of the block */ 938 block = offset & chip->nc_block_mask; 939 940 /* Linux/u-boot compatible badblock handling */ 941 if (chip->nc_flags & NC_BUSWIDTH_16) { 942 uint16_t word, mark; 943 944 nand_prepare_read(self, block, 945 chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe)); 946 947 nand_read_2(self, &word); 948 mark = htole16(word); 949 if (chip->nc_badmarker_offs & 0x01) 950 mark >>= 8; 951 if ((mark & 0xff) != 0xff) 952 return true; 953 } else { 954 uint8_t byte; 955 956 nand_prepare_read(self, block, 957 chip->nc_page_size + chip->nc_badmarker_offs); 958 959 nand_read_1(self, &byte); 960 if (byte != 0xff) 961 return true; 962 } 963 964 return false; 965 } 966 967 bool 968 nand_isbad(device_t self, flash_off_t offset) 969 { 970 #ifdef NAND_BBT 971 struct nand_softc *sc = device_private(self); 972 struct nand_chip *chip = &sc->sc_chip; 973 flash_off_t block; 974 975 block = offset / chip->nc_block_size; 976 977 return nand_bbt_block_isbad(self, block); 978 #else 979 /* ONFI host requirement */ 980 if (nand_isfactorybad(self, offset)) 981 return true; 982 983 /* Look for Linux/U-Boot compatible bad marker */ 984 if (nand_iswornoutbad(self, offset)) 985 return true; 986 987 return false; 988 #endif 989 } 990 991 int 992 nand_erase_block(device_t self, size_t offset) 993 { 994 uint8_t status; 995 996 /* xxx calculate first page of block for address? */ 997 998 nand_command(self, ONFI_BLOCK_ERASE); 999 nand_address_row(self, offset); 1000 nand_command(self, ONFI_BLOCK_ERASE_START); 1001 1002 nand_busy(self); 1003 1004 status = nand_get_status(self); 1005 KASSERT(status & ONFI_STATUS_RDY); 1006 if (status & ONFI_STATUS_FAIL) { 1007 aprint_error_dev(self, "block erase failed!\n"); 1008 nand_markbad(self, offset); 1009 return EIO; 1010 } else { 1011 return 0; 1012 } 1013 } 1014 1015 /* default functions for driver development */ 1016 1017 /* default ECC using hamming code of 256 byte chunks */ 1018 int 1019 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 1020 { 1021 hamming_compute_256(data, code); 1022 1023 return 0; 1024 } 1025 1026 int 1027 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode, 1028 const uint8_t *compcode) 1029 { 1030 return hamming_correct_256(data, origcode, compcode); 1031 } 1032 1033 void 1034 nand_default_select(device_t self, bool enable) 1035 { 1036 /* do nothing */ 1037 return; 1038 } 1039 1040 /* implementation of the block device API */ 1041 1042 int 1043 nand_flash_submit(device_t self, struct buf * const bp) 1044 { 1045 struct nand_softc *sc = device_private(self); 1046 1047 return flash_io_submit(&sc->sc_flash_io, bp); 1048 } 1049 1050 /* 1051 * handle (page) unaligned write to nand 1052 */ 1053 static int 1054 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len, 1055 size_t *retlen, const uint8_t *buf) 1056 { 1057 struct nand_softc *sc = device_private(self); 1058 struct nand_chip *chip = &sc->sc_chip; 1059 flash_off_t first, last, firstoff; 1060 const uint8_t *bufp; 1061 flash_off_t addr; 1062 size_t left, count; 1063 int error = 0, i; 1064 1065 first = offset & chip->nc_page_mask; 1066 firstoff = offset & ~chip->nc_page_mask; 1067 /* XXX check if this should be len - 1 */ 1068 last = (offset + len) & chip->nc_page_mask; 1069 count = last - first + 1; 1070 1071 addr = first; 1072 *retlen = 0; 1073 1074 mutex_enter(&sc->sc_device_lock); 1075 if (count == 1) { 1076 if (nand_isbad(self, addr)) { 1077 aprint_error_dev(self, 1078 "nand_flash_write_unaligned: " 1079 "bad block encountered\n"); 1080 error = EIO; 1081 goto out; 1082 } 1083 1084 error = nand_read_page(self, addr, chip->nc_page_cache); 1085 if (error) { 1086 goto out; 1087 } 1088 1089 memcpy(chip->nc_page_cache + firstoff, buf, len); 1090 1091 error = nand_program_page(self, addr, chip->nc_page_cache); 1092 if (error) { 1093 goto out; 1094 } 1095 1096 *retlen = len; 1097 goto out; 1098 } 1099 1100 bufp = buf; 1101 left = len; 1102 1103 for (i = 0; i < count && left != 0; i++) { 1104 if (nand_isbad(self, addr)) { 1105 aprint_error_dev(self, 1106 "nand_flash_write_unaligned: " 1107 "bad block encountered\n"); 1108 error = EIO; 1109 goto out; 1110 } 1111 1112 if (i == 0) { 1113 error = nand_read_page(self, 1114 addr, chip->nc_page_cache); 1115 if (error) { 1116 goto out; 1117 } 1118 1119 memcpy(chip->nc_page_cache + firstoff, 1120 bufp, chip->nc_page_size - firstoff); 1121 1122 printf("program page: %s: %d\n", __FILE__, __LINE__); 1123 error = nand_program_page(self, 1124 addr, chip->nc_page_cache); 1125 if (error) { 1126 goto out; 1127 } 1128 1129 bufp += chip->nc_page_size - firstoff; 1130 left -= chip->nc_page_size - firstoff; 1131 *retlen += chip->nc_page_size - firstoff; 1132 1133 } else if (i == count - 1) { 1134 error = nand_read_page(self, 1135 addr, chip->nc_page_cache); 1136 if (error) { 1137 goto out; 1138 } 1139 1140 memcpy(chip->nc_page_cache, bufp, left); 1141 1142 error = nand_program_page(self, 1143 addr, chip->nc_page_cache); 1144 if (error) { 1145 goto out; 1146 } 1147 1148 *retlen += left; 1149 KASSERT(left < chip->nc_page_size); 1150 1151 } else { 1152 /* XXX debug */ 1153 if (left > chip->nc_page_size) { 1154 printf("left: %zu, i: %d, count: %zu\n", 1155 (size_t )left, i, count); 1156 } 1157 KASSERT(left > chip->nc_page_size); 1158 1159 error = nand_program_page(self, addr, bufp); 1160 if (error) { 1161 goto out; 1162 } 1163 1164 bufp += chip->nc_page_size; 1165 left -= chip->nc_page_size; 1166 *retlen += chip->nc_page_size; 1167 } 1168 1169 addr += chip->nc_page_size; 1170 } 1171 1172 KASSERT(*retlen == len); 1173 out: 1174 mutex_exit(&sc->sc_device_lock); 1175 1176 return error; 1177 } 1178 1179 int 1180 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1181 const uint8_t *buf) 1182 { 1183 struct nand_softc *sc = device_private(self); 1184 struct nand_chip *chip = &sc->sc_chip; 1185 const uint8_t *bufp; 1186 size_t pages, page; 1187 daddr_t addr; 1188 int error = 0; 1189 1190 if ((offset + len) > chip->nc_size) { 1191 DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju)," 1192 " is over device size (0x%jx)\n", 1193 (uintmax_t)offset, (uintmax_t)len, 1194 (uintmax_t)chip->nc_size)); 1195 return EINVAL; 1196 } 1197 1198 if (len % chip->nc_page_size != 0 || 1199 offset % chip->nc_page_size != 0) { 1200 return nand_flash_write_unaligned(self, 1201 offset, len, retlen, buf); 1202 } 1203 1204 pages = len / chip->nc_page_size; 1205 KASSERT(pages != 0); 1206 *retlen = 0; 1207 1208 addr = offset; 1209 bufp = buf; 1210 1211 mutex_enter(&sc->sc_device_lock); 1212 for (page = 0; page < pages; page++) { 1213 /* do we need this check here? */ 1214 if (nand_isbad(self, addr)) { 1215 aprint_error_dev(self, 1216 "nand_flash_write: bad block encountered\n"); 1217 1218 error = EIO; 1219 goto out; 1220 } 1221 1222 error = nand_program_page(self, addr, bufp); 1223 if (error) { 1224 goto out; 1225 } 1226 1227 addr += chip->nc_page_size; 1228 bufp += chip->nc_page_size; 1229 *retlen += chip->nc_page_size; 1230 } 1231 out: 1232 mutex_exit(&sc->sc_device_lock); 1233 DPRINTF(("page programming: retlen: %zu, len: %zu\n", *retlen, len)); 1234 1235 return error; 1236 } 1237 1238 /* 1239 * handle (page) unaligned read from nand 1240 */ 1241 static int 1242 nand_flash_read_unaligned(device_t self, size_t offset, 1243 size_t len, size_t *retlen, uint8_t *buf) 1244 { 1245 struct nand_softc *sc = device_private(self); 1246 struct nand_chip *chip = &sc->sc_chip; 1247 daddr_t first, last, count, firstoff; 1248 uint8_t *bufp; 1249 daddr_t addr; 1250 size_t left; 1251 int error = 0, i; 1252 1253 first = offset & chip->nc_page_mask; 1254 firstoff = offset & ~chip->nc_page_mask; 1255 last = (offset + len) & chip->nc_page_mask; 1256 count = (last - first) / chip->nc_page_size + 1; 1257 1258 addr = first; 1259 bufp = buf; 1260 left = len; 1261 *retlen = 0; 1262 1263 mutex_enter(&sc->sc_device_lock); 1264 if (count == 1) { 1265 error = nand_read_page(self, addr, chip->nc_page_cache); 1266 if (error) { 1267 goto out; 1268 } 1269 1270 memcpy(bufp, chip->nc_page_cache + firstoff, len); 1271 1272 *retlen = len; 1273 goto out; 1274 } 1275 1276 for (i = 0; i < count && left != 0; i++) { 1277 error = nand_read_page(self, addr, chip->nc_page_cache); 1278 if (error) { 1279 goto out; 1280 } 1281 1282 if (i == 0) { 1283 memcpy(bufp, chip->nc_page_cache + firstoff, 1284 chip->nc_page_size - firstoff); 1285 1286 bufp += chip->nc_page_size - firstoff; 1287 left -= chip->nc_page_size - firstoff; 1288 *retlen += chip->nc_page_size - firstoff; 1289 1290 } else if (i == count - 1) { 1291 memcpy(bufp, chip->nc_page_cache, left); 1292 *retlen += left; 1293 KASSERT(left < chip->nc_page_size); 1294 1295 } else { 1296 memcpy(bufp, chip->nc_page_cache, chip->nc_page_size); 1297 1298 bufp += chip->nc_page_size; 1299 left -= chip->nc_page_size; 1300 *retlen += chip->nc_page_size; 1301 } 1302 1303 addr += chip->nc_page_size; 1304 } 1305 KASSERT(*retlen == len); 1306 out: 1307 mutex_exit(&sc->sc_device_lock); 1308 1309 return error; 1310 } 1311 1312 int 1313 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1314 uint8_t *buf) 1315 { 1316 struct nand_softc *sc = device_private(self); 1317 struct nand_chip *chip = &sc->sc_chip; 1318 uint8_t *bufp; 1319 size_t addr; 1320 size_t i, pages; 1321 int error = 0; 1322 1323 *retlen = 0; 1324 1325 DPRINTF(("nand_flash_read: off: 0x%jx, len: %zu\n", 1326 (uintmax_t)offset, len)); 1327 1328 if (__predict_false((offset + len) > chip->nc_size)) { 1329 DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %zu)," 1330 " is over device size (%ju)\n", (uintmax_t)offset, 1331 len, (uintmax_t)chip->nc_size)); 1332 return EINVAL; 1333 } 1334 1335 /* Handle unaligned access, shouldnt be needed when using the 1336 * block device, as strategy handles it, so only low level 1337 * accesses will use this path 1338 */ 1339 /* XXX^2 */ 1340 #if 0 1341 if (len < chip->nc_page_size) 1342 panic("TODO page size is larger than read size"); 1343 #endif 1344 1345 if (len % chip->nc_page_size != 0 || 1346 offset % chip->nc_page_size != 0) { 1347 return nand_flash_read_unaligned(self, 1348 offset, len, retlen, buf); 1349 } 1350 1351 bufp = buf; 1352 addr = offset; 1353 pages = len / chip->nc_page_size; 1354 1355 mutex_enter(&sc->sc_device_lock); 1356 for (i = 0; i < pages; i++) { 1357 /* XXX do we need this check here? */ 1358 if (nand_isbad(self, addr)) { 1359 aprint_error_dev(self, "bad block encountered\n"); 1360 error = EIO; 1361 goto out; 1362 } 1363 error = nand_read_page(self, addr, bufp); 1364 if (error) 1365 goto out; 1366 1367 bufp += chip->nc_page_size; 1368 addr += chip->nc_page_size; 1369 *retlen += chip->nc_page_size; 1370 } 1371 out: 1372 mutex_exit(&sc->sc_device_lock); 1373 1374 return error; 1375 } 1376 1377 int 1378 nand_flash_isbad(device_t self, flash_off_t ofs, bool *is_bad) 1379 { 1380 struct nand_softc *sc = device_private(self); 1381 struct nand_chip *chip = &sc->sc_chip; 1382 bool result; 1383 1384 if (ofs > chip->nc_size) { 1385 DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than" 1386 " device size (0x%jx)\n", (uintmax_t)ofs, 1387 (uintmax_t)chip->nc_size)); 1388 return EINVAL; 1389 } 1390 1391 if (ofs % chip->nc_block_size != 0) { 1392 DPRINTF(("offset (0x%jx) is not a multiple of block size " 1393 "(%ju)", 1394 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size)); 1395 return EINVAL; 1396 } 1397 1398 mutex_enter(&sc->sc_device_lock); 1399 result = nand_isbad(self, ofs); 1400 mutex_exit(&sc->sc_device_lock); 1401 1402 *is_bad = result; 1403 1404 return 0; 1405 } 1406 1407 int 1408 nand_flash_markbad(device_t self, flash_off_t ofs) 1409 { 1410 struct nand_softc *sc = device_private(self); 1411 struct nand_chip *chip = &sc->sc_chip; 1412 1413 if (ofs > chip->nc_size) { 1414 DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than" 1415 " device size (0x%jx)\n", ofs, 1416 (uintmax_t)chip->nc_size)); 1417 return EINVAL; 1418 } 1419 1420 if (ofs % chip->nc_block_size != 0) { 1421 panic("offset (%ju) is not a multiple of block size (%ju)", 1422 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1423 } 1424 1425 mutex_enter(&sc->sc_device_lock); 1426 nand_markbad(self, ofs); 1427 mutex_exit(&sc->sc_device_lock); 1428 1429 return 0; 1430 } 1431 1432 int 1433 nand_flash_erase(device_t self, 1434 struct flash_erase_instruction *ei) 1435 { 1436 struct nand_softc *sc = device_private(self); 1437 struct nand_chip *chip = &sc->sc_chip; 1438 flash_off_t addr; 1439 int error = 0; 1440 1441 if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size) 1442 return EINVAL; 1443 1444 if (ei->ei_addr + ei->ei_len > chip->nc_size) { 1445 DPRINTF(("nand_flash_erase: erase address is over the end" 1446 " of the device\n")); 1447 return EINVAL; 1448 } 1449 1450 if (ei->ei_addr % chip->nc_block_size != 0) { 1451 aprint_error_dev(self, 1452 "nand_flash_erase: ei_addr (%ju) is not" 1453 " a multiple of block size (%ju)", 1454 (uintmax_t)ei->ei_addr, 1455 (uintmax_t)chip->nc_block_size); 1456 return EINVAL; 1457 } 1458 1459 if (ei->ei_len % chip->nc_block_size != 0) { 1460 aprint_error_dev(self, 1461 "nand_flash_erase: ei_len (%ju) is not" 1462 " a multiple of block size (%ju)", 1463 (uintmax_t)ei->ei_len, 1464 (uintmax_t)chip->nc_block_size); 1465 return EINVAL; 1466 } 1467 1468 mutex_enter(&sc->sc_device_lock); 1469 addr = ei->ei_addr; 1470 while (addr < ei->ei_addr + ei->ei_len) { 1471 if (nand_isbad(self, addr)) { 1472 aprint_error_dev(self, "bad block encountered\n"); 1473 ei->ei_state = FLASH_ERASE_FAILED; 1474 error = EIO; 1475 goto out; 1476 } 1477 1478 error = nand_erase_block(self, addr); 1479 if (error) { 1480 ei->ei_state = FLASH_ERASE_FAILED; 1481 goto out; 1482 } 1483 1484 addr += chip->nc_block_size; 1485 } 1486 mutex_exit(&sc->sc_device_lock); 1487 1488 ei->ei_state = FLASH_ERASE_DONE; 1489 if (ei->ei_callback != NULL) { 1490 ei->ei_callback(ei); 1491 } 1492 1493 return 0; 1494 out: 1495 mutex_exit(&sc->sc_device_lock); 1496 1497 return error; 1498 } 1499 1500 MODULE(MODULE_CLASS_DRIVER, nand, "flash"); 1501 1502 #ifdef _MODULE 1503 #include "ioconf.c" 1504 #endif 1505 1506 static int 1507 nand_modcmd(modcmd_t cmd, void *opaque) 1508 { 1509 switch (cmd) { 1510 case MODULE_CMD_INIT: 1511 #ifdef _MODULE 1512 return config_init_component(cfdriver_ioconf_nand, 1513 cfattach_ioconf_nand, cfdata_ioconf_nand); 1514 #else 1515 return 0; 1516 #endif 1517 case MODULE_CMD_FINI: 1518 #ifdef _MODULE 1519 return config_fini_component(cfdriver_ioconf_nand, 1520 cfattach_ioconf_nand, cfdata_ioconf_nand); 1521 #else 1522 return 0; 1523 #endif 1524 default: 1525 return ENOTTY; 1526 } 1527 } 1528