1 /* $NetBSD: nand.c,v 1.28 2021/04/24 23:36:56 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka@NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.28 2021/04/24 23:36:56 thorpej Exp $"); 38 39 #include "locators.h" 40 41 #include <sys/param.h> 42 #include <sys/types.h> 43 #include <sys/device.h> 44 #include <sys/kmem.h> 45 #include <sys/atomic.h> 46 47 #include <dev/flash/flash.h> 48 #include <dev/flash/flash_io.h> 49 #include <dev/nand/nand.h> 50 #include <dev/nand/onfi.h> 51 #include <dev/nand/hamming.h> 52 #include <dev/nand/nand_bbt.h> 53 #include <dev/nand/nand_crc.h> 54 55 #include "opt_nand.h" 56 57 int nand_match(device_t, cfdata_t, void *); 58 void nand_attach(device_t, device_t, void *); 59 int nand_detach(device_t, int); 60 bool nand_shutdown(device_t, int); 61 62 int nand_print(void *, const char *); 63 64 static int nand_search(device_t, cfdata_t, const int *, void *); 65 static void nand_address_row(device_t, size_t); 66 static inline uint8_t nand_get_status(device_t); 67 static void nand_address_column(device_t, size_t, size_t); 68 static int nand_fill_chip_structure(device_t, struct nand_chip *); 69 static int nand_scan_media(device_t, struct nand_chip *); 70 static bool nand_check_wp(device_t); 71 72 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc), 73 nand_match, nand_attach, nand_detach, NULL); 74 75 #ifdef NAND_DEBUG 76 int nanddebug = NAND_DEBUG; 77 #endif 78 79 struct flash_interface nand_flash_if = { 80 .type = FLASH_TYPE_NAND, 81 82 .read = nand_flash_read, 83 .write = nand_flash_write, 84 .erase = nand_flash_erase, 85 .block_isbad = nand_flash_isbad, 86 .block_markbad = nand_flash_markbad, 87 88 .submit = nand_flash_submit 89 }; 90 91 const struct nand_manufacturer nand_mfrs[] = { 92 { NAND_MFR_AMD, "AMD" }, 93 { NAND_MFR_FUJITSU, "Fujitsu" }, 94 { NAND_MFR_RENESAS, "Renesas" }, 95 { NAND_MFR_STMICRO, "ST Micro" }, 96 { NAND_MFR_MICRON, "Micron" }, 97 { NAND_MFR_NATIONAL, "National" }, 98 { NAND_MFR_TOSHIBA, "Toshiba" }, 99 { NAND_MFR_HYNIX, "Hynix" }, 100 { NAND_MFR_SAMSUNG, "Samsung" }, 101 { NAND_MFR_UNKNOWN, "Unknown" } 102 }; 103 104 static const char * 105 nand_midtoname(int id) 106 { 107 int i; 108 109 for (i = 0; nand_mfrs[i].id != 0; i++) { 110 if (nand_mfrs[i].id == id) 111 return nand_mfrs[i].name; 112 } 113 114 KASSERT(nand_mfrs[i].id == 0); 115 116 return nand_mfrs[i].name; 117 } 118 119 /* ARGSUSED */ 120 int 121 nand_match(device_t parent, cfdata_t match, void *aux) 122 { 123 /* pseudo device, always attaches */ 124 return 1; 125 } 126 127 void 128 nand_attach(device_t parent, device_t self, void *aux) 129 { 130 struct nand_softc *sc = device_private(self); 131 struct nand_attach_args *naa = aux; 132 struct nand_chip *chip = &sc->sc_chip; 133 134 sc->sc_dev = self; 135 sc->controller_dev = parent; 136 sc->nand_if = naa->naa_nand_if; 137 138 aprint_naive("\n"); 139 140 if (nand_check_wp(self)) { 141 aprint_error("NAND chip is write protected!\n"); 142 return; 143 } 144 145 if (nand_scan_media(self, chip)) { 146 return; 147 } 148 149 nand_flash_if.erasesize = chip->nc_block_size; 150 nand_flash_if.page_size = chip->nc_page_size; 151 nand_flash_if.writesize = chip->nc_page_size; 152 153 /* allocate cache */ 154 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP); 155 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP); 156 157 mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE); 158 159 if (flash_sync_thread_init(&sc->sc_flash_io, self, &nand_flash_if)) { 160 goto error; 161 } 162 163 if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown)) 164 aprint_error_dev(sc->sc_dev, 165 "couldn't establish power handler\n"); 166 167 #ifdef NAND_BBT 168 nand_bbt_init(self); 169 nand_bbt_scan(self); 170 #endif 171 172 /* 173 * Attach all our devices 174 */ 175 config_search(self, NULL, 176 CFARG_SEARCH, nand_search, 177 CFARG_EOL); 178 179 return; 180 error: 181 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 182 kmem_free(chip->nc_page_cache, chip->nc_page_size); 183 mutex_destroy(&sc->sc_device_lock); 184 } 185 186 static int 187 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 188 { 189 struct nand_softc *sc = device_private(parent); 190 struct nand_chip *chip = &sc->sc_chip; 191 struct flash_attach_args faa; 192 193 if (cf->cf_loc[FLASHBUSCF_DYNAMIC] != 0) 194 return 0; 195 196 faa.flash_if = &nand_flash_if; 197 198 faa.partinfo.part_name = NULL; 199 faa.partinfo.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET]; 200 201 if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) { 202 faa.partinfo.part_size = chip->nc_size - 203 faa.partinfo.part_offset; 204 } else { 205 faa.partinfo.part_size = cf->cf_loc[FLASHBUSCF_SIZE]; 206 } 207 208 if (cf->cf_loc[FLASHBUSCF_READONLY]) 209 faa.partinfo.part_flags = FLASH_PART_READONLY; 210 else 211 faa.partinfo.part_flags = 0; 212 213 if (config_probe(parent, cf, &faa)) { 214 if (config_attach(parent, cf, &faa, nand_print, 215 CFARG_EOL) != NULL) { 216 return 0; 217 } else { 218 return 1; 219 } 220 } 221 222 return 1; 223 } 224 225 void 226 nand_attach_mtdparts(device_t parent, const char *mtd_id, const char *cmdline) 227 { 228 struct nand_softc *sc = device_private(parent); 229 struct nand_chip *chip = &sc->sc_chip; 230 231 flash_attach_mtdparts(&nand_flash_if, parent, chip->nc_size, 232 mtd_id, cmdline); 233 } 234 235 int 236 nand_detach(device_t self, int flags) 237 { 238 struct nand_softc *sc = device_private(self); 239 struct nand_chip *chip = &sc->sc_chip; 240 int error = 0; 241 242 error = config_detach_children(self, flags); 243 if (error) { 244 return error; 245 } 246 247 flash_sync_thread_destroy(&sc->sc_flash_io); 248 #ifdef NAND_BBT 249 nand_bbt_detach(self); 250 #endif 251 /* free oob cache */ 252 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 253 kmem_free(chip->nc_page_cache, chip->nc_page_size); 254 kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size); 255 256 mutex_destroy(&sc->sc_device_lock); 257 258 pmf_device_deregister(sc->sc_dev); 259 260 return error; 261 } 262 263 int 264 nand_print(void *aux, const char *pnp) 265 { 266 if (pnp != NULL) 267 aprint_normal("nand at %s\n", pnp); 268 269 return UNCONF; 270 } 271 272 /* ask for a nand driver to attach to the controller */ 273 device_t 274 nand_attach_mi(struct nand_interface *nand_if, device_t parent) 275 { 276 struct nand_attach_args arg; 277 278 KASSERT(nand_if != NULL); 279 280 /* fill the defaults if we have null pointers */ 281 if (nand_if->program_page == NULL) { 282 nand_if->program_page = &nand_default_program_page; 283 } 284 285 if (nand_if->read_page == NULL) { 286 nand_if->read_page = &nand_default_read_page; 287 } 288 289 arg.naa_nand_if = nand_if; 290 return config_found(parent, &arg, nand_print, 291 CFARG_IATTR, "nandbus", 292 CFARG_EOL); 293 } 294 295 /* default everything to reasonable values, to ease future api changes */ 296 void 297 nand_init_interface(struct nand_interface *interface) 298 { 299 interface->select = &nand_default_select; 300 interface->command = NULL; 301 interface->address = NULL; 302 interface->read_buf_1 = NULL; 303 interface->read_buf_2 = NULL; 304 interface->read_1 = NULL; 305 interface->read_2 = NULL; 306 interface->write_buf_1 = NULL; 307 interface->write_buf_2 = NULL; 308 interface->write_1 = NULL; 309 interface->write_2 = NULL; 310 interface->busy = NULL; 311 312 /*- 313 * most drivers dont want to change this, but some implement 314 * read/program in one step 315 */ 316 interface->program_page = &nand_default_program_page; 317 interface->read_page = &nand_default_read_page; 318 319 /* default to soft ecc, that should work everywhere */ 320 interface->ecc_compute = &nand_default_ecc_compute; 321 interface->ecc_correct = &nand_default_ecc_correct; 322 interface->ecc_prepare = NULL; 323 interface->ecc.necc_code_size = 3; 324 interface->ecc.necc_block_size = 256; 325 interface->ecc.necc_type = NAND_ECC_TYPE_SW; 326 } 327 328 #if 0 329 /* handle quirks here */ 330 static void 331 nand_quirks(device_t self, struct nand_chip *chip) 332 { 333 /* this is an example only! */ 334 switch (chip->nc_manf_id) { 335 case NAND_MFR_SAMSUNG: 336 if (chip->nc_dev_id == 0x00) { 337 /* do something only samsung chips need */ 338 /* or */ 339 /* chip->nc_quirks |= NC_QUIRK_NO_READ_START */ 340 } 341 } 342 343 return; 344 } 345 #endif 346 347 static int 348 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip) 349 { 350 switch (chip->nc_manf_id) { 351 case NAND_MFR_MICRON: 352 return nand_read_parameters_micron(self, chip); 353 case NAND_MFR_SAMSUNG: 354 return nand_read_parameters_samsung(self, chip); 355 case NAND_MFR_TOSHIBA: 356 return nand_read_parameters_toshiba(self, chip); 357 default: 358 return 1; 359 } 360 361 return 0; 362 } 363 364 /** 365 * scan media to determine the chip's properties 366 * this function resets the device 367 */ 368 static int 369 nand_scan_media(device_t self, struct nand_chip *chip) 370 { 371 struct nand_softc *sc = device_private(self); 372 struct nand_ecc *ecc; 373 uint8_t onfi_signature[4]; 374 375 nand_select(self, true); 376 nand_command(self, ONFI_RESET); 377 KASSERT(nand_get_status(self) & ONFI_STATUS_RDY); 378 nand_select(self, false); 379 380 /* check if the device implements the ONFI standard */ 381 nand_select(self, true); 382 nand_command(self, ONFI_READ_ID); 383 nand_address(self, 0x20); 384 nand_read_1(self, &onfi_signature[0]); 385 nand_read_1(self, &onfi_signature[1]); 386 nand_read_1(self, &onfi_signature[2]); 387 nand_read_1(self, &onfi_signature[3]); 388 nand_select(self, false); 389 390 #ifdef NAND_DEBUG 391 device_printf(self, "signature: %02x %02x %02x %02x\n", 392 onfi_signature[0], onfi_signature[1], 393 onfi_signature[2], onfi_signature[3]); 394 #endif 395 396 if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' || 397 onfi_signature[2] != 'F' || onfi_signature[3] != 'I') { 398 chip->nc_isonfi = false; 399 400 aprint_normal(": Legacy NAND Flash\n"); 401 402 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 403 404 if (nand_fill_chip_structure_legacy(self, chip)) { 405 aprint_error_dev(self, 406 "can't read device parameters for legacy chip\n"); 407 return 1; 408 } 409 } else { 410 chip->nc_isonfi = true; 411 412 aprint_normal(": ONFI NAND Flash\n"); 413 414 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 415 416 if (nand_fill_chip_structure(self, chip)) { 417 aprint_error_dev(self, 418 "can't read device parameters\n"); 419 return 1; 420 } 421 } 422 423 aprint_normal_dev(self, 424 "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n", 425 chip->nc_manf_id, 426 nand_midtoname(chip->nc_manf_id), 427 chip->nc_dev_id); 428 429 aprint_normal_dev(self, 430 "page size: %" PRIu32 " bytes, spare size: %" PRIu32 " bytes, " 431 "block size: %" PRIu32 " bytes\n", 432 chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size); 433 434 aprint_normal_dev(self, 435 "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8 436 ", total storage size: %" PRIu64 " MB\n", 437 chip->nc_lun_blocks, chip->nc_num_luns, 438 chip->nc_size / 1024 / 1024); 439 440 aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %" 441 PRIu8 ", width: %s\n", 442 chip->nc_addr_cycles_column, chip->nc_addr_cycles_row, 443 (chip->nc_flags & NC_BUSWIDTH_16) ? "x16" : "x8"); 444 445 ecc = chip->nc_ecc = &sc->nand_if->ecc; 446 447 /* 448 * calculate the place of ecc data in oob 449 * we try to be compatible with Linux here 450 */ 451 switch (chip->nc_spare_size) { 452 case 8: 453 ecc->necc_offset = 0; 454 break; 455 case 16: 456 ecc->necc_offset = 0; 457 break; 458 case 32: 459 ecc->necc_offset = 0; 460 break; 461 case 64: 462 ecc->necc_offset = 40; 463 break; 464 case 128: 465 ecc->necc_offset = 80; 466 break; 467 default: 468 panic("OOB size %" PRIu32 " is unexpected", chip->nc_spare_size); 469 } 470 471 ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size; 472 ecc->necc_size = ecc->necc_steps * ecc->necc_code_size; 473 474 /* check if we fit in oob */ 475 if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) { 476 panic("NAND ECC bits dont fit in OOB"); 477 } 478 479 /* TODO: mark free oob area available for file systems */ 480 481 chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP); 482 483 /* 484 * calculate badblock marker offset in oob 485 * we try to be compatible with linux here 486 */ 487 if (chip->nc_page_size > 512) 488 chip->nc_badmarker_offs = 0; 489 else 490 chip->nc_badmarker_offs = 5; 491 492 /* Calculate page shift and mask */ 493 chip->nc_page_shift = ffs(chip->nc_page_size) - 1; 494 chip->nc_page_mask = ~(chip->nc_page_size - 1); 495 /* same for block */ 496 chip->nc_block_shift = ffs(chip->nc_block_size) - 1; 497 chip->nc_block_mask = ~(chip->nc_block_size - 1); 498 499 /* look for quirks here if needed in future */ 500 /* nand_quirks(self, chip); */ 501 502 return 0; 503 } 504 505 void 506 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev) 507 { 508 nand_select(self, true); 509 nand_command(self, ONFI_READ_ID); 510 nand_address(self, 0x00); 511 512 nand_read_1(self, manf); 513 nand_read_1(self, dev); 514 515 nand_select(self, false); 516 } 517 518 int 519 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params) 520 { 521 uint8_t *bufp; 522 uint16_t crc; 523 int i;//, tries = 0; 524 525 KASSERT(sizeof(*params) == 256); 526 527 //read_params: 528 // tries++; 529 530 nand_select(self, true); 531 nand_command(self, ONFI_READ_PARAMETER_PAGE); 532 nand_address(self, 0x00); 533 534 nand_busy(self); 535 536 /* TODO check the signature if it contains at least 2 letters */ 537 538 bufp = (uint8_t *)params; 539 /* XXX why i am not using read_buf? */ 540 for (i = 0; i < 256; i++) { 541 nand_read_1(self, &bufp[i]); 542 } 543 nand_select(self, false); 544 545 /* validate the parameter page with the crc */ 546 crc = nand_crc16(bufp, 254); 547 548 if (crc != params->param_integrity_crc) { 549 aprint_error_dev(self, "parameter page crc check failed\n"); 550 /* TODO: we should read the next parameter page copy */ 551 return 1; 552 } 553 554 return 0; 555 } 556 557 static int 558 nand_fill_chip_structure(device_t self, struct nand_chip *chip) 559 { 560 struct onfi_parameter_page params; 561 uint8_t vendor[13], model[21]; 562 int i; 563 564 if (nand_read_parameter_page(self, ¶ms)) { 565 return 1; 566 } 567 568 /* strip manufacturer and model string */ 569 strlcpy(vendor, params.param_manufacturer, sizeof(vendor)); 570 for (i = 11; i > 0 && vendor[i] == ' '; i--) 571 vendor[i] = 0; 572 strlcpy(model, params.param_model, sizeof(model)); 573 for (i = 19; i > 0 && model[i] == ' '; i--) 574 model[i] = 0; 575 576 aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model); 577 578 chip->nc_page_size = le32toh(params.param_pagesize); 579 chip->nc_block_size = 580 le32toh(params.param_blocksize) * chip->nc_page_size; 581 chip->nc_spare_size = le16toh(params.param_sparesize); 582 chip->nc_lun_blocks = le32toh(params.param_lunsize); 583 chip->nc_num_luns = params.param_numluns; 584 585 chip->nc_size = 586 chip->nc_block_size * chip->nc_lun_blocks * chip->nc_num_luns; 587 588 /* the lower 4 bits contain the row address cycles */ 589 chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07; 590 /* the upper 4 bits contain the column address cycles */ 591 chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4; 592 593 uint16_t features = le16toh(params.param_features); 594 if (features & ONFI_FEATURE_16BIT) { 595 chip->nc_flags |= NC_BUSWIDTH_16; 596 } 597 598 if (features & ONFI_FEATURE_EXTENDED_PARAM) { 599 chip->nc_flags |= NC_EXTENDED_PARAM; 600 } 601 602 return 0; 603 } 604 605 /* ARGSUSED */ 606 bool 607 nand_shutdown(device_t self, int howto) 608 { 609 return true; 610 } 611 612 static void 613 nand_address_column(device_t self, size_t row, size_t column) 614 { 615 struct nand_softc *sc = device_private(self); 616 struct nand_chip *chip = &sc->sc_chip; 617 uint8_t i; 618 619 DPRINTF(("addressing row: 0x%jx column: %" PRIu32 "\n", 620 (uintmax_t )row, column)); 621 622 /* XXX TODO */ 623 row >>= chip->nc_page_shift; 624 625 /* Write the column (subpage) address */ 626 if (chip->nc_flags & NC_BUSWIDTH_16) 627 column >>= 1; 628 for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8) 629 nand_address(self, column & 0xff); 630 631 /* Write the row (page) address */ 632 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 633 nand_address(self, row & 0xff); 634 } 635 636 static void 637 nand_address_row(device_t self, size_t row) 638 { 639 struct nand_softc *sc = device_private(self); 640 struct nand_chip *chip = &sc->sc_chip; 641 int i; 642 643 /* XXX TODO */ 644 row >>= chip->nc_page_shift; 645 646 /* Write the row (page) address */ 647 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 648 nand_address(self, row & 0xff); 649 } 650 651 static inline uint8_t 652 nand_get_status(device_t self) 653 { 654 uint8_t status; 655 656 nand_command(self, ONFI_READ_STATUS); 657 nand_busy(self); 658 nand_read_1(self, &status); 659 660 return status; 661 } 662 663 static bool 664 nand_check_wp(device_t self) 665 { 666 if (nand_get_status(self) & ONFI_STATUS_WP) 667 return false; 668 else 669 return true; 670 } 671 672 static void 673 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column) 674 { 675 nand_command(self, ONFI_READ); 676 nand_address_column(self, row, column); 677 nand_command(self, ONFI_READ_START); 678 679 nand_busy(self); 680 } 681 682 /* read a page with ecc correction, default implementation */ 683 int 684 nand_default_read_page(device_t self, size_t offset, uint8_t *data) 685 { 686 struct nand_softc *sc = device_private(self); 687 struct nand_chip *chip = &sc->sc_chip; 688 size_t b, bs, e, cs; 689 uint8_t *ecc; 690 int result; 691 692 nand_prepare_read(self, offset, 0); 693 694 bs = chip->nc_ecc->necc_block_size; 695 cs = chip->nc_ecc->necc_code_size; 696 697 /* decide if we access by 8 or 16 bits */ 698 if (chip->nc_flags & NC_BUSWIDTH_16) { 699 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 700 nand_ecc_prepare(self, NAND_ECC_READ); 701 nand_read_buf_2(self, data + b, bs); 702 nand_ecc_compute(self, data + b, 703 chip->nc_ecc_cache + e); 704 } 705 } else { 706 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 707 nand_ecc_prepare(self, NAND_ECC_READ); 708 nand_read_buf_1(self, data + b, bs); 709 nand_ecc_compute(self, data + b, 710 chip->nc_ecc_cache + e); 711 } 712 } 713 714 /* for debugging new drivers */ 715 #if 0 716 nand_dump_data("page", data, chip->nc_page_size); 717 #endif 718 719 nand_read_oob(self, offset, chip->nc_oob_cache); 720 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 721 722 /* useful for debugging new ecc drivers */ 723 #if 0 724 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 725 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 726 printf("0x"); 727 for (b = 0; b < cs; b++) { 728 printf("%.2hhx", ecc[e+b]); 729 } 730 printf(" 0x"); 731 for (b = 0; b < cs; b++) { 732 printf("%.2hhx", chip->nc_ecc_cache[e+b]); 733 } 734 printf("\n"); 735 } 736 printf("--------------\n"); 737 #endif 738 739 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 740 result = nand_ecc_correct(self, data + b, ecc + e, 741 chip->nc_ecc_cache + e); 742 743 switch (result) { 744 case NAND_ECC_OK: 745 break; 746 case NAND_ECC_CORRECTED: 747 aprint_error_dev(self, 748 "data corrected with ECC at page offset 0x%jx " 749 "block %zu\n", (uintmax_t)offset, b); 750 break; 751 case NAND_ECC_TWOBIT: 752 aprint_error_dev(self, 753 "uncorrectable ECC error at page offset 0x%jx " 754 "block %zu\n", (uintmax_t)offset, b); 755 return EIO; 756 break; 757 case NAND_ECC_INVALID: 758 aprint_error_dev(self, 759 "invalid ECC in oob at page offset 0x%jx " 760 "block %zu\n", (uintmax_t)offset, b); 761 return EIO; 762 break; 763 default: 764 panic("invalid ECC correction errno"); 765 } 766 } 767 768 return 0; 769 } 770 771 int 772 nand_default_program_page(device_t self, size_t page, const uint8_t *data) 773 { 774 struct nand_softc *sc = device_private(self); 775 struct nand_chip *chip = &sc->sc_chip; 776 size_t bs, cs, e, b; 777 uint8_t status; 778 uint8_t *ecc; 779 780 nand_command(self, ONFI_PAGE_PROGRAM); 781 nand_address_column(self, page, 0); 782 783 nand_busy(self); 784 785 bs = chip->nc_ecc->necc_block_size; 786 cs = chip->nc_ecc->necc_code_size; 787 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 788 789 /* XXX code duplication */ 790 /* decide if we access by 8 or 16 bits */ 791 if (chip->nc_flags & NC_BUSWIDTH_16) { 792 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 793 nand_ecc_prepare(self, NAND_ECC_WRITE); 794 nand_write_buf_2(self, data + b, bs); 795 nand_ecc_compute(self, data + b, ecc + e); 796 } 797 /* write oob with ecc correction code */ 798 nand_write_buf_2(self, chip->nc_oob_cache, 799 chip->nc_spare_size); 800 } else { 801 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 802 nand_ecc_prepare(self, NAND_ECC_WRITE); 803 nand_write_buf_1(self, data + b, bs); 804 nand_ecc_compute(self, data + b, ecc + e); 805 } 806 /* write oob with ecc correction code */ 807 nand_write_buf_1(self, chip->nc_oob_cache, 808 chip->nc_spare_size); 809 } 810 811 nand_command(self, ONFI_PAGE_PROGRAM_START); 812 813 nand_busy(self); 814 815 /* for debugging ecc */ 816 #if 0 817 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 818 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 819 printf("0x"); 820 for (b = 0; b < cs; b++) { 821 printf("%.2hhx", ecc[e+b]); 822 } 823 printf("\n"); 824 } 825 printf("--------------\n"); 826 #endif 827 828 status = nand_get_status(self); 829 KASSERT(status & ONFI_STATUS_RDY); 830 if (status & ONFI_STATUS_FAIL) { 831 aprint_error_dev(self, "page program failed!\n"); 832 return EIO; 833 } 834 835 return 0; 836 } 837 838 /* read the OOB of a page */ 839 int 840 nand_read_oob(device_t self, size_t page, uint8_t *oob) 841 { 842 struct nand_softc *sc = device_private(self); 843 struct nand_chip *chip = &sc->sc_chip; 844 845 nand_prepare_read(self, page, chip->nc_page_size); 846 847 if (chip->nc_flags & NC_BUSWIDTH_16) 848 nand_read_buf_2(self, oob, chip->nc_spare_size); 849 else 850 nand_read_buf_1(self, oob, chip->nc_spare_size); 851 852 /* for debugging drivers */ 853 #if 0 854 nand_dump_data("oob", oob, chip->nc_spare_size); 855 #endif 856 857 return 0; 858 } 859 860 static int 861 nand_write_oob(device_t self, size_t offset, const void *oob) 862 { 863 struct nand_softc *sc = device_private(self); 864 struct nand_chip *chip = &sc->sc_chip; 865 uint8_t status; 866 867 nand_command(self, ONFI_PAGE_PROGRAM); 868 nand_address_column(self, offset, chip->nc_page_size); 869 nand_command(self, ONFI_PAGE_PROGRAM_START); 870 871 nand_busy(self); 872 873 if (chip->nc_flags & NC_BUSWIDTH_16) 874 nand_write_buf_2(self, oob, chip->nc_spare_size); 875 else 876 nand_write_buf_1(self, oob, chip->nc_spare_size); 877 878 status = nand_get_status(self); 879 KASSERT(status & ONFI_STATUS_RDY); 880 if (status & ONFI_STATUS_FAIL) 881 return EIO; 882 else 883 return 0; 884 } 885 886 void 887 nand_markbad(device_t self, size_t offset) 888 { 889 struct nand_softc *sc = device_private(self); 890 struct nand_chip *chip = &sc->sc_chip; 891 flash_off_t blockoffset; 892 #ifdef NAND_BBT 893 flash_off_t block; 894 895 block = offset / chip->nc_block_size; 896 897 nand_bbt_block_markbad(self, block); 898 #endif 899 blockoffset = offset & chip->nc_block_mask; 900 901 /* check if it is already marked bad */ 902 if (nand_isbad(self, blockoffset)) 903 return; 904 905 nand_read_oob(self, blockoffset, chip->nc_oob_cache); 906 907 chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00; 908 chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00; 909 910 nand_write_oob(self, blockoffset, chip->nc_oob_cache); 911 } 912 913 bool 914 nand_isfactorybad(device_t self, flash_off_t offset) 915 { 916 struct nand_softc *sc = device_private(self); 917 struct nand_chip *chip = &sc->sc_chip; 918 flash_off_t block, first_page, last_page, page; 919 int i; 920 921 /* Check for factory bad blocks first 922 * Factory bad blocks are marked in the first or last 923 * page of the blocks, see: ONFI 2.2, 3.2.2. 924 */ 925 block = offset / chip->nc_block_size; 926 first_page = block * chip->nc_block_size; 927 last_page = (block + 1) * chip->nc_block_size 928 - chip->nc_page_size; 929 930 for (i = 0, page = first_page; i < 2; i++, page = last_page) { 931 /* address OOB */ 932 nand_prepare_read(self, page, chip->nc_page_size); 933 934 if (chip->nc_flags & NC_BUSWIDTH_16) { 935 uint16_t word; 936 nand_read_2(self, &word); 937 if (word == 0x0000) 938 return true; 939 } else { 940 uint8_t byte; 941 nand_read_1(self, &byte); 942 if (byte == 0x00) 943 return true; 944 } 945 } 946 947 return false; 948 } 949 950 bool 951 nand_iswornoutbad(device_t self, flash_off_t offset) 952 { 953 struct nand_softc *sc = device_private(self); 954 struct nand_chip *chip = &sc->sc_chip; 955 flash_off_t block; 956 957 /* we inspect the first page of the block */ 958 block = offset & chip->nc_block_mask; 959 960 /* Linux/u-boot compatible badblock handling */ 961 if (chip->nc_flags & NC_BUSWIDTH_16) { 962 uint16_t word, mark; 963 964 nand_prepare_read(self, block, 965 chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe)); 966 967 nand_read_2(self, &word); 968 mark = htole16(word); 969 if (chip->nc_badmarker_offs & 0x01) 970 mark >>= 8; 971 if ((mark & 0xff) != 0xff) 972 return true; 973 } else { 974 uint8_t byte; 975 976 nand_prepare_read(self, block, 977 chip->nc_page_size + chip->nc_badmarker_offs); 978 979 nand_read_1(self, &byte); 980 if (byte != 0xff) 981 return true; 982 } 983 984 return false; 985 } 986 987 bool 988 nand_isbad(device_t self, flash_off_t offset) 989 { 990 #ifdef NAND_BBT 991 struct nand_softc *sc = device_private(self); 992 struct nand_chip *chip = &sc->sc_chip; 993 flash_off_t block; 994 995 block = offset / chip->nc_block_size; 996 997 return nand_bbt_block_isbad(self, block); 998 #else 999 /* ONFI host requirement */ 1000 if (nand_isfactorybad(self, offset)) 1001 return true; 1002 1003 /* Look for Linux/U-Boot compatible bad marker */ 1004 if (nand_iswornoutbad(self, offset)) 1005 return true; 1006 1007 return false; 1008 #endif 1009 } 1010 1011 int 1012 nand_erase_block(device_t self, size_t offset) 1013 { 1014 uint8_t status; 1015 1016 /* xxx calculate first page of block for address? */ 1017 1018 nand_command(self, ONFI_BLOCK_ERASE); 1019 nand_address_row(self, offset); 1020 nand_command(self, ONFI_BLOCK_ERASE_START); 1021 1022 nand_busy(self); 1023 1024 status = nand_get_status(self); 1025 KASSERT(status & ONFI_STATUS_RDY); 1026 if (status & ONFI_STATUS_FAIL) { 1027 aprint_error_dev(self, "block erase failed!\n"); 1028 nand_markbad(self, offset); 1029 return EIO; 1030 } else { 1031 return 0; 1032 } 1033 } 1034 1035 /* default functions for driver development */ 1036 1037 /* default ECC using hamming code of 256 byte chunks */ 1038 int 1039 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 1040 { 1041 hamming_compute_256(data, code); 1042 1043 return 0; 1044 } 1045 1046 int 1047 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode, 1048 const uint8_t *compcode) 1049 { 1050 return hamming_correct_256(data, origcode, compcode); 1051 } 1052 1053 void 1054 nand_default_select(device_t self, bool enable) 1055 { 1056 /* do nothing */ 1057 return; 1058 } 1059 1060 /* implementation of the block device API */ 1061 1062 int 1063 nand_flash_submit(device_t self, struct buf * const bp) 1064 { 1065 struct nand_softc *sc = device_private(self); 1066 1067 return flash_io_submit(&sc->sc_flash_io, bp); 1068 } 1069 1070 /* 1071 * handle (page) unaligned write to nand 1072 */ 1073 static int 1074 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len, 1075 size_t *retlen, const uint8_t *buf) 1076 { 1077 struct nand_softc *sc = device_private(self); 1078 struct nand_chip *chip = &sc->sc_chip; 1079 flash_off_t first, last, firstoff; 1080 const uint8_t *bufp; 1081 flash_off_t addr; 1082 size_t left, count; 1083 int error = 0, i; 1084 1085 first = offset & chip->nc_page_mask; 1086 firstoff = offset & ~chip->nc_page_mask; 1087 /* XXX check if this should be len - 1 */ 1088 last = (offset + len) & chip->nc_page_mask; 1089 count = last - first + 1; 1090 1091 addr = first; 1092 *retlen = 0; 1093 1094 mutex_enter(&sc->sc_device_lock); 1095 if (count == 1) { 1096 if (nand_isbad(self, addr)) { 1097 aprint_error_dev(self, 1098 "nand_flash_write_unaligned: " 1099 "bad block encountered\n"); 1100 error = EIO; 1101 goto out; 1102 } 1103 1104 error = nand_read_page(self, addr, chip->nc_page_cache); 1105 if (error) { 1106 goto out; 1107 } 1108 1109 memcpy(chip->nc_page_cache + firstoff, buf, len); 1110 1111 error = nand_program_page(self, addr, chip->nc_page_cache); 1112 if (error) { 1113 goto out; 1114 } 1115 1116 *retlen = len; 1117 goto out; 1118 } 1119 1120 bufp = buf; 1121 left = len; 1122 1123 for (i = 0; i < count && left != 0; i++) { 1124 if (nand_isbad(self, addr)) { 1125 aprint_error_dev(self, 1126 "nand_flash_write_unaligned: " 1127 "bad block encountered\n"); 1128 error = EIO; 1129 goto out; 1130 } 1131 1132 if (i == 0) { 1133 error = nand_read_page(self, 1134 addr, chip->nc_page_cache); 1135 if (error) { 1136 goto out; 1137 } 1138 1139 memcpy(chip->nc_page_cache + firstoff, 1140 bufp, chip->nc_page_size - firstoff); 1141 1142 printf("program page: %s: %d\n", __FILE__, __LINE__); 1143 error = nand_program_page(self, 1144 addr, chip->nc_page_cache); 1145 if (error) { 1146 goto out; 1147 } 1148 1149 bufp += chip->nc_page_size - firstoff; 1150 left -= chip->nc_page_size - firstoff; 1151 *retlen += chip->nc_page_size - firstoff; 1152 1153 } else if (i == count - 1) { 1154 error = nand_read_page(self, 1155 addr, chip->nc_page_cache); 1156 if (error) { 1157 goto out; 1158 } 1159 1160 memcpy(chip->nc_page_cache, bufp, left); 1161 1162 error = nand_program_page(self, 1163 addr, chip->nc_page_cache); 1164 if (error) { 1165 goto out; 1166 } 1167 1168 *retlen += left; 1169 KASSERT(left < chip->nc_page_size); 1170 1171 } else { 1172 /* XXX debug */ 1173 if (left > chip->nc_page_size) { 1174 printf("left: %zu, i: %d, count: %zu\n", 1175 left, i, count); 1176 } 1177 KASSERT(left > chip->nc_page_size); 1178 1179 error = nand_program_page(self, addr, bufp); 1180 if (error) { 1181 goto out; 1182 } 1183 1184 bufp += chip->nc_page_size; 1185 left -= chip->nc_page_size; 1186 *retlen += chip->nc_page_size; 1187 } 1188 1189 addr += chip->nc_page_size; 1190 } 1191 1192 KASSERT(*retlen == len); 1193 out: 1194 mutex_exit(&sc->sc_device_lock); 1195 1196 return error; 1197 } 1198 1199 int 1200 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1201 const uint8_t *buf) 1202 { 1203 struct nand_softc *sc = device_private(self); 1204 struct nand_chip *chip = &sc->sc_chip; 1205 const uint8_t *bufp; 1206 size_t pages, page; 1207 daddr_t addr; 1208 int error = 0; 1209 1210 if ((offset + len) > chip->nc_size) { 1211 DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju)," 1212 " is over device size (0x%jx)\n", 1213 (uintmax_t)offset, (uintmax_t)len, 1214 (uintmax_t)chip->nc_size)); 1215 return EINVAL; 1216 } 1217 1218 if (len % chip->nc_page_size != 0 || 1219 offset % chip->nc_page_size != 0) { 1220 return nand_flash_write_unaligned(self, 1221 offset, len, retlen, buf); 1222 } 1223 1224 pages = len / chip->nc_page_size; 1225 KASSERT(pages != 0); 1226 *retlen = 0; 1227 1228 addr = offset; 1229 bufp = buf; 1230 1231 mutex_enter(&sc->sc_device_lock); 1232 for (page = 0; page < pages; page++) { 1233 /* do we need this check here? */ 1234 if (nand_isbad(self, addr)) { 1235 aprint_error_dev(self, 1236 "nand_flash_write: bad block encountered\n"); 1237 1238 error = EIO; 1239 goto out; 1240 } 1241 1242 error = nand_program_page(self, addr, bufp); 1243 if (error) { 1244 goto out; 1245 } 1246 1247 addr += chip->nc_page_size; 1248 bufp += chip->nc_page_size; 1249 *retlen += chip->nc_page_size; 1250 } 1251 out: 1252 mutex_exit(&sc->sc_device_lock); 1253 DPRINTF(("page programming: retlen: %" PRIu32 ", len: %" PRIu32 "\n", *retlen, len)); 1254 1255 return error; 1256 } 1257 1258 /* 1259 * handle (page) unaligned read from nand 1260 */ 1261 static int 1262 nand_flash_read_unaligned(device_t self, size_t offset, 1263 size_t len, size_t *retlen, uint8_t *buf) 1264 { 1265 struct nand_softc *sc = device_private(self); 1266 struct nand_chip *chip = &sc->sc_chip; 1267 daddr_t first, last, count, firstoff; 1268 uint8_t *bufp; 1269 daddr_t addr; 1270 size_t left; 1271 int error = 0, i; 1272 1273 first = offset & chip->nc_page_mask; 1274 firstoff = offset & ~chip->nc_page_mask; 1275 last = (offset + len) & chip->nc_page_mask; 1276 count = (last - first) / chip->nc_page_size + 1; 1277 1278 addr = first; 1279 bufp = buf; 1280 left = len; 1281 *retlen = 0; 1282 1283 mutex_enter(&sc->sc_device_lock); 1284 if (count == 1) { 1285 error = nand_read_page(self, addr, chip->nc_page_cache); 1286 if (error) { 1287 goto out; 1288 } 1289 1290 memcpy(bufp, chip->nc_page_cache + firstoff, len); 1291 1292 *retlen = len; 1293 goto out; 1294 } 1295 1296 for (i = 0; i < count && left != 0; i++) { 1297 error = nand_read_page(self, addr, chip->nc_page_cache); 1298 if (error) { 1299 goto out; 1300 } 1301 1302 if (i == 0) { 1303 memcpy(bufp, chip->nc_page_cache + firstoff, 1304 chip->nc_page_size - firstoff); 1305 1306 bufp += chip->nc_page_size - firstoff; 1307 left -= chip->nc_page_size - firstoff; 1308 *retlen += chip->nc_page_size - firstoff; 1309 1310 } else if (i == count - 1) { 1311 memcpy(bufp, chip->nc_page_cache, left); 1312 *retlen += left; 1313 KASSERT(left < chip->nc_page_size); 1314 1315 } else { 1316 memcpy(bufp, chip->nc_page_cache, chip->nc_page_size); 1317 1318 bufp += chip->nc_page_size; 1319 left -= chip->nc_page_size; 1320 *retlen += chip->nc_page_size; 1321 } 1322 1323 addr += chip->nc_page_size; 1324 } 1325 KASSERT(*retlen == len); 1326 out: 1327 mutex_exit(&sc->sc_device_lock); 1328 1329 return error; 1330 } 1331 1332 int 1333 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1334 uint8_t *buf) 1335 { 1336 struct nand_softc *sc = device_private(self); 1337 struct nand_chip *chip = &sc->sc_chip; 1338 uint8_t *bufp; 1339 size_t addr; 1340 size_t i, pages; 1341 int error = 0; 1342 1343 *retlen = 0; 1344 1345 DPRINTF(("nand_flash_read: off: 0x%jx, len: %" PRIu32 "\n", 1346 (uintmax_t)offset, len)); 1347 1348 if (__predict_false((offset + len) > chip->nc_size)) { 1349 DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %" PRIu32 ")," 1350 " is over device size (%ju)\n", (uintmax_t)offset, 1351 len, (uintmax_t)chip->nc_size)); 1352 return EINVAL; 1353 } 1354 1355 /* Handle unaligned access, shouldnt be needed when using the 1356 * block device, as strategy handles it, so only low level 1357 * accesses will use this path 1358 */ 1359 /* XXX^2 */ 1360 #if 0 1361 if (len < chip->nc_page_size) 1362 panic("TODO page size is larger than read size"); 1363 #endif 1364 1365 if (len % chip->nc_page_size != 0 || 1366 offset % chip->nc_page_size != 0) { 1367 return nand_flash_read_unaligned(self, 1368 offset, len, retlen, buf); 1369 } 1370 1371 bufp = buf; 1372 addr = offset; 1373 pages = len / chip->nc_page_size; 1374 1375 mutex_enter(&sc->sc_device_lock); 1376 for (i = 0; i < pages; i++) { 1377 /* XXX do we need this check here? */ 1378 if (nand_isbad(self, addr)) { 1379 aprint_error_dev(self, "bad block encountered\n"); 1380 error = EIO; 1381 goto out; 1382 } 1383 error = nand_read_page(self, addr, bufp); 1384 if (error) 1385 goto out; 1386 1387 bufp += chip->nc_page_size; 1388 addr += chip->nc_page_size; 1389 *retlen += chip->nc_page_size; 1390 } 1391 out: 1392 mutex_exit(&sc->sc_device_lock); 1393 1394 return error; 1395 } 1396 1397 int 1398 nand_flash_isbad(device_t self, flash_off_t ofs, bool *is_bad) 1399 { 1400 struct nand_softc *sc = device_private(self); 1401 struct nand_chip *chip = &sc->sc_chip; 1402 bool result; 1403 1404 if (ofs > chip->nc_size) { 1405 DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than" 1406 " device size (0x%jx)\n", (uintmax_t)ofs, 1407 (uintmax_t)chip->nc_size)); 1408 return EINVAL; 1409 } 1410 1411 if (ofs % chip->nc_block_size != 0) { 1412 DPRINTF(("offset (0x%jx) is not a multiple of block size " 1413 "(%ju)", 1414 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size)); 1415 return EINVAL; 1416 } 1417 1418 mutex_enter(&sc->sc_device_lock); 1419 result = nand_isbad(self, ofs); 1420 mutex_exit(&sc->sc_device_lock); 1421 1422 *is_bad = result; 1423 1424 return 0; 1425 } 1426 1427 int 1428 nand_flash_markbad(device_t self, flash_off_t ofs) 1429 { 1430 struct nand_softc *sc = device_private(self); 1431 struct nand_chip *chip = &sc->sc_chip; 1432 1433 if (ofs > chip->nc_size) { 1434 DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than" 1435 " device size (0x%jx)\n", ofs, 1436 (uintmax_t)chip->nc_size)); 1437 return EINVAL; 1438 } 1439 1440 if (ofs % chip->nc_block_size != 0) { 1441 panic("offset (%ju) is not a multiple of block size (%ju)", 1442 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1443 } 1444 1445 mutex_enter(&sc->sc_device_lock); 1446 nand_markbad(self, ofs); 1447 mutex_exit(&sc->sc_device_lock); 1448 1449 return 0; 1450 } 1451 1452 int 1453 nand_flash_erase(device_t self, 1454 struct flash_erase_instruction *ei) 1455 { 1456 struct nand_softc *sc = device_private(self); 1457 struct nand_chip *chip = &sc->sc_chip; 1458 flash_off_t addr; 1459 int error = 0; 1460 1461 if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size) 1462 return EINVAL; 1463 1464 if (ei->ei_addr + ei->ei_len > chip->nc_size) { 1465 DPRINTF(("nand_flash_erase: erase address is over the end" 1466 " of the device\n")); 1467 return EINVAL; 1468 } 1469 1470 if (ei->ei_addr % chip->nc_block_size != 0) { 1471 aprint_error_dev(self, 1472 "nand_flash_erase: ei_addr (%ju) is not" 1473 " a multiple of block size (%ju)", 1474 (uintmax_t)ei->ei_addr, 1475 (uintmax_t)chip->nc_block_size); 1476 return EINVAL; 1477 } 1478 1479 if (ei->ei_len % chip->nc_block_size != 0) { 1480 aprint_error_dev(self, 1481 "nand_flash_erase: ei_len (%ju) is not" 1482 " a multiple of block size (%ju)", 1483 (uintmax_t)ei->ei_len, 1484 (uintmax_t)chip->nc_block_size); 1485 return EINVAL; 1486 } 1487 1488 mutex_enter(&sc->sc_device_lock); 1489 addr = ei->ei_addr; 1490 while (addr < ei->ei_addr + ei->ei_len) { 1491 if (nand_isbad(self, addr)) { 1492 aprint_error_dev(self, "bad block encountered\n"); 1493 ei->ei_state = FLASH_ERASE_FAILED; 1494 error = EIO; 1495 goto out; 1496 } 1497 1498 error = nand_erase_block(self, addr); 1499 if (error) { 1500 ei->ei_state = FLASH_ERASE_FAILED; 1501 goto out; 1502 } 1503 1504 addr += chip->nc_block_size; 1505 } 1506 mutex_exit(&sc->sc_device_lock); 1507 1508 ei->ei_state = FLASH_ERASE_DONE; 1509 if (ei->ei_callback != NULL) { 1510 ei->ei_callback(ei); 1511 } 1512 1513 return 0; 1514 out: 1515 mutex_exit(&sc->sc_device_lock); 1516 1517 return error; 1518 } 1519 1520 MODULE(MODULE_CLASS_DRIVER, nand, "flash"); 1521 1522 #ifdef _MODULE 1523 #include "ioconf.c" 1524 #endif 1525 1526 static int 1527 nand_modcmd(modcmd_t cmd, void *opaque) 1528 { 1529 switch (cmd) { 1530 case MODULE_CMD_INIT: 1531 #ifdef _MODULE 1532 return config_init_component(cfdriver_ioconf_nand, 1533 cfattach_ioconf_nand, cfdata_ioconf_nand); 1534 #else 1535 return 0; 1536 #endif 1537 case MODULE_CMD_FINI: 1538 #ifdef _MODULE 1539 return config_fini_component(cfdriver_ioconf_nand, 1540 cfattach_ioconf_nand, cfdata_ioconf_nand); 1541 #else 1542 return 0; 1543 #endif 1544 default: 1545 return ENOTTY; 1546 } 1547 } 1548