1 /* $NetBSD: nand.c,v 1.12 2011/06/28 07:16:11 ahoka Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka@NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.12 2011/06/28 07:16:11 ahoka Exp $"); 38 39 #include "locators.h" 40 41 #include <sys/param.h> 42 #include <sys/types.h> 43 #include <sys/device.h> 44 #include <sys/kmem.h> 45 #include <sys/sysctl.h> 46 #include <sys/atomic.h> 47 48 #include <dev/flash/flash.h> 49 #include <dev/nand/nand.h> 50 #include <dev/nand/onfi.h> 51 #include <dev/nand/hamming.h> 52 #include <dev/nand/nand_bbt.h> 53 #include <dev/nand/nand_crc.h> 54 55 #include "opt_nand.h" 56 57 int nand_match(device_t, cfdata_t, void *); 58 void nand_attach(device_t, device_t, void *); 59 int nand_detach(device_t, int); 60 bool nand_shutdown(device_t, int); 61 62 int nand_print(void *, const char *); 63 64 static int nand_search(device_t, cfdata_t, const int *, void *); 65 static void nand_address_row(device_t, size_t); 66 static void nand_address_column(device_t, size_t, size_t); 67 static int nand_fill_chip_structure(device_t, struct nand_chip *); 68 static int nand_scan_media(device_t, struct nand_chip *); 69 static bool nand_check_wp(device_t); 70 71 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc), 72 nand_match, nand_attach, nand_detach, NULL); 73 74 #ifdef NAND_DEBUG 75 int nanddebug = NAND_DEBUG; 76 #endif 77 78 int nand_cachesync_timeout = 1; 79 int nand_cachesync_nodenum; 80 81 #ifdef NAND_VERBOSE 82 const struct nand_manufacturer nand_mfrs[] = { 83 { NAND_MFR_AMD, "AMD" }, 84 { NAND_MFR_FUJITSU, "Fujitsu" }, 85 { NAND_MFR_RENESAS, "Renesas" }, 86 { NAND_MFR_STMICRO, "ST Micro" }, 87 { NAND_MFR_MICRON, "Micron" }, 88 { NAND_MFR_NATIONAL, "National" }, 89 { NAND_MFR_TOSHIBA, "Toshiba" }, 90 { NAND_MFR_HYNIX, "Hynix" }, 91 { NAND_MFR_SAMSUNG, "Samsung" }, 92 { NAND_MFR_UNKNOWN, "Unknown" } 93 }; 94 95 static const char * 96 nand_midtoname(int id) 97 { 98 int i; 99 100 for (i = 0; nand_mfrs[i].id != 0; i++) { 101 if (nand_mfrs[i].id == id) 102 return nand_mfrs[i].name; 103 } 104 105 KASSERT(nand_mfrs[i].id == 0); 106 107 return nand_mfrs[i].name; 108 } 109 #endif 110 111 /* ARGSUSED */ 112 int 113 nand_match(device_t parent, cfdata_t match, void *aux) 114 { 115 /* pseudo device, always attaches */ 116 return 1; 117 } 118 119 void 120 nand_attach(device_t parent, device_t self, void *aux) 121 { 122 struct nand_softc *sc = device_private(self); 123 struct nand_attach_args *naa = aux; 124 struct nand_chip *chip = &sc->sc_chip; 125 126 sc->sc_dev = self; 127 sc->controller_dev = parent; 128 sc->nand_if = naa->naa_nand_if; 129 130 aprint_naive("\n"); 131 132 if (nand_check_wp(self)) { 133 aprint_error("NAND chip is write protected!\n"); 134 return; 135 } 136 137 if (nand_scan_media(self, chip)) { 138 return; 139 } 140 141 /* allocate cache */ 142 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP); 143 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP); 144 145 mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE); 146 147 if (nand_sync_thread_start(self)) { 148 goto error; 149 } 150 151 if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown)) 152 aprint_error_dev(sc->sc_dev, 153 "couldn't establish power handler\n"); 154 155 #ifdef NAND_BBT 156 nand_bbt_init(self); 157 nand_bbt_scan(self); 158 #endif 159 160 /* 161 * Attach all our devices 162 */ 163 config_search_ia(nand_search, self, NULL, NULL); 164 165 return; 166 error: 167 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 168 kmem_free(chip->nc_page_cache, chip->nc_page_size); 169 mutex_destroy(&sc->sc_device_lock); 170 } 171 172 static int 173 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 174 { 175 struct nand_softc *sc = device_private(parent); 176 struct nand_chip *chip = &sc->sc_chip; 177 struct flash_interface *flash_if; 178 struct flash_attach_args faa; 179 180 flash_if = kmem_alloc(sizeof(*flash_if), KM_SLEEP); 181 182 flash_if->type = FLASH_TYPE_NAND; 183 184 flash_if->read = nand_flash_read; 185 flash_if->write = nand_flash_write; 186 flash_if->erase = nand_flash_erase; 187 flash_if->block_isbad = nand_flash_isbad; 188 flash_if->block_markbad = nand_flash_markbad; 189 190 flash_if->submit = nand_io_submit; 191 192 flash_if->erasesize = chip->nc_block_size; 193 flash_if->page_size = chip->nc_page_size; 194 flash_if->writesize = chip->nc_page_size; 195 196 flash_if->partition.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET]; 197 198 if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) { 199 flash_if->size = chip->nc_size - 200 flash_if->partition.part_offset; 201 flash_if->partition.part_size = flash_if->size; 202 } else { 203 flash_if->size = cf->cf_loc[FLASHBUSCF_SIZE]; 204 flash_if->partition.part_size = cf->cf_loc[FLASHBUSCF_SIZE]; 205 } 206 207 if (cf->cf_loc[FLASHBUSCF_READONLY]) 208 flash_if->partition.part_flags = FLASH_PART_READONLY; 209 else 210 flash_if->partition.part_flags = 0; 211 212 faa.flash_if = flash_if; 213 214 if (config_match(parent, cf, &faa)) { 215 if (config_attach(parent, cf, &faa, nand_print) != NULL) { 216 return 0; 217 } else { 218 return 1; 219 } 220 } else { 221 kmem_free(flash_if, sizeof(*flash_if)); 222 } 223 224 return 1; 225 } 226 227 int 228 nand_detach(device_t self, int flags) 229 { 230 struct nand_softc *sc = device_private(self); 231 struct nand_chip *chip = &sc->sc_chip; 232 int error = 0; 233 234 error = config_detach_children(self, flags); 235 if (error) { 236 return error; 237 } 238 239 nand_sync_thread_stop(self); 240 #ifdef NAND_BBT 241 nand_bbt_detach(self); 242 #endif 243 /* free oob cache */ 244 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 245 kmem_free(chip->nc_page_cache, chip->nc_page_size); 246 kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size); 247 248 mutex_destroy(&sc->sc_device_lock); 249 250 pmf_device_deregister(sc->sc_dev); 251 252 return error; 253 } 254 255 int 256 nand_print(void *aux, const char *pnp) 257 { 258 if (pnp != NULL) 259 aprint_normal("nand at %s\n", pnp); 260 261 return UNCONF; 262 } 263 264 /* ask for a nand driver to attach to the controller */ 265 device_t 266 nand_attach_mi(struct nand_interface *nand_if, device_t parent) 267 { 268 struct nand_attach_args arg; 269 270 KASSERT(nand_if != NULL); 271 272 /* fill the defaults if we have null pointers */ 273 if (nand_if->program_page == NULL) { 274 nand_if->program_page = &nand_default_program_page; 275 } 276 277 if (nand_if->read_page == NULL) { 278 nand_if->read_page = &nand_default_read_page; 279 } 280 281 arg.naa_nand_if = nand_if; 282 return config_found_ia(parent, "nandbus", &arg, nand_print); 283 } 284 285 /* default everything to reasonable values, to ease future api changes */ 286 void 287 nand_init_interface(struct nand_interface *interface) 288 { 289 interface->select = &nand_default_select; 290 interface->command = NULL; 291 interface->address = NULL; 292 interface->read_buf_1 = NULL; 293 interface->read_buf_2 = NULL; 294 interface->read_1 = NULL; 295 interface->read_2 = NULL; 296 interface->write_buf_1 = NULL; 297 interface->write_buf_2 = NULL; 298 interface->write_1 = NULL; 299 interface->write_2 = NULL; 300 interface->busy = NULL; 301 302 /*- 303 * most drivers dont want to change this, but some implement 304 * read/program in one step 305 */ 306 interface->program_page = &nand_default_program_page; 307 interface->read_page = &nand_default_read_page; 308 309 /* default to soft ecc, that should work everywhere */ 310 interface->ecc_compute = &nand_default_ecc_compute; 311 interface->ecc_correct = &nand_default_ecc_correct; 312 interface->ecc_prepare = NULL; 313 interface->ecc.necc_code_size = 3; 314 interface->ecc.necc_block_size = 256; 315 interface->ecc.necc_type = NAND_ECC_TYPE_SW; 316 } 317 318 #if 0 319 /* handle quirks here */ 320 static void 321 nand_quirks(device_t self, struct nand_chip *chip) 322 { 323 /* this is an example only! */ 324 switch (chip->nc_manf_id) { 325 case NAND_MFR_SAMSUNG: 326 if (chip->nc_dev_id == 0x00) { 327 /* do something only samsung chips need */ 328 /* or */ 329 /* chip->nc_quirks |= NC_QUIRK_NO_READ_START */ 330 } 331 } 332 333 return; 334 } 335 #endif 336 337 static int 338 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip) 339 { 340 switch (chip->nc_manf_id) { 341 case NAND_MFR_MICRON: 342 return nand_read_parameters_micron(self, chip); 343 default: 344 return 1; 345 } 346 347 return 0; 348 } 349 350 /** 351 * scan media to determine the chip's properties 352 * this function resets the device 353 */ 354 static int 355 nand_scan_media(device_t self, struct nand_chip *chip) 356 { 357 struct nand_softc *sc = device_private(self); 358 struct nand_ecc *ecc; 359 uint8_t onfi_signature[4]; 360 361 nand_select(self, true); 362 nand_command(self, ONFI_RESET); 363 nand_select(self, false); 364 365 /* check if the device implements the ONFI standard */ 366 nand_select(self, true); 367 nand_command(self, ONFI_READ_ID); 368 nand_address(self, 0x20); 369 nand_read_1(self, &onfi_signature[0]); 370 nand_read_1(self, &onfi_signature[1]); 371 nand_read_1(self, &onfi_signature[2]); 372 nand_read_1(self, &onfi_signature[3]); 373 nand_select(self, false); 374 375 if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' || 376 onfi_signature[2] != 'F' || onfi_signature[3] != 'I') { 377 chip->nc_isonfi = false; 378 379 aprint_normal(": Legacy NAND Flash\n"); 380 381 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 382 383 if (nand_fill_chip_structure_legacy(self, chip)) { 384 aprint_error_dev(self, 385 "can't read device parameters for legacy chip\n"); 386 return 1; 387 } 388 } else { 389 chip->nc_isonfi = true; 390 391 aprint_normal(": ONFI NAND Flash\n"); 392 393 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 394 395 if (nand_fill_chip_structure(self, chip)) { 396 aprint_error_dev(self, 397 "can't read device parameters\n"); 398 return 1; 399 } 400 } 401 402 #ifdef NAND_VERBOSE 403 aprint_normal_dev(self, 404 "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n", 405 chip->nc_manf_id, 406 nand_midtoname(chip->nc_manf_id), 407 chip->nc_dev_id); 408 #endif 409 410 aprint_normal_dev(self, 411 "page size: %zu bytes, spare size: %zu bytes, " 412 "block size: %zu bytes\n", 413 chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size); 414 415 aprint_normal_dev(self, 416 "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8 417 ", total storage size: %zu MB\n", 418 chip->nc_lun_blocks, chip->nc_num_luns, 419 chip->nc_size / 1024 / 1024); 420 421 #ifdef NAND_VERBOSE 422 aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %" 423 PRIu8 "\n", 424 chip->nc_addr_cycles_column, chip->nc_addr_cycles_row); 425 #endif 426 427 ecc = chip->nc_ecc = &sc->nand_if->ecc; 428 429 /* 430 * calculate the place of ecc data in oob 431 * we try to be compatible with Linux here 432 */ 433 switch (chip->nc_spare_size) { 434 case 8: 435 ecc->necc_offset = 0; 436 break; 437 case 16: 438 ecc->necc_offset = 0; 439 break; 440 case 64: 441 ecc->necc_offset = 40; 442 break; 443 case 128: 444 ecc->necc_offset = 80; 445 break; 446 default: 447 panic("OOB size is unexpected"); 448 } 449 450 ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size; 451 ecc->necc_size = ecc->necc_steps * ecc->necc_code_size; 452 453 /* check if we fit in oob */ 454 if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) { 455 panic("NAND ECC bits dont fit in OOB"); 456 } 457 458 /* TODO: mark free oob area available for file systems */ 459 460 chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP); 461 462 /* 463 * calculate badblock marker offset in oob 464 * we try to be compatible with linux here 465 */ 466 if (chip->nc_page_size > 512) 467 chip->nc_badmarker_offs = 0; 468 else 469 chip->nc_badmarker_offs = 5; 470 471 /* Calculate page shift and mask */ 472 chip->nc_page_shift = ffs(chip->nc_page_size) - 1; 473 chip->nc_page_mask = ~(chip->nc_page_size - 1); 474 /* same for block */ 475 chip->nc_block_shift = ffs(chip->nc_block_size) - 1; 476 chip->nc_block_mask = ~(chip->nc_block_size - 1); 477 478 /* look for quirks here if needed in future */ 479 /* nand_quirks(self, chip); */ 480 481 return 0; 482 } 483 484 void 485 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev) 486 { 487 nand_select(self, true); 488 nand_command(self, ONFI_READ_ID); 489 nand_address(self, 0x00); 490 491 nand_read_1(self, manf); 492 nand_read_1(self, dev); 493 494 nand_select(self, false); 495 } 496 497 int 498 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params) 499 { 500 uint8_t *bufp; 501 uint16_t crc; 502 int i;//, tries = 0; 503 504 KASSERT(sizeof(*params) == 256); 505 506 //read_params: 507 // tries++; 508 509 nand_select(self, true); 510 nand_command(self, ONFI_READ_PARAMETER_PAGE); 511 nand_address(self, 0x00); 512 513 nand_busy(self); 514 515 /* TODO check the signature if it contains at least 2 letters */ 516 517 bufp = (uint8_t *)params; 518 /* XXX why i am not using read_buf? */ 519 for (i = 0; i < 256; i++) { 520 nand_read_1(self, &bufp[i]); 521 } 522 nand_select(self, false); 523 524 /* validate the parameter page with the crc */ 525 crc = nand_crc16(bufp, 254); 526 527 if (crc != params->param_integrity_crc) { 528 aprint_error_dev(self, "parameter page crc check failed\n"); 529 /* TODO: we should read the next parameter page copy */ 530 return 1; 531 } 532 533 return 0; 534 } 535 536 static int 537 nand_fill_chip_structure(device_t self, struct nand_chip *chip) 538 { 539 struct onfi_parameter_page params; 540 uint8_t vendor[13], model[21]; 541 int i; 542 543 if (nand_read_parameter_page(self, ¶ms)) { 544 return 1; 545 } 546 547 /* strip manufacturer and model string */ 548 strlcpy(vendor, params.param_manufacturer, sizeof(vendor)); 549 for (i = 11; i > 0 && vendor[i] == ' '; i--) 550 vendor[i] = 0; 551 strlcpy(model, params.param_model, sizeof(model)); 552 for (i = 19; i > 0 && model[i] == ' '; i--) 553 model[i] = 0; 554 555 aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model); 556 557 /* XXX TODO multiple LUNs */ 558 if (params.param_numluns != 1) { 559 aprint_error_dev(self, 560 "more than one LUNs are not supported yet!\n"); 561 562 return 1; 563 } 564 565 chip->nc_size = params.param_pagesize * params.param_blocksize * 566 params.param_lunsize * params.param_numluns; 567 568 chip->nc_page_size = params.param_pagesize; 569 chip->nc_block_pages = params.param_blocksize; 570 chip->nc_block_size = params.param_blocksize * params.param_pagesize; 571 chip->nc_spare_size = params.param_sparesize; 572 chip->nc_lun_blocks = params.param_lunsize; 573 chip->nc_num_luns = params.param_numluns; 574 575 /* the lower 4 bits contain the row address cycles */ 576 chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07; 577 /* the upper 4 bits contain the column address cycles */ 578 chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4; 579 580 if (params.param_features & ONFI_FEATURE_16BIT) 581 chip->nc_flags |= NC_BUSWIDTH_16; 582 583 if (params.param_features & ONFI_FEATURE_EXTENDED_PARAM) 584 chip->nc_flags |= NC_EXTENDED_PARAM; 585 586 return 0; 587 } 588 589 /* ARGSUSED */ 590 bool 591 nand_shutdown(device_t self, int howto) 592 { 593 return true; 594 } 595 596 static void 597 nand_address_column(device_t self, size_t row, size_t column) 598 { 599 struct nand_softc *sc = device_private(self); 600 struct nand_chip *chip = &sc->sc_chip; 601 uint8_t i; 602 603 DPRINTF(("addressing row: 0x%jx column: %zu\n", 604 (uintmax_t )row, column)); 605 606 /* XXX TODO */ 607 row >>= chip->nc_page_shift; 608 609 /* Write the column (subpage) address */ 610 if (chip->nc_flags & NC_BUSWIDTH_16) 611 column >>= 1; 612 for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8) 613 nand_address(self, column & 0xff); 614 615 /* Write the row (page) address */ 616 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 617 nand_address(self, row & 0xff); 618 } 619 620 static void 621 nand_address_row(device_t self, size_t row) 622 { 623 struct nand_softc *sc = device_private(self); 624 struct nand_chip *chip = &sc->sc_chip; 625 int i; 626 627 /* XXX TODO */ 628 row >>= chip->nc_page_shift; 629 630 /* Write the row (page) address */ 631 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 632 nand_address(self, row & 0xff); 633 } 634 635 static inline uint8_t 636 nand_get_status(device_t self) 637 { 638 uint8_t status; 639 640 nand_command(self, ONFI_READ_STATUS); 641 nand_busy(self); 642 nand_read_1(self, &status); 643 644 return status; 645 } 646 647 static bool 648 nand_check_wp(device_t self) 649 { 650 if (nand_get_status(self) & 0x80) 651 return false; 652 else 653 return true; 654 } 655 656 static void 657 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column) 658 { 659 nand_command(self, ONFI_READ); 660 nand_address_column(self, row, column); 661 nand_command(self, ONFI_READ_START); 662 663 nand_busy(self); 664 } 665 666 /* read a page with ecc correction, default implementation */ 667 int 668 nand_default_read_page(device_t self, size_t offset, uint8_t *data) 669 { 670 struct nand_softc *sc = device_private(self); 671 struct nand_chip *chip = &sc->sc_chip; 672 size_t b, bs, e, cs; 673 uint8_t *ecc; 674 int result; 675 676 nand_prepare_read(self, offset, 0); 677 678 bs = chip->nc_ecc->necc_block_size; 679 cs = chip->nc_ecc->necc_code_size; 680 681 /* decide if we access by 8 or 16 bits */ 682 if (chip->nc_flags & NC_BUSWIDTH_16) { 683 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 684 nand_ecc_prepare(self, NAND_ECC_READ); 685 nand_read_buf_2(self, data + b, bs); 686 nand_ecc_compute(self, data + b, 687 chip->nc_ecc_cache + e); 688 } 689 } else { 690 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 691 nand_ecc_prepare(self, NAND_ECC_READ); 692 nand_read_buf_1(self, data + b, bs); 693 nand_ecc_compute(self, data + b, 694 chip->nc_ecc_cache + e); 695 } 696 } 697 698 /* for debugging new drivers */ 699 #if 0 700 nand_dump_data("page", data, chip->nc_page_size); 701 #endif 702 703 nand_read_oob(self, offset, chip->nc_oob_cache); 704 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 705 706 /* useful for debugging new ecc drivers */ 707 #if 0 708 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 709 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 710 printf("0x"); 711 for (b = 0; b < cs; b++) { 712 printf("%.2hhx", ecc[e+b]); 713 } 714 printf(" 0x"); 715 for (b = 0; b < cs; b++) { 716 printf("%.2hhx", chip->nc_ecc_cache[e+b]); 717 } 718 printf("\n"); 719 } 720 printf("--------------\n"); 721 #endif 722 723 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 724 result = nand_ecc_correct(self, data + b, ecc + e, 725 chip->nc_ecc_cache + e); 726 727 switch (result) { 728 case NAND_ECC_OK: 729 break; 730 case NAND_ECC_CORRECTED: 731 aprint_error_dev(self, 732 "data corrected with ECC at page offset 0x%jx " 733 "block %zu\n", (uintmax_t)offset, b); 734 break; 735 case NAND_ECC_TWOBIT: 736 aprint_error_dev(self, 737 "uncorrectable ECC error at page offset 0x%jx " 738 "block %zu\n", (uintmax_t)offset, b); 739 return EIO; 740 break; 741 case NAND_ECC_INVALID: 742 aprint_error_dev(self, 743 "invalid ECC in oob at page offset 0x%jx " 744 "block %zu\n", (uintmax_t)offset, b); 745 return EIO; 746 break; 747 default: 748 panic("invalid ECC correction errno"); 749 } 750 } 751 752 return 0; 753 } 754 755 int 756 nand_default_program_page(device_t self, size_t page, const uint8_t *data) 757 { 758 struct nand_softc *sc = device_private(self); 759 struct nand_chip *chip = &sc->sc_chip; 760 size_t bs, cs, e, b; 761 uint8_t status; 762 uint8_t *ecc; 763 764 nand_command(self, ONFI_PAGE_PROGRAM); 765 nand_address_column(self, page, 0); 766 767 nand_busy(self); 768 769 bs = chip->nc_ecc->necc_block_size; 770 cs = chip->nc_ecc->necc_code_size; 771 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 772 773 /* XXX code duplication */ 774 /* decide if we access by 8 or 16 bits */ 775 if (chip->nc_flags & NC_BUSWIDTH_16) { 776 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 777 nand_ecc_prepare(self, NAND_ECC_WRITE); 778 nand_write_buf_2(self, data + b, bs); 779 nand_ecc_compute(self, data + b, ecc + e); 780 } 781 /* write oob with ecc correction code */ 782 nand_write_buf_2(self, chip->nc_oob_cache, 783 chip->nc_spare_size); 784 } else { 785 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 786 nand_ecc_prepare(self, NAND_ECC_WRITE); 787 nand_write_buf_1(self, data + b, bs); 788 nand_ecc_compute(self, data + b, ecc + e); 789 } 790 /* write oob with ecc correction code */ 791 nand_write_buf_1(self, chip->nc_oob_cache, 792 chip->nc_spare_size); 793 } 794 795 nand_command(self, ONFI_PAGE_PROGRAM_START); 796 797 nand_busy(self); 798 799 /* for debugging ecc */ 800 #if 0 801 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 802 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 803 printf("0x"); 804 for (b = 0; b < cs; b++) { 805 printf("%.2hhx", ecc[e+b]); 806 } 807 printf("\n"); 808 } 809 printf("--------------\n"); 810 #endif 811 812 status = nand_get_status(self); 813 KASSERT(status & ONFI_STATUS_RDY); 814 if (status & ONFI_STATUS_FAIL) { 815 aprint_error_dev(self, "page program failed!\n"); 816 return EIO; 817 } 818 819 return 0; 820 } 821 822 /* read the OOB of a page */ 823 int 824 nand_read_oob(device_t self, size_t page, uint8_t *oob) 825 { 826 struct nand_softc *sc = device_private(self); 827 struct nand_chip *chip = &sc->sc_chip; 828 829 nand_prepare_read(self, page, chip->nc_page_size); 830 831 if (chip->nc_flags & NC_BUSWIDTH_16) 832 nand_read_buf_2(self, oob, chip->nc_spare_size); 833 else 834 nand_read_buf_1(self, oob, chip->nc_spare_size); 835 836 /* for debugging drivers */ 837 #if 0 838 nand_dump_data("oob", oob, chip->nc_spare_size); 839 #endif 840 841 return 0; 842 } 843 844 static int 845 nand_write_oob(device_t self, size_t offset, const void *oob) 846 { 847 struct nand_softc *sc = device_private(self); 848 struct nand_chip *chip = &sc->sc_chip; 849 uint8_t status; 850 851 nand_command(self, ONFI_PAGE_PROGRAM); 852 nand_address_column(self, offset, chip->nc_page_size); 853 nand_command(self, ONFI_PAGE_PROGRAM_START); 854 855 nand_busy(self); 856 857 if (chip->nc_flags & NC_BUSWIDTH_16) 858 nand_write_buf_2(self, oob, chip->nc_spare_size); 859 else 860 nand_write_buf_1(self, oob, chip->nc_spare_size); 861 862 status = nand_get_status(self); 863 KASSERT(status & ONFI_STATUS_RDY); 864 if (status & ONFI_STATUS_FAIL) 865 return EIO; 866 else 867 return 0; 868 } 869 870 void 871 nand_markbad(device_t self, size_t offset) 872 { 873 struct nand_softc *sc = device_private(self); 874 struct nand_chip *chip = &sc->sc_chip; 875 flash_off_t blockoffset, marker; 876 #ifdef NAND_BBT 877 flash_off_t block; 878 879 block = offset / chip->nc_block_size; 880 881 nand_bbt_block_markbad(self, block); 882 #endif 883 blockoffset = offset & chip->nc_block_mask; 884 marker = chip->nc_badmarker_offs & ~0x01; 885 886 /* check if it is already marked bad */ 887 if (nand_isbad(self, blockoffset)) 888 return; 889 890 nand_read_oob(self, blockoffset, chip->nc_oob_cache); 891 892 chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00; 893 chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00; 894 895 nand_write_oob(self, blockoffset, chip->nc_oob_cache); 896 } 897 898 bool 899 nand_isfactorybad(device_t self, flash_off_t offset) 900 { 901 struct nand_softc *sc = device_private(self); 902 struct nand_chip *chip = &sc->sc_chip; 903 flash_off_t block, first_page, last_page, page; 904 int i; 905 906 /* Check for factory bad blocks first 907 * Factory bad blocks are marked in the first or last 908 * page of the blocks, see: ONFI 2.2, 3.2.2. 909 */ 910 block = offset / chip->nc_block_size; 911 first_page = block * chip->nc_block_size; 912 last_page = (block + 1) * chip->nc_block_size 913 - chip->nc_page_size; 914 915 for (i = 0, page = first_page; i < 2; i++, page = last_page) { 916 /* address OOB */ 917 nand_prepare_read(self, page, chip->nc_page_size); 918 919 if (chip->nc_flags & NC_BUSWIDTH_16) { 920 uint16_t word; 921 nand_read_2(self, &word); 922 if (word == 0x0000) 923 return true; 924 } else { 925 uint8_t byte; 926 nand_read_1(self, &byte); 927 if (byte == 0x00) 928 return true; 929 } 930 } 931 932 return false; 933 } 934 935 bool 936 nand_iswornoutbad(device_t self, flash_off_t offset) 937 { 938 struct nand_softc *sc = device_private(self); 939 struct nand_chip *chip = &sc->sc_chip; 940 flash_off_t block; 941 942 /* we inspect the first page of the block */ 943 block = offset & chip->nc_block_mask; 944 945 /* Linux/u-boot compatible badblock handling */ 946 if (chip->nc_flags & NC_BUSWIDTH_16) { 947 uint16_t word, mark; 948 949 nand_prepare_read(self, block, 950 chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe)); 951 952 nand_read_2(self, &word); 953 mark = htole16(word); 954 if (chip->nc_badmarker_offs & 0x01) 955 mark >>= 8; 956 if ((mark & 0xff) != 0xff) 957 return true; 958 } else { 959 uint8_t byte; 960 961 nand_prepare_read(self, block, 962 chip->nc_page_size + chip->nc_badmarker_offs); 963 964 nand_read_1(self, &byte); 965 if (byte != 0xff) 966 return true; 967 } 968 969 return false; 970 } 971 972 bool 973 nand_isbad(device_t self, flash_off_t offset) 974 { 975 #ifdef NAND_BBT 976 struct nand_softc *sc = device_private(self); 977 struct nand_chip *chip = &sc->sc_chip; 978 flash_off_t block; 979 980 block = offset / chip->nc_block_size; 981 982 return nand_bbt_block_isbad(self, block); 983 #else 984 /* ONFI host requirement */ 985 if (nand_isfactorybad(self, offset)) 986 return true; 987 988 /* Look for Linux/U-Boot compatible bad marker */ 989 if (nand_iswornoutbad(self, offset)) 990 return true; 991 992 return false; 993 #endif 994 } 995 996 int 997 nand_erase_block(device_t self, size_t offset) 998 { 999 uint8_t status; 1000 1001 /* xxx calculate first page of block for address? */ 1002 1003 nand_command(self, ONFI_BLOCK_ERASE); 1004 nand_address_row(self, offset); 1005 nand_command(self, ONFI_BLOCK_ERASE_START); 1006 1007 nand_busy(self); 1008 1009 status = nand_get_status(self); 1010 KASSERT(status & ONFI_STATUS_RDY); 1011 if (status & ONFI_STATUS_FAIL) { 1012 aprint_error_dev(self, "block erase failed!\n"); 1013 nand_markbad(self, offset); 1014 return EIO; 1015 } else { 1016 return 0; 1017 } 1018 } 1019 1020 /* default functions for driver development */ 1021 1022 /* default ECC using hamming code of 256 byte chunks */ 1023 int 1024 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 1025 { 1026 hamming_compute_256(data, code); 1027 1028 return 0; 1029 } 1030 1031 int 1032 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode, 1033 const uint8_t *compcode) 1034 { 1035 return hamming_correct_256(data, origcode, compcode); 1036 } 1037 1038 void 1039 nand_default_select(device_t self, bool enable) 1040 { 1041 /* do nothing */ 1042 return; 1043 } 1044 1045 /* implementation of the block device API */ 1046 1047 /* 1048 * handle (page) unaligned write to nand 1049 */ 1050 static int 1051 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len, 1052 size_t *retlen, const uint8_t *buf) 1053 { 1054 struct nand_softc *sc = device_private(self); 1055 struct nand_chip *chip = &sc->sc_chip; 1056 flash_off_t first, last, firstoff; 1057 const uint8_t *bufp; 1058 flash_off_t addr; 1059 size_t left, count; 1060 int error = 0, i; 1061 1062 first = offset & chip->nc_page_mask; 1063 firstoff = offset & ~chip->nc_page_mask; 1064 /* XXX check if this should be len - 1 */ 1065 last = (offset + len) & chip->nc_page_mask; 1066 count = last - first + 1; 1067 1068 addr = first; 1069 *retlen = 0; 1070 1071 mutex_enter(&sc->sc_device_lock); 1072 if (count == 1) { 1073 if (nand_isbad(self, addr)) { 1074 aprint_error_dev(self, 1075 "nand_flash_write_unaligned: " 1076 "bad block encountered\n"); 1077 error = EIO; 1078 goto out; 1079 } 1080 1081 error = nand_read_page(self, addr, chip->nc_page_cache); 1082 if (error) { 1083 goto out; 1084 } 1085 1086 memcpy(chip->nc_page_cache + firstoff, buf, len); 1087 1088 error = nand_program_page(self, addr, chip->nc_page_cache); 1089 if (error) { 1090 goto out; 1091 } 1092 1093 *retlen = len; 1094 goto out; 1095 } 1096 1097 bufp = buf; 1098 left = len; 1099 1100 for (i = 0; i < count && left != 0; i++) { 1101 if (nand_isbad(self, addr)) { 1102 aprint_error_dev(self, 1103 "nand_flash_write_unaligned: " 1104 "bad block encountered\n"); 1105 error = EIO; 1106 goto out; 1107 } 1108 1109 if (i == 0) { 1110 error = nand_read_page(self, 1111 addr, chip->nc_page_cache); 1112 if (error) { 1113 goto out; 1114 } 1115 1116 memcpy(chip->nc_page_cache + firstoff, 1117 bufp, chip->nc_page_size - firstoff); 1118 1119 printf("program page: %s: %d\n", __FILE__, __LINE__); 1120 error = nand_program_page(self, 1121 addr, chip->nc_page_cache); 1122 if (error) { 1123 goto out; 1124 } 1125 1126 bufp += chip->nc_page_size - firstoff; 1127 left -= chip->nc_page_size - firstoff; 1128 *retlen += chip->nc_page_size - firstoff; 1129 1130 } else if (i == count - 1) { 1131 error = nand_read_page(self, 1132 addr, chip->nc_page_cache); 1133 if (error) { 1134 goto out; 1135 } 1136 1137 memcpy(chip->nc_page_cache, bufp, left); 1138 1139 error = nand_program_page(self, 1140 addr, chip->nc_page_cache); 1141 if (error) { 1142 goto out; 1143 } 1144 1145 *retlen += left; 1146 KASSERT(left < chip->nc_page_size); 1147 1148 } else { 1149 /* XXX debug */ 1150 if (left > chip->nc_page_size) { 1151 printf("left: %zu, i: %d, count: %zu\n", 1152 (size_t )left, i, count); 1153 } 1154 KASSERT(left > chip->nc_page_size); 1155 1156 error = nand_program_page(self, addr, bufp); 1157 if (error) { 1158 goto out; 1159 } 1160 1161 bufp += chip->nc_page_size; 1162 left -= chip->nc_page_size; 1163 *retlen += chip->nc_page_size; 1164 } 1165 1166 addr += chip->nc_page_size; 1167 } 1168 1169 KASSERT(*retlen == len); 1170 out: 1171 mutex_exit(&sc->sc_device_lock); 1172 1173 return error; 1174 } 1175 1176 int 1177 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1178 const uint8_t *buf) 1179 { 1180 struct nand_softc *sc = device_private(self); 1181 struct nand_chip *chip = &sc->sc_chip; 1182 const uint8_t *bufp; 1183 size_t pages, page; 1184 daddr_t addr; 1185 int error = 0; 1186 1187 if ((offset + len) > chip->nc_size) { 1188 DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju)," 1189 " is over device size (0x%jx)\n", 1190 (uintmax_t)offset, (uintmax_t)len, 1191 (uintmax_t)chip->nc_size)); 1192 return EINVAL; 1193 } 1194 1195 if (len % chip->nc_page_size != 0 || 1196 offset % chip->nc_page_size != 0) { 1197 return nand_flash_write_unaligned(self, 1198 offset, len, retlen, buf); 1199 } 1200 1201 pages = len / chip->nc_page_size; 1202 KASSERT(pages != 0); 1203 *retlen = 0; 1204 1205 addr = offset; 1206 bufp = buf; 1207 1208 mutex_enter(&sc->sc_device_lock); 1209 for (page = 0; page < pages; page++) { 1210 /* do we need this check here? */ 1211 if (nand_isbad(self, addr)) { 1212 aprint_error_dev(self, 1213 "nand_flash_write: bad block encountered\n"); 1214 1215 error = EIO; 1216 goto out; 1217 } 1218 1219 error = nand_program_page(self, addr, bufp); 1220 if (error) { 1221 goto out; 1222 } 1223 1224 addr += chip->nc_page_size; 1225 bufp += chip->nc_page_size; 1226 *retlen += chip->nc_page_size; 1227 } 1228 out: 1229 mutex_exit(&sc->sc_device_lock); 1230 DPRINTF(("page programming: retlen: %zu, len: %zu\n", *retlen, len)); 1231 1232 return error; 1233 } 1234 1235 /* 1236 * handle (page) unaligned read from nand 1237 */ 1238 static int 1239 nand_flash_read_unaligned(device_t self, size_t offset, 1240 size_t len, size_t *retlen, uint8_t *buf) 1241 { 1242 struct nand_softc *sc = device_private(self); 1243 struct nand_chip *chip = &sc->sc_chip; 1244 daddr_t first, last, count, firstoff; 1245 uint8_t *bufp; 1246 daddr_t addr; 1247 size_t left; 1248 int error = 0, i; 1249 1250 first = offset & chip->nc_page_mask; 1251 firstoff = offset & ~chip->nc_page_mask; 1252 last = (offset + len) & chip->nc_page_mask; 1253 count = (last - first) / chip->nc_page_size + 1; 1254 1255 addr = first; 1256 bufp = buf; 1257 left = len; 1258 *retlen = 0; 1259 1260 mutex_enter(&sc->sc_device_lock); 1261 if (count == 1) { 1262 error = nand_read_page(self, addr, chip->nc_page_cache); 1263 if (error) { 1264 goto out; 1265 } 1266 1267 memcpy(bufp, chip->nc_page_cache + firstoff, len); 1268 1269 *retlen = len; 1270 goto out; 1271 } 1272 1273 for (i = 0; i < count && left != 0; i++) { 1274 error = nand_read_page(self, addr, chip->nc_page_cache); 1275 if (error) { 1276 goto out; 1277 } 1278 1279 if (i == 0) { 1280 memcpy(bufp, chip->nc_page_cache + firstoff, 1281 chip->nc_page_size - firstoff); 1282 1283 bufp += chip->nc_page_size - firstoff; 1284 left -= chip->nc_page_size - firstoff; 1285 *retlen += chip->nc_page_size - firstoff; 1286 1287 } else if (i == count - 1) { 1288 memcpy(bufp, chip->nc_page_cache, left); 1289 *retlen += left; 1290 KASSERT(left < chip->nc_page_size); 1291 1292 } else { 1293 memcpy(bufp, chip->nc_page_cache, chip->nc_page_size); 1294 1295 bufp += chip->nc_page_size; 1296 left -= chip->nc_page_size; 1297 *retlen += chip->nc_page_size; 1298 } 1299 1300 addr += chip->nc_page_size; 1301 } 1302 KASSERT(*retlen == len); 1303 out: 1304 mutex_exit(&sc->sc_device_lock); 1305 1306 return error; 1307 } 1308 1309 int 1310 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1311 uint8_t *buf) 1312 { 1313 struct nand_softc *sc = device_private(self); 1314 struct nand_chip *chip = &sc->sc_chip; 1315 uint8_t *bufp; 1316 size_t addr; 1317 size_t i, pages; 1318 int error = 0; 1319 1320 *retlen = 0; 1321 1322 DPRINTF(("nand_flash_read: off: 0x%jx, len: %zu\n", 1323 (uintmax_t)offset, len)); 1324 1325 if (__predict_false((offset + len) > chip->nc_size)) { 1326 DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %zu)," 1327 " is over device size (%ju)\n", (uintmax_t)offset, 1328 len, (uintmax_t)chip->nc_size)); 1329 return EINVAL; 1330 } 1331 1332 /* Handle unaligned access, shouldnt be needed when using the 1333 * block device, as strategy handles it, so only low level 1334 * accesses will use this path 1335 */ 1336 /* XXX^2 */ 1337 #if 0 1338 if (len < chip->nc_page_size) 1339 panic("TODO page size is larger than read size"); 1340 #endif 1341 1342 if (len % chip->nc_page_size != 0 || 1343 offset % chip->nc_page_size != 0) { 1344 return nand_flash_read_unaligned(self, 1345 offset, len, retlen, buf); 1346 } 1347 1348 bufp = buf; 1349 addr = offset; 1350 pages = len / chip->nc_page_size; 1351 1352 mutex_enter(&sc->sc_device_lock); 1353 for (i = 0; i < pages; i++) { 1354 /* XXX do we need this check here? */ 1355 if (nand_isbad(self, addr)) { 1356 aprint_error_dev(self, "bad block encountered\n"); 1357 error = EIO; 1358 goto out; 1359 } 1360 error = nand_read_page(self, addr, bufp); 1361 if (error) 1362 goto out; 1363 1364 bufp += chip->nc_page_size; 1365 addr += chip->nc_page_size; 1366 *retlen += chip->nc_page_size; 1367 } 1368 out: 1369 mutex_exit(&sc->sc_device_lock); 1370 1371 return error; 1372 } 1373 1374 int 1375 nand_flash_isbad(device_t self, flash_off_t ofs, bool *isbad) 1376 { 1377 struct nand_softc *sc = device_private(self); 1378 struct nand_chip *chip = &sc->sc_chip; 1379 bool result; 1380 1381 if (ofs > chip->nc_size) { 1382 DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than" 1383 " device size (0x%jx)\n", (uintmax_t)ofs, 1384 (uintmax_t)chip->nc_size)); 1385 return EINVAL; 1386 } 1387 1388 if (ofs % chip->nc_block_size != 0) { 1389 DPRINTF(("offset (0x%jx) is not the multiple of block size " 1390 "(%ju)", 1391 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size)); 1392 return EINVAL; 1393 } 1394 1395 mutex_enter(&sc->sc_device_lock); 1396 result = nand_isbad(self, ofs); 1397 mutex_exit(&sc->sc_device_lock); 1398 1399 *isbad = result; 1400 1401 return 0; 1402 } 1403 1404 int 1405 nand_flash_markbad(device_t self, flash_off_t ofs) 1406 { 1407 struct nand_softc *sc = device_private(self); 1408 struct nand_chip *chip = &sc->sc_chip; 1409 1410 if (ofs > chip->nc_size) { 1411 DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than" 1412 " device size (0x%jx)\n", ofs, 1413 (uintmax_t)chip->nc_size)); 1414 return EINVAL; 1415 } 1416 1417 if (ofs % chip->nc_block_size != 0) { 1418 panic("offset (%ju) is not the multiple of block size (%ju)", 1419 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1420 } 1421 1422 mutex_enter(&sc->sc_device_lock); 1423 nand_markbad(self, ofs); 1424 mutex_exit(&sc->sc_device_lock); 1425 1426 return 0; 1427 } 1428 1429 int 1430 nand_flash_erase(device_t self, 1431 struct flash_erase_instruction *ei) 1432 { 1433 struct nand_softc *sc = device_private(self); 1434 struct nand_chip *chip = &sc->sc_chip; 1435 flash_off_t addr; 1436 int error = 0; 1437 1438 if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size) 1439 return EINVAL; 1440 1441 if (ei->ei_addr + ei->ei_len > chip->nc_size) { 1442 DPRINTF(("nand_flash_erase: erase address is over the end" 1443 " of the device\n")); 1444 return EINVAL; 1445 } 1446 1447 if (ei->ei_addr % chip->nc_block_size != 0) { 1448 aprint_error_dev(self, 1449 "nand_flash_erase: ei_addr (%ju) is not" 1450 "the multiple of block size (%ju)", 1451 (uintmax_t)ei->ei_addr, 1452 (uintmax_t)chip->nc_block_size); 1453 return EINVAL; 1454 } 1455 1456 if (ei->ei_len % chip->nc_block_size != 0) { 1457 aprint_error_dev(self, 1458 "nand_flash_erase: ei_len (%ju) is not" 1459 "the multiple of block size (%ju)", 1460 (uintmax_t)ei->ei_addr, 1461 (uintmax_t)chip->nc_block_size); 1462 return EINVAL; 1463 } 1464 1465 mutex_enter(&sc->sc_device_lock); 1466 addr = ei->ei_addr; 1467 while (addr < ei->ei_addr + ei->ei_len) { 1468 if (nand_isbad(self, addr)) { 1469 aprint_error_dev(self, "bad block encountered\n"); 1470 ei->ei_state = FLASH_ERASE_FAILED; 1471 error = EIO; 1472 goto out; 1473 } 1474 1475 error = nand_erase_block(self, addr); 1476 if (error) { 1477 ei->ei_state = FLASH_ERASE_FAILED; 1478 goto out; 1479 } 1480 1481 addr += chip->nc_block_size; 1482 } 1483 mutex_exit(&sc->sc_device_lock); 1484 1485 ei->ei_state = FLASH_ERASE_DONE; 1486 if (ei->ei_callback != NULL) { 1487 ei->ei_callback(ei); 1488 } 1489 1490 return 0; 1491 out: 1492 mutex_exit(&sc->sc_device_lock); 1493 1494 return error; 1495 } 1496 1497 static int 1498 sysctl_nand_verify(SYSCTLFN_ARGS) 1499 { 1500 int error, t; 1501 struct sysctlnode node; 1502 1503 node = *rnode; 1504 t = *(int *)rnode->sysctl_data; 1505 node.sysctl_data = &t; 1506 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 1507 if (error || newp == NULL) 1508 return error; 1509 1510 if (node.sysctl_num == nand_cachesync_nodenum) { 1511 if (t <= 0 || t > 60) 1512 return EINVAL; 1513 } else { 1514 return EINVAL; 1515 } 1516 1517 *(int *)rnode->sysctl_data = t; 1518 1519 return 0; 1520 } 1521 1522 SYSCTL_SETUP(sysctl_nand, "sysctl nand subtree setup") 1523 { 1524 int rc, nand_root_num; 1525 const struct sysctlnode *node; 1526 1527 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 1528 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 1529 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) { 1530 goto error; 1531 } 1532 1533 if ((rc = sysctl_createv(clog, 0, NULL, &node, 1534 CTLFLAG_PERMANENT, CTLTYPE_NODE, "nand", 1535 SYSCTL_DESCR("NAND driver controls"), 1536 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) { 1537 goto error; 1538 } 1539 1540 nand_root_num = node->sysctl_num; 1541 1542 if ((rc = sysctl_createv(clog, 0, NULL, &node, 1543 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 1544 CTLTYPE_INT, "cache_sync_timeout", 1545 SYSCTL_DESCR("NAND write cache sync timeout in seconds"), 1546 sysctl_nand_verify, 0, &nand_cachesync_timeout, 1547 0, CTL_HW, nand_root_num, CTL_CREATE, 1548 CTL_EOL)) != 0) { 1549 goto error; 1550 } 1551 1552 nand_cachesync_nodenum = node->sysctl_num; 1553 1554 return; 1555 1556 error: 1557 aprint_error("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 1558 } 1559 1560 MODULE(MODULE_CLASS_DRIVER, nand, "flash"); 1561 1562 #ifdef _MODULE 1563 #include "ioconf.c" 1564 #endif 1565 1566 static int 1567 nand_modcmd(modcmd_t cmd, void *opaque) 1568 { 1569 switch (cmd) { 1570 case MODULE_CMD_INIT: 1571 #ifdef _MODULE 1572 return config_init_component(cfdriver_ioconf_nand, 1573 cfattach_ioconf_nand, cfdata_ioconf_nand); 1574 #else 1575 return 0; 1576 #endif 1577 case MODULE_CMD_FINI: 1578 #ifdef _MODULE 1579 return config_fini_component(cfdriver_ioconf_nand, 1580 cfattach_ioconf_nand, cfdata_ioconf_nand); 1581 #else 1582 return 0; 1583 #endif 1584 default: 1585 return ENOTTY; 1586 } 1587 } 1588