xref: /netbsd-src/sys/dev/mii/rlphy.c (revision cac8e449158efc7261bebc8657cbb0125a2cfdde)
1 /*	$NetBSD: rlphy.c,v 1.22 2008/05/04 17:06:10 xtraeme Exp $	*/
2 /*	$OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $	*/
3 
4 /*
5  * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net)
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  * POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 /*
31  * Driver for the internal PHY found on RTL8139 based nics, based
32  * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
33  * (National Semiconductor DP83840).
34  */
35 
36 /*
37  * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org>
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.22 2008/05/04 17:06:10 xtraeme Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/device.h>
47 #include <sys/socket.h>
48 #include <sys/errno.h>
49 
50 #include <net/if.h>
51 #include <net/if_media.h>
52 
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include <dev/mii/miidevs.h>
56 #include <sys/bus.h>
57 #include <dev/ic/rtl81x9reg.h>
58 
59 struct rlphy_softc {
60 	struct mii_softc sc_mii;
61 	int sc_rtl8201l;
62 };
63 
64 int	rlphymatch(device_t, cfdata_t, void *);
65 void	rlphyattach(device_t, device_t, void *);
66 
67 CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc),
68     rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate);
69 
70 int	rlphy_service(struct mii_softc *, struct mii_data *, int);
71 void	rlphy_status(struct mii_softc *);
72 
73 static void rlphy_reset(struct mii_softc *);
74 
75 const struct mii_phy_funcs rlphy_funcs = {
76 	rlphy_service, rlphy_status, rlphy_reset,
77 };
78 
79 static const struct mii_phydesc rlphys[] = {
80 	{ MII_OUI_yyREALTEK,		MII_MODEL_yyREALTEK_RTL8201L,
81 	  MII_STR_yyREALTEK_RTL8201L },
82 	{ MII_OUI_ICPLUS,		MII_MODEL_ICPLUS_IP101,
83 	  MII_STR_ICPLUS_IP101 },
84 
85 	{ 0,				0,
86 	  NULL },
87 };
88 
89 int
90 rlphymatch(device_t parent, cfdata_t match, void *aux)
91 {
92 	struct mii_attach_args *ma = aux;
93 
94 	if (mii_phy_match(ma, rlphys) != NULL)
95 		return (10);
96 
97 	if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
98 	    MII_MODEL(ma->mii_id2) != 0)
99 		return 0;
100 
101 	if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re"))
102 		return 0;
103 
104 	/*
105 	 * A "real" phy should get preference, but on the 8139 there
106 	 * is no phyid register.
107 	 */
108 	return 5;
109 }
110 
111 void
112 rlphyattach(device_t parent, device_t self, void *aux)
113 {
114 	struct rlphy_softc *rsc = device_private(self);
115 	struct mii_softc *sc = &rsc->sc_mii;
116 	struct mii_attach_args *ma = aux;
117 	struct mii_data *mii = ma->mii_data;
118 
119 	aprint_naive("\n");
120 	if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) {
121 		rsc->sc_rtl8201l = 1;
122 		aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L,
123 		    MII_REV(ma->mii_id2));
124 	} else
125 		aprint_normal(": Realtek internal PHY\n");
126 
127 	sc->mii_dev = self;
128 	sc->mii_inst = mii->mii_instance;
129 	sc->mii_phy = ma->mii_phyno;
130 	sc->mii_funcs = &rlphy_funcs;
131 	sc->mii_pdata = mii;
132 	sc->mii_flags = ma->mii_flags;
133 
134 	sc->mii_flags |= MIIF_NOISOLATE;
135 
136 	PHY_RESET(sc);
137 
138 	aprint_normal_dev(self, "");
139 	sc->mii_capabilities =
140 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
141 	if (sc->mii_capabilities & BMSR_MEDIAMASK)
142 		mii_phy_add_media(sc);
143 	aprint_normal("\n");
144 
145 	if (!pmf_device_register(self, NULL, mii_phy_resume))
146 		aprint_error_dev(self, "couldn't establish power handler\n");
147 }
148 
149 int
150 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
151 {
152 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
153 
154 	int rv;
155 
156 	/*
157 	 * Can't isolate the RTL8139 phy, so it has to be the only one.
158 	 */
159 	if (IFM_INST(ife->ifm_media) != sc->mii_inst)
160 		panic("rlphy_service: attempt to isolate phy");
161 
162 	switch (cmd) {
163 	case MII_POLLSTAT:
164 		break;
165 
166 	case MII_MEDIACHG:
167 		/*
168 		 * If the interface is not up, don't do anything.
169 		 */
170 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
171 			break;
172 
173 		switch (IFM_SUBTYPE(ife->ifm_media)) {
174 		case IFM_AUTO:
175 			/*
176 			 * If we're already in auto mode, just return.
177 			 */
178 			if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
179 				return (0);
180 			(void) mii_phy_auto(sc, 0);
181 			break;
182 		case IFM_100_T4:
183 			/*
184 			 * XXX Not supported as a manual setting right now.
185 			 */
186 			return (EINVAL);
187 		default:
188 			/*
189 			 * BMCR data is stored in the ifmedia entry.
190 			 */
191 			switch (ife->ifm_media &
192 			    (IFM_TMASK|IFM_NMASK|IFM_FDX)) {
193 				case IFM_ETHER|IFM_10_T:
194 					rv = ANAR_10|ANAR_CSMA;
195 					break;
196 				case IFM_ETHER|IFM_10_T|IFM_FDX:
197 					rv = ANAR_10_FD|ANAR_CSMA;
198 					break;
199 				case IFM_ETHER|IFM_100_TX:
200 					rv = ANAR_TX|ANAR_CSMA;
201 					break;
202 				case IFM_ETHER|IFM_100_TX|IFM_FDX:
203 					rv = ANAR_TX_FD|ANAR_CSMA;
204 					break;
205 				case IFM_ETHER|IFM_100_T4:
206 					rv = ANAR_T4|ANAR_CSMA;
207 					break;
208 				default:
209 					rv = 0;
210 					break;
211 			}
212 
213 			PHY_WRITE(sc, MII_ANAR, rv);
214 			PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
215 		}
216 		break;
217 
218 	case MII_TICK:
219 		/*
220 		 * Is the interface even up?
221 		 */
222 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
223 			return (0);
224 
225 		/*
226 		 * Only used for autonegotiation.
227 		 */
228 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
229 			break;
230 
231 		/*
232 		 * The RealTek PHY's autonegotiation doesn't need to be
233 		 * kicked; it continues in the background.
234 		 */
235 		break;
236 
237 	case MII_DOWN:
238 		mii_phy_down(sc);
239 		return (0);
240 	}
241 
242 	/* Update the media status. */
243 	mii_phy_status(sc);
244 
245 	/* Callback if something changed. */
246 	mii_phy_update(sc, cmd);
247 	return (0);
248 }
249 
250 void
251 rlphy_status(struct mii_softc *sc)
252 {
253 	struct rlphy_softc *rsc = (void *)sc;
254 	struct mii_data *mii = sc->mii_pdata;
255 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
256 	int bmsr, bmcr, anlpar;
257 
258 	mii->mii_media_status = IFM_AVALID;
259 	mii->mii_media_active = IFM_ETHER;
260 
261 	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
262 	if (bmsr & BMSR_LINK)
263 		mii->mii_media_status |= IFM_ACTIVE;
264 
265 	bmcr = PHY_READ(sc, MII_BMCR);
266 	if (bmcr & BMCR_ISO) {
267 		mii->mii_media_active |= IFM_NONE;
268 		mii->mii_media_status = 0;
269 		return;
270 	}
271 
272 	if (bmcr & BMCR_LOOP)
273 		mii->mii_media_active |= IFM_LOOP;
274 
275 	if (bmcr & BMCR_AUTOEN) {
276 		/*
277 		 * NWay autonegotiation takes the highest-order common
278 		 * bit of the ANAR and ANLPAR (i.e. best media advertised
279 		 * both by us and our link partner).
280 		 */
281 		if ((bmsr & BMSR_ACOMP) == 0) {
282 			/* Erg, still trying, I guess... */
283 			mii->mii_media_active |= IFM_NONE;
284 			return;
285 		}
286 
287 		if ((anlpar = PHY_READ(sc, MII_ANAR) &
288 		    PHY_READ(sc, MII_ANLPAR))) {
289 			if (anlpar & ANLPAR_T4)
290 				mii->mii_media_active |= IFM_100_T4;
291 			else if (anlpar & ANLPAR_TX_FD)
292 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
293 			else if (anlpar & ANLPAR_TX)
294 				mii->mii_media_active |= IFM_100_TX;
295 			else if (anlpar & ANLPAR_10_FD)
296 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
297 			else if (anlpar & ANLPAR_10)
298 				mii->mii_media_active |= IFM_10_T;
299 			else
300 				mii->mii_media_active |= IFM_NONE;
301 			return;
302 		}
303 
304 		/*
305 		 * If the other side doesn't support NWAY, then the
306 		 * best we can do is determine if we have a 10Mbps or
307 		 * 100Mbps link. There's no way to know if the link
308 		 * is full or half duplex, so we default to half duplex
309 		 * and hope that the user is clever enough to manually
310 		 * change the media settings if we're wrong.
311 		 */
312 
313 		/*
314 		 * The RealTek PHY supports non-NWAY link speed
315 		 * detection, however it does not report the link
316 		 * detection results via the ANLPAR or BMSR registers.
317 		 * (What? RealTek doesn't do things the way everyone
318 		 * else does? I'm just shocked, shocked I tell you.)
319 		 * To determine the link speed, we have to do one
320 		 * of two things:
321 		 *
322 		 * - If this is a standalone RealTek RTL8201(L) PHY,
323 		 *   we can determine the link speed by testing bit 0
324 		 *   in the magic, vendor-specific register at offset
325 		 *   0x19.
326 		 *
327 		 * - If this is a RealTek MAC with integrated PHY, we
328 		 *   can test the 'SPEED10' bit of the MAC's media status
329 		 *   register.
330 		 */
331 		if (rsc->sc_rtl8201l) {
332 			if (PHY_READ(sc, 0x0019) & 0x01)
333 				mii->mii_media_active |= IFM_100_TX;
334 			else
335 				mii->mii_media_active |= IFM_10_T;
336 		} else {
337 			if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10)
338 				mii->mii_media_active |= IFM_10_T;
339 			else
340 				mii->mii_media_active |= IFM_100_TX;
341 		}
342 
343 	} else
344 		mii->mii_media_active = ife->ifm_media;
345 }
346 
347 static void
348 rlphy_reset(struct mii_softc *sc)
349 {
350 
351 	mii_phy_reset(sc);
352 
353 	/*
354 	 * XXX RealTek PHY doesn't set the BMCR properly after
355 	 * XXX reset, which breaks autonegotiation.
356 	 */
357 	PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
358 }
359