1 /* $NetBSD: rlphy.c,v 1.25 2009/02/16 08:00:42 cegger Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.25 2009/02/16 08:00:42 cegger Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <sys/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 struct rlphy_softc { 60 struct mii_softc sc_mii; 61 int sc_rtl8201l; 62 }; 63 64 int rlphymatch(device_t, cfdata_t, void *); 65 void rlphyattach(device_t, device_t, void *); 66 67 CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc), 68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 69 70 int rlphy_service(struct mii_softc *, struct mii_data *, int); 71 void rlphy_status(struct mii_softc *); 72 73 static void rlphy_reset(struct mii_softc *); 74 75 const struct mii_phy_funcs rlphy_funcs = { 76 rlphy_service, rlphy_status, rlphy_reset, 77 }; 78 79 static const struct mii_phydesc rlphys[] = { 80 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, 81 MII_STR_yyREALTEK_RTL8201L }, 82 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, 83 MII_STR_ICPLUS_IP101 }, 84 85 { 0, 0, 86 NULL }, 87 }; 88 89 int 90 rlphymatch(device_t parent, cfdata_t match, void *aux) 91 { 92 struct mii_attach_args *ma = aux; 93 94 if (mii_phy_match(ma, rlphys) != NULL) 95 return (10); 96 97 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 98 MII_MODEL(ma->mii_id2) != 0) 99 return 0; 100 101 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re")) 102 return 0; 103 104 /* 105 * A "real" phy should get preference, but on the 8139 there 106 * is no phyid register. 107 */ 108 return 5; 109 } 110 111 void 112 rlphyattach(device_t parent, device_t self, void *aux) 113 { 114 struct rlphy_softc *rsc = device_private(self); 115 struct mii_softc *sc = &rsc->sc_mii; 116 struct mii_attach_args *ma = aux; 117 struct mii_data *mii = ma->mii_data; 118 119 aprint_naive("\n"); 120 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 121 rsc->sc_rtl8201l = 1; 122 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 123 MII_REV(ma->mii_id2)); 124 } else 125 aprint_normal(": Realtek internal PHY\n"); 126 127 sc->mii_dev = self; 128 sc->mii_inst = mii->mii_instance; 129 sc->mii_phy = ma->mii_phyno; 130 sc->mii_funcs = &rlphy_funcs; 131 sc->mii_pdata = mii; 132 sc->mii_flags = ma->mii_flags; 133 134 sc->mii_flags |= MIIF_NOISOLATE; 135 136 PHY_RESET(sc); 137 138 aprint_normal_dev(self, ""); 139 sc->mii_capabilities = 140 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 141 if (sc->mii_capabilities & BMSR_MEDIAMASK) 142 mii_phy_add_media(sc); 143 aprint_normal("\n"); 144 } 145 146 int 147 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 148 { 149 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 150 151 /* 152 * Can't isolate the RTL8139 phy, so it has to be the only one. 153 */ 154 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 155 panic("rlphy_service: attempt to isolate phy"); 156 157 switch (cmd) { 158 case MII_POLLSTAT: 159 break; 160 161 case MII_MEDIACHG: 162 /* 163 * If the interface is not up, don't do anything. 164 */ 165 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 166 break; 167 168 switch (IFM_SUBTYPE(ife->ifm_media)) { 169 case IFM_AUTO: 170 /* 171 * If we're already in auto mode, just return. 172 */ 173 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 174 return (0); 175 (void) mii_phy_auto(sc, 0); 176 break; 177 case IFM_100_T4: 178 /* 179 * XXX Not supported as a manual setting right now. 180 */ 181 return (EINVAL); 182 default: 183 /* 184 * BMCR data is stored in the ifmedia entry. 185 */ 186 PHY_WRITE(sc, MII_ANAR, mii_anar(ife->ifm_media)); 187 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 188 } 189 break; 190 191 case MII_TICK: 192 /* 193 * Is the interface even up? 194 */ 195 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 196 return (0); 197 198 /* 199 * Only used for autonegotiation. 200 */ 201 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 202 break; 203 204 /* 205 * The RealTek PHY's autonegotiation doesn't need to be 206 * kicked; it continues in the background. 207 */ 208 break; 209 210 case MII_DOWN: 211 mii_phy_down(sc); 212 return (0); 213 } 214 215 /* Update the media status. */ 216 mii_phy_status(sc); 217 218 /* Callback if something changed. */ 219 mii_phy_update(sc, cmd); 220 return (0); 221 } 222 223 void 224 rlphy_status(struct mii_softc *sc) 225 { 226 struct rlphy_softc *rsc = (void *)sc; 227 struct mii_data *mii = sc->mii_pdata; 228 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 229 int bmsr, bmcr, anlpar; 230 231 mii->mii_media_status = IFM_AVALID; 232 mii->mii_media_active = IFM_ETHER; 233 234 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 235 if (bmsr & BMSR_LINK) 236 mii->mii_media_status |= IFM_ACTIVE; 237 238 bmcr = PHY_READ(sc, MII_BMCR); 239 if (bmcr & BMCR_ISO) { 240 mii->mii_media_active |= IFM_NONE; 241 mii->mii_media_status = 0; 242 return; 243 } 244 245 if (bmcr & BMCR_LOOP) 246 mii->mii_media_active |= IFM_LOOP; 247 248 if (bmcr & BMCR_AUTOEN) { 249 /* 250 * NWay autonegotiation takes the highest-order common 251 * bit of the ANAR and ANLPAR (i.e. best media advertised 252 * both by us and our link partner). 253 */ 254 if ((bmsr & BMSR_ACOMP) == 0) { 255 /* Erg, still trying, I guess... */ 256 mii->mii_media_active |= IFM_NONE; 257 return; 258 } 259 260 if ((anlpar = PHY_READ(sc, MII_ANAR) & 261 PHY_READ(sc, MII_ANLPAR))) { 262 if (anlpar & ANLPAR_TX_FD) 263 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 264 else if (anlpar & ANLPAR_T4) 265 mii->mii_media_active |= IFM_100_T4; 266 else if (anlpar & ANLPAR_TX) 267 mii->mii_media_active |= IFM_100_TX; 268 else if (anlpar & ANLPAR_10_FD) 269 mii->mii_media_active |= IFM_10_T|IFM_FDX; 270 else if (anlpar & ANLPAR_10) 271 mii->mii_media_active |= IFM_10_T; 272 else 273 mii->mii_media_active |= IFM_NONE; 274 return; 275 } 276 277 /* 278 * If the other side doesn't support NWAY, then the 279 * best we can do is determine if we have a 10Mbps or 280 * 100Mbps link. There's no way to know if the link 281 * is full or half duplex, so we default to half duplex 282 * and hope that the user is clever enough to manually 283 * change the media settings if we're wrong. 284 */ 285 286 /* 287 * The RealTek PHY supports non-NWAY link speed 288 * detection, however it does not report the link 289 * detection results via the ANLPAR or BMSR registers. 290 * (What? RealTek doesn't do things the way everyone 291 * else does? I'm just shocked, shocked I tell you.) 292 * To determine the link speed, we have to do one 293 * of two things: 294 * 295 * - If this is a standalone RealTek RTL8201(L) PHY, 296 * we can determine the link speed by testing bit 0 297 * in the magic, vendor-specific register at offset 298 * 0x19. 299 * 300 * - If this is a RealTek MAC with integrated PHY, we 301 * can test the 'SPEED10' bit of the MAC's media status 302 * register. 303 */ 304 if (rsc->sc_rtl8201l) { 305 if (PHY_READ(sc, 0x0019) & 0x01) 306 mii->mii_media_active |= IFM_100_TX; 307 else 308 mii->mii_media_active |= IFM_10_T; 309 } else { 310 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10) 311 mii->mii_media_active |= IFM_10_T; 312 else 313 mii->mii_media_active |= IFM_100_TX; 314 } 315 316 } else 317 mii->mii_media_active = ife->ifm_media; 318 } 319 320 static void 321 rlphy_reset(struct mii_softc *sc) 322 { 323 324 mii_phy_reset(sc); 325 326 /* 327 * XXX RealTek PHY doesn't set the BMCR properly after 328 * XXX reset, which breaks autonegotiation. 329 */ 330 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN); 331 } 332