1 /* $NetBSD: rlphy.c,v 1.1 2006/01/04 21:52:17 xtraeme Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.1 2006/01/04 21:52:17 xtraeme Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <machine/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 int rlphymatch(struct device *, struct cfdata *, void *); 60 void rlphyattach(struct device *, struct device *, void *); 61 62 CFATTACH_DECL(rlphy, sizeof(struct mii_softc), 63 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 64 65 int rlphy_service(struct mii_softc *, struct mii_data *, int); 66 void rlphy_status(struct mii_softc *); 67 68 const struct mii_phy_funcs rlphy_funcs = { 69 rlphy_service, rlphy_status, mii_phy_reset, 70 }; 71 72 int 73 rlphymatch(struct device *parent, struct cfdata *match, void *aux) 74 { 75 struct mii_attach_args *ma = aux; 76 77 /* Test for RealTek 8201L PHY */ 78 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_REALTEK && 79 MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 80 return 10; 81 } 82 83 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 84 MII_MODEL(ma->mii_id2) != 0) 85 return 0; 86 87 if (strcmp(parent->dv_cfdata->cf_name, "rtk") != 0) 88 return 0; 89 90 /* 91 * A "real" phy should get preference, but on the 8139 there 92 * is no phyid register. 93 */ 94 return 5; 95 } 96 97 void 98 rlphyattach(struct device *parent, struct device *self, void *aux) 99 { 100 struct mii_softc *sc = (struct mii_softc *)self; 101 struct mii_attach_args *ma = aux; 102 struct mii_data *mii = ma->mii_data; 103 104 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 105 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 106 MII_REV(ma->mii_id2)); 107 } else 108 aprint_normal(": Realtek internal PHY\n"); 109 110 sc->mii_inst = mii->mii_instance; 111 sc->mii_phy = ma->mii_phyno; 112 sc->mii_funcs = &rlphy_funcs; 113 sc->mii_pdata = mii; 114 sc->mii_flags = ma->mii_flags; 115 116 sc->mii_flags |= MIIF_NOISOLATE; 117 118 PHY_RESET(sc); 119 120 aprint_normal("%s: ", sc->mii_dev.dv_xname); 121 sc->mii_capabilities = 122 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 123 if (sc->mii_capabilities & BMSR_MEDIAMASK) 124 mii_phy_add_media(sc); 125 aprint_normal("\n"); 126 } 127 128 int 129 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 130 { 131 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 132 133 int rv; 134 135 if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0) 136 return ENXIO; 137 138 /* 139 * Can't isolate the RTL8139 phy, so it has to be the only one. 140 */ 141 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 142 panic("rlphy_service: attempt to isolate phy"); 143 144 switch (cmd) { 145 case MII_POLLSTAT: 146 break; 147 148 case MII_MEDIACHG: 149 /* 150 * If the interface is not up, don't do anything. 151 */ 152 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 153 break; 154 155 switch (IFM_SUBTYPE(ife->ifm_media)) { 156 case IFM_AUTO: 157 /* 158 * If we're already in auto mode, just return. 159 */ 160 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 161 return (0); 162 (void) mii_phy_auto(sc, 0); 163 break; 164 case IFM_100_T4: 165 /* 166 * XXX Not supported as a manual setting right now. 167 */ 168 return (EINVAL); 169 default: 170 /* 171 * BMCR data is stored in the ifmedia entry. 172 */ 173 switch (ife->ifm_media & 174 (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 175 case IFM_ETHER|IFM_10_T: 176 rv = ANAR_10|ANAR_CSMA; 177 break; 178 case IFM_ETHER|IFM_10_T|IFM_FDX: 179 rv = ANAR_10_FD|ANAR_CSMA; 180 break; 181 case IFM_ETHER|IFM_100_TX: 182 rv = ANAR_TX|ANAR_CSMA; 183 break; 184 case IFM_ETHER|IFM_100_TX|IFM_FDX: 185 rv = ANAR_TX_FD|ANAR_CSMA; 186 break; 187 case IFM_ETHER|IFM_100_T4: 188 rv = ANAR_T4|ANAR_CSMA; 189 break; 190 default: 191 rv = 0; 192 break; 193 } 194 195 PHY_WRITE(sc, MII_ANAR, rv); 196 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 197 } 198 break; 199 200 case MII_TICK: 201 /* 202 * Is the interface even up? 203 */ 204 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 205 return (0); 206 207 /* 208 * Only used for autonegotiation. 209 */ 210 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 211 break; 212 213 /* 214 * The RealTek PHY's autonegotiation doesn't need to be 215 * kicked; it continues in the background. 216 */ 217 break; 218 219 case MII_DOWN: 220 mii_phy_down(sc); 221 return (0); 222 } 223 224 /* Update the media status. */ 225 mii_phy_status(sc); 226 227 /* Callback if something changed. */ 228 mii_phy_update(sc, cmd); 229 return (0); 230 } 231 232 void 233 rlphy_status(struct mii_softc *sc) 234 { 235 struct mii_data *mii = sc->mii_pdata; 236 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 237 int bmsr, bmcr, anlpar; 238 239 mii->mii_media_status = IFM_AVALID; 240 mii->mii_media_active = IFM_ETHER; 241 242 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 243 if (bmsr & BMSR_LINK) 244 mii->mii_media_status |= IFM_ACTIVE; 245 246 bmcr = PHY_READ(sc, MII_BMCR); 247 if (bmcr & BMCR_ISO) { 248 mii->mii_media_active |= IFM_NONE; 249 mii->mii_media_status = 0; 250 return; 251 } 252 253 if (bmcr & BMCR_LOOP) 254 mii->mii_media_active |= IFM_LOOP; 255 256 if (bmcr & BMCR_AUTOEN) { 257 /* 258 * NWay autonegotiation takes the highest-order common 259 * bit of the ANAR and ANLPAR (i.e. best media advertised 260 * both by us and our link partner). 261 */ 262 if ((bmsr & BMSR_ACOMP) == 0) { 263 /* Erg, still trying, I guess... */ 264 mii->mii_media_active |= IFM_NONE; 265 return; 266 } 267 268 if ((anlpar = PHY_READ(sc, MII_ANAR) & 269 PHY_READ(sc, MII_ANLPAR))) { 270 if (anlpar & ANLPAR_T4) 271 mii->mii_media_active |= IFM_100_T4; 272 else if (anlpar & ANLPAR_TX_FD) 273 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 274 else if (anlpar & ANLPAR_TX) 275 mii->mii_media_active |= IFM_100_TX; 276 else if (anlpar & ANLPAR_10_FD) 277 mii->mii_media_active |= IFM_10_T|IFM_FDX; 278 else if (anlpar & ANLPAR_10) 279 mii->mii_media_active |= IFM_10_T; 280 else 281 mii->mii_media_active |= IFM_NONE; 282 return; 283 } 284 285 /* 286 * If the other side doesn't support NWAY, then the 287 * best we can do is determine if we have a 10Mbps or 288 * 100Mbps link. There's no way to know if the link 289 * is full or half duplex, so we default to half duplex 290 * and hope that the user is clever enough to manually 291 * change the media settings if we're wrong. 292 */ 293 294 /* 295 * The RealTek PHY supports non-NWAY link speed 296 * detection, however it does not report the link 297 * detection results via the ANLPAR or BMSR registers. 298 * (What? RealTek doesn't do things the way everyone 299 * else does? I'm just shocked, shocked I tell you.) 300 * To determine the link speed, we have to do one 301 * of two things: 302 * 303 * - If this is a standalone RealTek RTL8201(L) PHY, 304 * we can determine the link speed by testing bit 0 305 * in the magic, vendor-specific register at offset 306 * 0x19. 307 * 308 * - If this is a RealTek MAC with integrated PHY, we 309 * can test the 'SPEED10' bit of the MAC's media status 310 * register. 311 */ 312 if (strcmp("rtk", 313 sc->mii_dev.dv_parent->dv_cfdata->cf_name) 314 == 0) { 315 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10) 316 mii->mii_media_active |= IFM_10_T; 317 else 318 mii->mii_media_active |= IFM_100_TX; 319 } else { 320 if (PHY_READ(sc, 0x0019) & 0x01) 321 mii->mii_media_active |= IFM_100_TX; 322 else 323 mii->mii_media_active |= IFM_10_T; 324 } 325 326 } else 327 mii->mii_media_active = ife->ifm_media; 328 } 329