1 /* $NetBSD: rlphy.c,v 1.19 2007/12/09 20:28:04 jmcneill Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.19 2007/12/09 20:28:04 jmcneill Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <sys/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 struct rlphy_softc { 60 struct mii_softc sc_mii; 61 int sc_rtl8201l; 62 }; 63 64 int rlphymatch(struct device *, struct cfdata *, void *); 65 void rlphyattach(struct device *, struct device *, void *); 66 67 CFATTACH_DECL(rlphy, sizeof(struct rlphy_softc), 68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 69 70 int rlphy_service(struct mii_softc *, struct mii_data *, int); 71 void rlphy_status(struct mii_softc *); 72 73 static void rlphy_reset(struct mii_softc *); 74 75 const struct mii_phy_funcs rlphy_funcs = { 76 rlphy_service, rlphy_status, rlphy_reset, 77 }; 78 79 static const struct mii_phydesc rlphys[] = { 80 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, 81 MII_STR_yyREALTEK_RTL8201L }, 82 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, 83 MII_STR_ICPLUS_IP101 }, 84 85 { 0, 0, 86 NULL }, 87 }; 88 89 int 90 rlphymatch(struct device *parent, struct cfdata *match, void *aux) 91 { 92 struct mii_attach_args *ma = aux; 93 94 if (mii_phy_match(ma, rlphys) != NULL) 95 return (10); 96 97 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 98 MII_MODEL(ma->mii_id2) != 0) 99 return 0; 100 101 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re")) 102 return 0; 103 104 /* 105 * A "real" phy should get preference, but on the 8139 there 106 * is no phyid register. 107 */ 108 return 5; 109 } 110 111 void 112 rlphyattach(struct device *parent, struct device *self, void *aux) 113 { 114 struct rlphy_softc *rsc = device_private(self); 115 struct mii_softc *sc = &rsc->sc_mii; 116 struct mii_attach_args *ma = aux; 117 struct mii_data *mii = ma->mii_data; 118 119 aprint_naive("\n"); 120 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 121 rsc->sc_rtl8201l = 1; 122 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 123 MII_REV(ma->mii_id2)); 124 } else 125 aprint_normal(": Realtek internal PHY\n"); 126 127 sc->mii_inst = mii->mii_instance; 128 sc->mii_phy = ma->mii_phyno; 129 sc->mii_funcs = &rlphy_funcs; 130 sc->mii_pdata = mii; 131 sc->mii_flags = ma->mii_flags; 132 133 sc->mii_flags |= MIIF_NOISOLATE; 134 135 PHY_RESET(sc); 136 137 aprint_normal("%s: ", sc->mii_dev.dv_xname); 138 sc->mii_capabilities = 139 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 140 if (sc->mii_capabilities & BMSR_MEDIAMASK) 141 mii_phy_add_media(sc); 142 aprint_normal("\n"); 143 144 if (!pmf_device_register(self, NULL, mii_phy_resume)) 145 aprint_error_dev(self, "couldn't establish power handler\n"); 146 } 147 148 int 149 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 150 { 151 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 152 153 int rv; 154 155 if (!device_is_active(&sc->mii_dev)) 156 return ENXIO; 157 158 /* 159 * Can't isolate the RTL8139 phy, so it has to be the only one. 160 */ 161 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 162 panic("rlphy_service: attempt to isolate phy"); 163 164 switch (cmd) { 165 case MII_POLLSTAT: 166 break; 167 168 case MII_MEDIACHG: 169 /* 170 * If the interface is not up, don't do anything. 171 */ 172 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 173 break; 174 175 switch (IFM_SUBTYPE(ife->ifm_media)) { 176 case IFM_AUTO: 177 /* 178 * If we're already in auto mode, just return. 179 */ 180 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 181 return (0); 182 (void) mii_phy_auto(sc, 0); 183 break; 184 case IFM_100_T4: 185 /* 186 * XXX Not supported as a manual setting right now. 187 */ 188 return (EINVAL); 189 default: 190 /* 191 * BMCR data is stored in the ifmedia entry. 192 */ 193 switch (ife->ifm_media & 194 (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 195 case IFM_ETHER|IFM_10_T: 196 rv = ANAR_10|ANAR_CSMA; 197 break; 198 case IFM_ETHER|IFM_10_T|IFM_FDX: 199 rv = ANAR_10_FD|ANAR_CSMA; 200 break; 201 case IFM_ETHER|IFM_100_TX: 202 rv = ANAR_TX|ANAR_CSMA; 203 break; 204 case IFM_ETHER|IFM_100_TX|IFM_FDX: 205 rv = ANAR_TX_FD|ANAR_CSMA; 206 break; 207 case IFM_ETHER|IFM_100_T4: 208 rv = ANAR_T4|ANAR_CSMA; 209 break; 210 default: 211 rv = 0; 212 break; 213 } 214 215 PHY_WRITE(sc, MII_ANAR, rv); 216 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 217 } 218 break; 219 220 case MII_TICK: 221 /* 222 * Is the interface even up? 223 */ 224 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 225 return (0); 226 227 /* 228 * Only used for autonegotiation. 229 */ 230 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 231 break; 232 233 /* 234 * The RealTek PHY's autonegotiation doesn't need to be 235 * kicked; it continues in the background. 236 */ 237 break; 238 239 case MII_DOWN: 240 mii_phy_down(sc); 241 return (0); 242 } 243 244 /* Update the media status. */ 245 mii_phy_status(sc); 246 247 /* Callback if something changed. */ 248 mii_phy_update(sc, cmd); 249 return (0); 250 } 251 252 void 253 rlphy_status(struct mii_softc *sc) 254 { 255 struct rlphy_softc *rsc = (void *)sc; 256 struct mii_data *mii = sc->mii_pdata; 257 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 258 int bmsr, bmcr, anlpar; 259 260 mii->mii_media_status = IFM_AVALID; 261 mii->mii_media_active = IFM_ETHER; 262 263 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 264 if (bmsr & BMSR_LINK) 265 mii->mii_media_status |= IFM_ACTIVE; 266 267 bmcr = PHY_READ(sc, MII_BMCR); 268 if (bmcr & BMCR_ISO) { 269 mii->mii_media_active |= IFM_NONE; 270 mii->mii_media_status = 0; 271 return; 272 } 273 274 if (bmcr & BMCR_LOOP) 275 mii->mii_media_active |= IFM_LOOP; 276 277 if (bmcr & BMCR_AUTOEN) { 278 /* 279 * NWay autonegotiation takes the highest-order common 280 * bit of the ANAR and ANLPAR (i.e. best media advertised 281 * both by us and our link partner). 282 */ 283 if ((bmsr & BMSR_ACOMP) == 0) { 284 /* Erg, still trying, I guess... */ 285 mii->mii_media_active |= IFM_NONE; 286 return; 287 } 288 289 if ((anlpar = PHY_READ(sc, MII_ANAR) & 290 PHY_READ(sc, MII_ANLPAR))) { 291 if (anlpar & ANLPAR_T4) 292 mii->mii_media_active |= IFM_100_T4; 293 else if (anlpar & ANLPAR_TX_FD) 294 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 295 else if (anlpar & ANLPAR_TX) 296 mii->mii_media_active |= IFM_100_TX; 297 else if (anlpar & ANLPAR_10_FD) 298 mii->mii_media_active |= IFM_10_T|IFM_FDX; 299 else if (anlpar & ANLPAR_10) 300 mii->mii_media_active |= IFM_10_T; 301 else 302 mii->mii_media_active |= IFM_NONE; 303 return; 304 } 305 306 /* 307 * If the other side doesn't support NWAY, then the 308 * best we can do is determine if we have a 10Mbps or 309 * 100Mbps link. There's no way to know if the link 310 * is full or half duplex, so we default to half duplex 311 * and hope that the user is clever enough to manually 312 * change the media settings if we're wrong. 313 */ 314 315 /* 316 * The RealTek PHY supports non-NWAY link speed 317 * detection, however it does not report the link 318 * detection results via the ANLPAR or BMSR registers. 319 * (What? RealTek doesn't do things the way everyone 320 * else does? I'm just shocked, shocked I tell you.) 321 * To determine the link speed, we have to do one 322 * of two things: 323 * 324 * - If this is a standalone RealTek RTL8201(L) PHY, 325 * we can determine the link speed by testing bit 0 326 * in the magic, vendor-specific register at offset 327 * 0x19. 328 * 329 * - If this is a RealTek MAC with integrated PHY, we 330 * can test the 'SPEED10' bit of the MAC's media status 331 * register. 332 */ 333 if (rsc->sc_rtl8201l) { 334 if (PHY_READ(sc, 0x0019) & 0x01) 335 mii->mii_media_active |= IFM_100_TX; 336 else 337 mii->mii_media_active |= IFM_10_T; 338 } else { 339 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10) 340 mii->mii_media_active |= IFM_10_T; 341 else 342 mii->mii_media_active |= IFM_100_TX; 343 } 344 345 } else 346 mii->mii_media_active = ife->ifm_media; 347 } 348 349 static void 350 rlphy_reset(struct mii_softc *sc) 351 { 352 353 mii_phy_reset(sc); 354 355 /* 356 * XXX RealTek PHY doesn't set the BMCR properly after 357 * XXX reset, which breaks autonegotiation. 358 */ 359 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN); 360 } 361