1 /* $NetBSD: rlphy.c,v 1.38 2019/11/27 10:19:21 msaitoh Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.38 2019/11/27 10:19:21 msaitoh Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <sys/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 struct rlphy_softc { 60 struct mii_softc sc_mii; 61 int sc_rtl8201; 62 }; 63 64 static int rlphymatch(device_t, cfdata_t, void *); 65 static void rlphyattach(device_t, device_t, void *); 66 67 CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc), 68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 69 70 static int rlphy_service(struct mii_softc *, struct mii_data *, int); 71 static void rlphy_status(struct mii_softc *); 72 static void rlphy_reset(struct mii_softc *); 73 74 const struct mii_phy_funcs rlphy_funcs = { 75 rlphy_service, rlphy_status, rlphy_reset, 76 }; 77 78 static const struct mii_phydesc rlphys[] = { 79 MII_PHY_DESC(yyREALTEK, RTL8201L), 80 MII_PHY_DESC(REALTEK, RTL8201E), 81 MII_PHY_DESC(xxICPLUS, IP101), 82 MII_PHY_END, 83 }; 84 85 static int 86 rlphymatch(device_t parent, cfdata_t match, void *aux) 87 { 88 struct mii_attach_args *ma = aux; 89 struct mii_data *mii = ma->mii_data; 90 91 if (mii->mii_instance != 0) 92 return 0; 93 94 if (mii_phy_match(ma, rlphys) != NULL) 95 return 10; 96 97 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 98 MII_MODEL(ma->mii_id2) != 0) 99 return 0; 100 101 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re")) 102 return 0; 103 104 /* 105 * A "real" phy should get preference, but on the 8139 there 106 * is no phyid register. 107 */ 108 return 5; 109 } 110 111 static void 112 rlphyattach(device_t parent, device_t self, void *aux) 113 { 114 struct rlphy_softc *rsc = device_private(self); 115 struct mii_softc *sc = &rsc->sc_mii; 116 struct mii_attach_args *ma = aux; 117 struct mii_data *mii = ma->mii_data; 118 119 aprint_naive("\n"); 120 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 121 rsc->sc_rtl8201 = 1; 122 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 123 MII_REV(ma->mii_id2)); 124 } else if (MII_MODEL(ma->mii_id2) == MII_MODEL_REALTEK_RTL8201E) { 125 rsc->sc_rtl8201 = 1; 126 aprint_normal(": %s, rev. %d\n", MII_STR_REALTEK_RTL8201E, 127 MII_REV(ma->mii_id2)); 128 } else if (MII_MODEL(ma->mii_id2) == MII_MODEL_xxICPLUS_IP101) { 129 aprint_normal(": %s, rev. %d\n", MII_STR_xxICPLUS_IP101, 130 MII_REV(ma->mii_id2)); 131 } else 132 aprint_normal(": Realtek internal PHY\n"); 133 134 sc->mii_dev = self; 135 sc->mii_inst = mii->mii_instance; 136 sc->mii_phy = ma->mii_phyno; 137 sc->mii_funcs = &rlphy_funcs; 138 sc->mii_pdata = mii; 139 sc->mii_flags = ma->mii_flags; 140 141 sc->mii_flags |= MIIF_NOISOLATE; 142 143 PHY_RESET(sc); 144 145 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 146 sc->mii_capabilities &= ma->mii_capmask; 147 148 mii_phy_add_media(sc); 149 } 150 151 static int 152 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 153 { 154 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 155 156 /* Can't isolate the RTL8139 phy, so it has to be the only one. */ 157 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 158 panic("rlphy_service: attempt to isolate phy"); 159 160 switch (cmd) { 161 case MII_POLLSTAT: 162 break; 163 164 case MII_MEDIACHG: 165 /* If the interface is not up, don't do anything. */ 166 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 167 break; 168 169 mii_phy_setmedia(sc); 170 break; 171 172 case MII_TICK: 173 /* Is the interface even up? */ 174 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 175 return 0; 176 177 /* Only used for autonegotiation. */ 178 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 179 break; 180 181 /* 182 * The RealTek PHY's autonegotiation doesn't need to be 183 * kicked; it continues in the background. 184 */ 185 break; 186 187 case MII_DOWN: 188 mii_phy_down(sc); 189 return 0; 190 } 191 192 /* Update the media status. */ 193 mii_phy_status(sc); 194 195 /* Callback if something changed. */ 196 mii_phy_update(sc, cmd); 197 return 0; 198 } 199 200 static void 201 rlphy_status(struct mii_softc *sc) 202 { 203 struct rlphy_softc *rsc = (void *)sc; 204 struct mii_data *mii = sc->mii_pdata; 205 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 206 uint16_t bmsr, bmcr, anar, anlpar, result, reg; 207 208 mii->mii_media_status = IFM_AVALID; 209 mii->mii_media_active = IFM_ETHER; 210 211 PHY_READ(sc, MII_BMSR, &bmsr); 212 PHY_READ(sc, MII_BMSR, &bmsr); 213 if (bmsr & BMSR_LINK) 214 mii->mii_media_status |= IFM_ACTIVE; 215 216 PHY_READ(sc, MII_BMCR, &bmcr); 217 if (bmcr & BMCR_ISO) { 218 mii->mii_media_active |= IFM_NONE; 219 mii->mii_media_status = 0; 220 return; 221 } 222 223 if (bmcr & BMCR_LOOP) 224 mii->mii_media_active |= IFM_LOOP; 225 226 if (bmcr & BMCR_AUTOEN) { 227 /* 228 * NWay autonegotiation takes the highest-order common 229 * bit of the ANAR and ANLPAR (i.e. best media advertised 230 * both by us and our link partner). 231 */ 232 if ((bmsr & BMSR_ACOMP) == 0) { 233 /* Erg, still trying, I guess... */ 234 mii->mii_media_active |= IFM_NONE; 235 return; 236 } 237 238 PHY_READ(sc, MII_ANAR, &anar); 239 PHY_READ(sc, MII_ANLPAR, &anlpar); 240 result = anar & anlpar; 241 if (result != 0) { 242 if (result & ANLPAR_TX_FD) 243 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 244 else if (result & ANLPAR_T4) 245 mii->mii_media_active |= IFM_100_T4 | IFM_HDX; 246 else if (result & ANLPAR_TX) 247 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 248 else if (result & ANLPAR_10_FD) 249 mii->mii_media_active |= IFM_10_T | IFM_FDX; 250 else if (result & ANLPAR_10) 251 mii->mii_media_active |= IFM_10_T | IFM_HDX; 252 else 253 mii->mii_media_active |= IFM_NONE; 254 return; 255 } 256 257 /* 258 * If the other side doesn't support NWAY, then the 259 * best we can do is determine if we have a 10Mbps or 260 * 100Mbps link. There's no way to know if the link 261 * is full or half duplex, so we default to half duplex 262 * and hope that the user is clever enough to manually 263 * change the media settings if we're wrong. 264 */ 265 266 /* 267 * The RealTek PHY supports non-NWAY link speed 268 * detection, however it does not report the link 269 * detection results via the ANLPAR or BMSR registers. 270 * (What? RealTek doesn't do things the way everyone 271 * else does? I'm just shocked, shocked I tell you.) 272 * To determine the link speed, we have to do one 273 * of two things: 274 * 275 * - If this is a standalone RealTek RTL8201 PHY, 276 * we can determine the link speed by testing bit 0 277 * in the magic, vendor-specific register at offset 278 * 0x19. 279 * 280 * - If this is a RealTek MAC with integrated PHY, we 281 * can test the 'SPEED10' bit of the MAC's media status 282 * register. 283 */ 284 if (rsc->sc_rtl8201) { 285 PHY_READ(sc, 0x0019, ®); 286 if (reg & 0x01) 287 mii->mii_media_active |= IFM_100_TX; 288 else 289 mii->mii_media_active |= IFM_10_T; 290 } else { 291 PHY_READ(sc, RTK_MEDIASTAT, ®); 292 if (reg & RTK_MEDIASTAT_SPEED10) 293 mii->mii_media_active |= IFM_10_T; 294 else 295 mii->mii_media_active |= IFM_100_TX; 296 } 297 mii->mii_media_active |= IFM_HDX; 298 } else 299 mii->mii_media_active = ife->ifm_media; 300 } 301 302 static void 303 rlphy_reset(struct mii_softc *sc) 304 { 305 306 mii_phy_reset(sc); 307 308 /* 309 * XXX RealTek PHY doesn't set the BMCR properly after 310 * XXX reset, which breaks autonegotiation. 311 */ 312 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN); 313 } 314