1 /* $NetBSD: rlphy.c,v 1.23 2008/11/17 03:04:27 dyoung Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.23 2008/11/17 03:04:27 dyoung Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <sys/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 struct rlphy_softc { 60 struct mii_softc sc_mii; 61 int sc_rtl8201l; 62 }; 63 64 int rlphymatch(device_t, cfdata_t, void *); 65 void rlphyattach(device_t, device_t, void *); 66 67 CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc), 68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 69 70 int rlphy_service(struct mii_softc *, struct mii_data *, int); 71 void rlphy_status(struct mii_softc *); 72 73 static void rlphy_reset(struct mii_softc *); 74 75 const struct mii_phy_funcs rlphy_funcs = { 76 rlphy_service, rlphy_status, rlphy_reset, 77 }; 78 79 static const struct mii_phydesc rlphys[] = { 80 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, 81 MII_STR_yyREALTEK_RTL8201L }, 82 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, 83 MII_STR_ICPLUS_IP101 }, 84 85 { 0, 0, 86 NULL }, 87 }; 88 89 int 90 rlphymatch(device_t parent, cfdata_t match, void *aux) 91 { 92 struct mii_attach_args *ma = aux; 93 94 if (mii_phy_match(ma, rlphys) != NULL) 95 return (10); 96 97 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 98 MII_MODEL(ma->mii_id2) != 0) 99 return 0; 100 101 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re")) 102 return 0; 103 104 /* 105 * A "real" phy should get preference, but on the 8139 there 106 * is no phyid register. 107 */ 108 return 5; 109 } 110 111 void 112 rlphyattach(device_t parent, device_t self, void *aux) 113 { 114 struct rlphy_softc *rsc = device_private(self); 115 struct mii_softc *sc = &rsc->sc_mii; 116 struct mii_attach_args *ma = aux; 117 struct mii_data *mii = ma->mii_data; 118 119 aprint_naive("\n"); 120 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 121 rsc->sc_rtl8201l = 1; 122 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 123 MII_REV(ma->mii_id2)); 124 } else 125 aprint_normal(": Realtek internal PHY\n"); 126 127 sc->mii_dev = self; 128 sc->mii_inst = mii->mii_instance; 129 sc->mii_phy = ma->mii_phyno; 130 sc->mii_funcs = &rlphy_funcs; 131 sc->mii_pdata = mii; 132 sc->mii_flags = ma->mii_flags; 133 134 sc->mii_flags |= MIIF_NOISOLATE; 135 136 PHY_RESET(sc); 137 138 aprint_normal_dev(self, ""); 139 sc->mii_capabilities = 140 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 141 if (sc->mii_capabilities & BMSR_MEDIAMASK) 142 mii_phy_add_media(sc); 143 aprint_normal("\n"); 144 } 145 146 int 147 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 148 { 149 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 150 151 int rv; 152 153 /* 154 * Can't isolate the RTL8139 phy, so it has to be the only one. 155 */ 156 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 157 panic("rlphy_service: attempt to isolate phy"); 158 159 switch (cmd) { 160 case MII_POLLSTAT: 161 break; 162 163 case MII_MEDIACHG: 164 /* 165 * If the interface is not up, don't do anything. 166 */ 167 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 168 break; 169 170 switch (IFM_SUBTYPE(ife->ifm_media)) { 171 case IFM_AUTO: 172 /* 173 * If we're already in auto mode, just return. 174 */ 175 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 176 return (0); 177 (void) mii_phy_auto(sc, 0); 178 break; 179 case IFM_100_T4: 180 /* 181 * XXX Not supported as a manual setting right now. 182 */ 183 return (EINVAL); 184 default: 185 /* 186 * BMCR data is stored in the ifmedia entry. 187 */ 188 switch (ife->ifm_media & 189 (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 190 case IFM_ETHER|IFM_10_T: 191 rv = ANAR_10|ANAR_CSMA; 192 break; 193 case IFM_ETHER|IFM_10_T|IFM_FDX: 194 rv = ANAR_10_FD|ANAR_CSMA; 195 break; 196 case IFM_ETHER|IFM_100_TX: 197 rv = ANAR_TX|ANAR_CSMA; 198 break; 199 case IFM_ETHER|IFM_100_TX|IFM_FDX: 200 rv = ANAR_TX_FD|ANAR_CSMA; 201 break; 202 case IFM_ETHER|IFM_100_T4: 203 rv = ANAR_T4|ANAR_CSMA; 204 break; 205 default: 206 rv = 0; 207 break; 208 } 209 210 PHY_WRITE(sc, MII_ANAR, rv); 211 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 212 } 213 break; 214 215 case MII_TICK: 216 /* 217 * Is the interface even up? 218 */ 219 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 220 return (0); 221 222 /* 223 * Only used for autonegotiation. 224 */ 225 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 226 break; 227 228 /* 229 * The RealTek PHY's autonegotiation doesn't need to be 230 * kicked; it continues in the background. 231 */ 232 break; 233 234 case MII_DOWN: 235 mii_phy_down(sc); 236 return (0); 237 } 238 239 /* Update the media status. */ 240 mii_phy_status(sc); 241 242 /* Callback if something changed. */ 243 mii_phy_update(sc, cmd); 244 return (0); 245 } 246 247 void 248 rlphy_status(struct mii_softc *sc) 249 { 250 struct rlphy_softc *rsc = (void *)sc; 251 struct mii_data *mii = sc->mii_pdata; 252 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 253 int bmsr, bmcr, anlpar; 254 255 mii->mii_media_status = IFM_AVALID; 256 mii->mii_media_active = IFM_ETHER; 257 258 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 259 if (bmsr & BMSR_LINK) 260 mii->mii_media_status |= IFM_ACTIVE; 261 262 bmcr = PHY_READ(sc, MII_BMCR); 263 if (bmcr & BMCR_ISO) { 264 mii->mii_media_active |= IFM_NONE; 265 mii->mii_media_status = 0; 266 return; 267 } 268 269 if (bmcr & BMCR_LOOP) 270 mii->mii_media_active |= IFM_LOOP; 271 272 if (bmcr & BMCR_AUTOEN) { 273 /* 274 * NWay autonegotiation takes the highest-order common 275 * bit of the ANAR and ANLPAR (i.e. best media advertised 276 * both by us and our link partner). 277 */ 278 if ((bmsr & BMSR_ACOMP) == 0) { 279 /* Erg, still trying, I guess... */ 280 mii->mii_media_active |= IFM_NONE; 281 return; 282 } 283 284 if ((anlpar = PHY_READ(sc, MII_ANAR) & 285 PHY_READ(sc, MII_ANLPAR))) { 286 if (anlpar & ANLPAR_T4) 287 mii->mii_media_active |= IFM_100_T4; 288 else if (anlpar & ANLPAR_TX_FD) 289 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 290 else if (anlpar & ANLPAR_TX) 291 mii->mii_media_active |= IFM_100_TX; 292 else if (anlpar & ANLPAR_10_FD) 293 mii->mii_media_active |= IFM_10_T|IFM_FDX; 294 else if (anlpar & ANLPAR_10) 295 mii->mii_media_active |= IFM_10_T; 296 else 297 mii->mii_media_active |= IFM_NONE; 298 return; 299 } 300 301 /* 302 * If the other side doesn't support NWAY, then the 303 * best we can do is determine if we have a 10Mbps or 304 * 100Mbps link. There's no way to know if the link 305 * is full or half duplex, so we default to half duplex 306 * and hope that the user is clever enough to manually 307 * change the media settings if we're wrong. 308 */ 309 310 /* 311 * The RealTek PHY supports non-NWAY link speed 312 * detection, however it does not report the link 313 * detection results via the ANLPAR or BMSR registers. 314 * (What? RealTek doesn't do things the way everyone 315 * else does? I'm just shocked, shocked I tell you.) 316 * To determine the link speed, we have to do one 317 * of two things: 318 * 319 * - If this is a standalone RealTek RTL8201(L) PHY, 320 * we can determine the link speed by testing bit 0 321 * in the magic, vendor-specific register at offset 322 * 0x19. 323 * 324 * - If this is a RealTek MAC with integrated PHY, we 325 * can test the 'SPEED10' bit of the MAC's media status 326 * register. 327 */ 328 if (rsc->sc_rtl8201l) { 329 if (PHY_READ(sc, 0x0019) & 0x01) 330 mii->mii_media_active |= IFM_100_TX; 331 else 332 mii->mii_media_active |= IFM_10_T; 333 } else { 334 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10) 335 mii->mii_media_active |= IFM_10_T; 336 else 337 mii->mii_media_active |= IFM_100_TX; 338 } 339 340 } else 341 mii->mii_media_active = ife->ifm_media; 342 } 343 344 static void 345 rlphy_reset(struct mii_softc *sc) 346 { 347 348 mii_phy_reset(sc); 349 350 /* 351 * XXX RealTek PHY doesn't set the BMCR properly after 352 * XXX reset, which breaks autonegotiation. 353 */ 354 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN); 355 } 356