xref: /netbsd-src/sys/dev/mii/nsphy.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: nsphy.c,v 1.42 2004/08/23 06:16:06 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by Manuel Bouyer.
54  * 4. The name of the author may not be used to endorse or promote products
55  *    derived from this software without specific prior written permission.
56  *
57  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67  */
68 
69 /*
70  * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
71  * Data Sheet available from www.national.com
72  */
73 
74 #include <sys/cdefs.h>
75 __KERNEL_RCSID(0, "$NetBSD: nsphy.c,v 1.42 2004/08/23 06:16:06 thorpej Exp $");
76 
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/kernel.h>
80 #include <sys/device.h>
81 #include <sys/socket.h>
82 #include <sys/errno.h>
83 
84 #include <net/if.h>
85 #include <net/if_media.h>
86 
87 #include <dev/mii/mii.h>
88 #include <dev/mii/miivar.h>
89 #include <dev/mii/miidevs.h>
90 
91 #include <dev/mii/nsphyreg.h>
92 
93 static int	nsphymatch(struct device *, struct cfdata *, void *);
94 static void	nsphyattach(struct device *, struct device *, void *);
95 
96 CFATTACH_DECL(nsphy, sizeof(struct mii_softc),
97     nsphymatch, nsphyattach, mii_phy_detach, mii_phy_activate);
98 
99 static int	nsphy_service(struct mii_softc *, struct mii_data *, int);
100 static void	nsphy_status(struct mii_softc *);
101 static void	nsphy_reset(struct mii_softc *sc);
102 
103 static const struct mii_phy_funcs nsphy_funcs = {
104 	nsphy_service, nsphy_status, nsphy_reset,
105 };
106 
107 static const struct mii_phydesc nsphys[] = {
108 	{ MII_OUI_xxNATSEMI,		MII_MODEL_xxNATSEMI_DP83840,
109 	  MII_STR_xxNATSEMI_DP83840 },
110 
111 	{ 0,				0,
112 	  NULL },
113 };
114 
115 static int
116 nsphymatch(struct device *parent, struct cfdata *match, void *aux)
117 {
118 	struct mii_attach_args *ma = aux;
119 
120 	if (mii_phy_match(ma, nsphys) != NULL)
121 		return (10);
122 
123 	return (0);
124 }
125 
126 static void
127 nsphyattach(struct device *parent, struct device *self, void *aux)
128 {
129 	struct mii_softc *sc = (struct mii_softc *)self;
130 	struct mii_attach_args *ma = aux;
131 	struct mii_data *mii = ma->mii_data;
132 	const struct mii_phydesc *mpd;
133 
134 	mpd = mii_phy_match(ma, nsphys);
135 	aprint_naive(": Media interface\n");
136 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
137 
138 	sc->mii_inst = mii->mii_instance;
139 	sc->mii_phy = ma->mii_phyno;
140 	sc->mii_funcs = &nsphy_funcs;
141 	sc->mii_pdata = mii;
142 	sc->mii_flags = ma->mii_flags;
143 	sc->mii_anegticks = 5;
144 
145 	PHY_RESET(sc);
146 
147 	sc->mii_capabilities =
148 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
149 	aprint_normal("%s: ", sc->mii_dev.dv_xname);
150 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
151 		aprint_error("no media present");
152 	else
153 		mii_phy_add_media(sc);
154 	aprint_normal("\n");
155 }
156 
157 static int
158 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
159 {
160 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
161 	int reg;
162 
163 	if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
164 		return (ENXIO);
165 
166 	switch (cmd) {
167 	case MII_POLLSTAT:
168 		/*
169 		 * If we're not polling our PHY instance, just return.
170 		 */
171 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
172 			return (0);
173 		break;
174 
175 	case MII_MEDIACHG:
176 		/*
177 		 * If the media indicates a different PHY instance,
178 		 * isolate ourselves.
179 		 */
180 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
181 			reg = PHY_READ(sc, MII_BMCR);
182 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
183 			return (0);
184 		}
185 
186 		/*
187 		 * If the interface is not up, don't do anything.
188 		 */
189 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
190 			break;
191 
192 		reg = PHY_READ(sc, MII_NSPHY_PCR);
193 
194 		/*
195 		 * Set up the PCR to use LED4 to indicate full-duplex
196 		 * in both 10baseT and 100baseTX modes.
197 		 */
198 		reg |= PCR_LED4MODE;
199 
200 		/*
201 		 * Make sure Carrier Integrity Monitor function is
202 		 * disabled (normal for Node operation, but sometimes
203 		 * it's not set?!)
204 		 */
205 		reg |= PCR_CIMDIS;
206 
207 		/*
208 		 * Make sure "force link good" is set to normal mode.
209 		 * It's only intended for debugging.
210 		 */
211 		reg |= PCR_FLINK100;
212 
213 		/*
214 		 * Mystery bits which are supposedly `reserved',
215 		 * but we seem to need to set them when the PHY
216 		 * is connected to some interfaces:
217 		 *
218 		 * 0x0400 is needed for fxp
219 		 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
220 		 *        (nsphy with a DP83840 chip)
221 		 * 0x0100 may be needed for some other card
222 		 */
223 		reg |= 0x0100 | 0x0400;
224 
225 		PHY_WRITE(sc, MII_NSPHY_PCR, reg);
226 
227 		mii_phy_setmedia(sc);
228 		break;
229 
230 	case MII_TICK:
231 		/*
232 		 * If we're not currently selected, just return.
233 		 */
234 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
235 			return (0);
236 
237 		if (mii_phy_tick(sc) == EJUSTRETURN)
238 			return (0);
239 		break;
240 
241 	case MII_DOWN:
242 		mii_phy_down(sc);
243 		return (0);
244 	}
245 
246 	/* Update the media status. */
247 	mii_phy_status(sc);
248 
249 	/* Callback if something changed. */
250 	mii_phy_update(sc, cmd);
251 	return (0);
252 }
253 
254 static void
255 nsphy_status(struct mii_softc *sc)
256 {
257 	struct mii_data *mii = sc->mii_pdata;
258 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
259 	int bmsr, bmcr, par, anlpar;
260 
261 	mii->mii_media_status = IFM_AVALID;
262 	mii->mii_media_active = IFM_ETHER;
263 
264 	bmsr = PHY_READ(sc, MII_BMSR) |
265 	    PHY_READ(sc, MII_BMSR);
266 	if (bmsr & BMSR_LINK)
267 		mii->mii_media_status |= IFM_ACTIVE;
268 
269 	bmcr = PHY_READ(sc, MII_BMCR);
270 	if (bmcr & BMCR_ISO) {
271 		mii->mii_media_active |= IFM_NONE;
272 		mii->mii_media_status = 0;
273 		return;
274 	}
275 
276 	if (bmcr & BMCR_LOOP)
277 		mii->mii_media_active |= IFM_LOOP;
278 
279 	if (bmcr & BMCR_AUTOEN) {
280 		/*
281 		 * The PAR status bits are only valid of autonegotiation
282 		 * has completed (or it's disabled).
283 		 */
284 		if ((bmsr & BMSR_ACOMP) == 0) {
285 			/* Erg, still trying, I guess... */
286 			mii->mii_media_active |= IFM_NONE;
287 			return;
288 		}
289 
290 		/*
291 		 * Argh.  The PAR doesn't seem to indicate duplex mode
292 		 * properly!  Determine media based on link partner's
293 		 * advertised capabilities.
294 		 */
295 		if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
296 			anlpar = PHY_READ(sc, MII_ANAR) &
297 			    PHY_READ(sc, MII_ANLPAR);
298 			if (anlpar & ANLPAR_T4)
299 				mii->mii_media_active |= IFM_100_T4;
300 			else if (anlpar & ANLPAR_TX_FD)
301 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
302 			else if (anlpar & ANLPAR_TX)
303 				mii->mii_media_active |= IFM_100_TX;
304 			else if (anlpar & ANLPAR_10_FD)
305 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
306 			else if (anlpar & ANLPAR_10)
307 				mii->mii_media_active |= IFM_10_T;
308 			else
309 				mii->mii_media_active |= IFM_NONE;
310 			return;
311 		}
312 
313 		/*
314 		 * Link partner is not capable of autonegotiation.
315 		 * We will never be in full-duplex mode if this is
316 		 * the case, so reading the PAR is OK.
317 		 */
318 		par = PHY_READ(sc, MII_NSPHY_PAR);
319 		if (par & PAR_10)
320 			mii->mii_media_active |= IFM_10_T;
321 		else
322 			mii->mii_media_active |= IFM_100_TX;
323 #if 0
324 		if (par & PAR_FDX)
325 			mii->mii_media_active |= IFM_FDX;
326 #endif
327 	} else
328 		mii->mii_media_active = ife->ifm_media;
329 }
330 
331 static void
332 nsphy_reset(struct mii_softc *sc)
333 {
334 	int reg, i;
335 
336 	if (sc->mii_flags & MIIF_NOISOLATE)
337 		reg = BMCR_RESET;
338 	else
339 		reg = BMCR_RESET | BMCR_ISO;
340 	PHY_WRITE(sc, MII_BMCR, reg);
341 
342 	/*
343 	 * Give it a little time to settle in case we just got power.
344 	 * The DP83840A data sheet suggests that a soft reset not happen
345 	 * within 500us of power being applied.  Be conservative.
346 	 */
347 	delay(1000);
348 
349 	/*
350 	 * Wait another 2s for it to complete.
351 	 * This is only a little overkill as under normal circumstances
352 	 * the PHY can take up to 1s to complete reset.
353 	 * This is also a bit odd because after a reset, the BMCR will
354 	 * clear the reset bit and simply reports 0 even though the reset
355 	 * is not yet complete.
356 	 */
357 	for (i = 0; i < 1000; i++) {
358 		reg = PHY_READ(sc, MII_BMCR);
359 		if (reg && ((reg & BMCR_RESET) == 0))
360 			break;
361 		delay(2000);
362 	}
363 
364 	if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) {
365 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
366 	}
367 }
368