1 /* $NetBSD: nsphy.c,v 1.66 2020/03/15 23:04:50 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY 59 * Data Sheet available from www.national.com 60 */ 61 62 #include <sys/cdefs.h> 63 __KERNEL_RCSID(0, "$NetBSD: nsphy.c,v 1.66 2020/03/15 23:04:50 thorpej Exp $"); 64 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/device.h> 69 #include <sys/socket.h> 70 #include <sys/errno.h> 71 72 #include <net/if.h> 73 #include <net/if_media.h> 74 75 #include <dev/mii/mii.h> 76 #include <dev/mii/miivar.h> 77 #include <dev/mii/miidevs.h> 78 79 #include <dev/mii/nsphyreg.h> 80 81 static int nsphymatch(device_t, cfdata_t, void *); 82 static void nsphyattach(device_t, device_t, void *); 83 84 CFATTACH_DECL_NEW(nsphy, sizeof(struct mii_softc), 85 nsphymatch, nsphyattach, mii_phy_detach, mii_phy_activate); 86 87 static int nsphy_service(struct mii_softc *, struct mii_data *, int); 88 static void nsphy_status(struct mii_softc *); 89 static void nsphy_reset(struct mii_softc *sc); 90 91 static const struct mii_phy_funcs nsphy_funcs = { 92 nsphy_service, nsphy_status, nsphy_reset, 93 }; 94 95 static const struct mii_phydesc nsphys[] = { 96 MII_PHY_DESC(xxNATSEMI, DP83840), 97 MII_PHY_END, 98 }; 99 100 static int 101 nsphymatch(device_t parent, cfdata_t match, void *aux) 102 { 103 struct mii_attach_args *ma = aux; 104 105 if (mii_phy_match(ma, nsphys) != NULL) 106 return 10; 107 108 return 0; 109 } 110 111 static void 112 nsphyattach(device_t parent, device_t self, void *aux) 113 { 114 struct mii_softc *sc = device_private(self); 115 struct mii_attach_args *ma = aux; 116 struct mii_data *mii = ma->mii_data; 117 const struct mii_phydesc *mpd; 118 119 mpd = mii_phy_match(ma, nsphys); 120 aprint_naive(": Media interface\n"); 121 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 122 123 sc->mii_dev = self; 124 sc->mii_inst = mii->mii_instance; 125 sc->mii_phy = ma->mii_phyno; 126 sc->mii_funcs = &nsphy_funcs; 127 sc->mii_pdata = mii; 128 sc->mii_flags = ma->mii_flags; 129 130 mii_lock(mii); 131 132 PHY_RESET(sc); 133 134 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 135 sc->mii_capabilities &= ma->mii_capmask; 136 137 mii_unlock(mii); 138 139 mii_phy_add_media(sc); 140 } 141 142 static int 143 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 144 { 145 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 146 uint16_t reg; 147 148 KASSERT(mii_locked(mii)); 149 150 switch (cmd) { 151 case MII_POLLSTAT: 152 /* If we're not polling our PHY instance, just return. */ 153 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) 154 return 0; 155 break; 156 157 case MII_MEDIACHG: 158 /* 159 * If the media indicates a different PHY instance, 160 * isolate ourselves. 161 */ 162 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) { 163 PHY_READ(sc, MII_BMCR, ®); 164 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 165 return 0; 166 } 167 168 /* If the interface is not up, don't do anything. */ 169 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 170 break; 171 172 PHY_READ(sc, MII_NSPHY_PCR, ®); 173 174 /* 175 * Set up the PCR to use LED4 to indicate full-duplex 176 * in both 10baseT and 100baseTX modes. 177 */ 178 reg |= PCR_LED4MODE; 179 180 /* 181 * Make sure Carrier Integrity Monitor function is 182 * disabled (normal for Node operation, but sometimes 183 * it's not set?!) 184 */ 185 reg |= PCR_CIMDIS; 186 187 /* 188 * Make sure "force link good" is set to normal mode. 189 * It's only intended for debugging. 190 */ 191 reg |= PCR_FLINK100; 192 193 /* 194 * Mystery bits which are supposedly `reserved', 195 * but we seem to need to set them when the PHY 196 * is connected to some interfaces: 197 * 198 * 0x0400 is needed for fxp 199 * (Intel EtherExpress Pro 10+/100B, 82557 chip) 200 * (nsphy with a DP83840 chip) 201 * 0x0100 may be needed for some other card 202 */ 203 reg |= 0x0100 | 0x0400; 204 205 PHY_WRITE(sc, MII_NSPHY_PCR, reg); 206 207 mii_phy_setmedia(sc); 208 break; 209 210 case MII_TICK: 211 /* If we're not currently selected, just return. */ 212 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) 213 return 0; 214 215 if (mii_phy_tick(sc) == EJUSTRETURN) 216 return 0; 217 break; 218 219 case MII_DOWN: 220 mii_phy_down(sc); 221 return 0; 222 } 223 224 /* Update the media status. */ 225 mii_phy_status(sc); 226 227 /* Callback if something changed. */ 228 mii_phy_update(sc, cmd); 229 return 0; 230 } 231 232 static void 233 nsphy_status(struct mii_softc *sc) 234 { 235 struct mii_data *mii = sc->mii_pdata; 236 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 237 uint16_t bmsr, bmcr, aner, anar, par, anlpar, result; 238 239 KASSERT(mii_locked(mii)); 240 241 mii->mii_media_status = IFM_AVALID; 242 mii->mii_media_active = IFM_ETHER; 243 244 PHY_READ(sc, MII_BMSR, &bmsr); 245 PHY_READ(sc, MII_BMSR, &bmsr); 246 if (bmsr & BMSR_LINK) 247 mii->mii_media_status |= IFM_ACTIVE; 248 249 PHY_READ(sc, MII_BMCR, &bmcr); 250 if (bmcr & BMCR_ISO) { 251 mii->mii_media_active |= IFM_NONE; 252 mii->mii_media_status = 0; 253 return; 254 } 255 256 if (bmcr & BMCR_LOOP) 257 mii->mii_media_active |= IFM_LOOP; 258 259 if (bmcr & BMCR_AUTOEN) { 260 /* 261 * The PAR status bits are only valid if autonegotiation 262 * has completed (or it's disabled). 263 */ 264 if ((bmsr & BMSR_ACOMP) == 0) { 265 /* Erg, still trying, I guess... */ 266 mii->mii_media_active |= IFM_NONE; 267 return; 268 } 269 270 /* 271 * Argh. The PAR doesn't seem to indicate duplex mode 272 * properly! Determine media based on link partner's 273 * advertised capabilities. 274 */ 275 PHY_READ(sc, MII_ANER, &aner); 276 if (aner & ANER_LPAN) { 277 PHY_READ(sc, MII_ANAR, &anar); 278 PHY_READ(sc, MII_ANLPAR, &anlpar); 279 result = anar & anlpar; 280 if (result & ANLPAR_TX_FD) 281 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 282 else if (result & ANLPAR_T4) 283 mii->mii_media_active |= IFM_100_T4 | IFM_HDX; 284 else if (result & ANLPAR_TX) 285 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 286 else if (result & ANLPAR_10_FD) 287 mii->mii_media_active |= IFM_10_T | IFM_FDX; 288 else if (result & ANLPAR_10) 289 mii->mii_media_active |= IFM_10_T | IFM_HDX; 290 else 291 mii->mii_media_active |= IFM_NONE; 292 return; 293 } 294 295 /* 296 * Link partner is not capable of autonegotiation. 297 * We will never be in full-duplex mode if this is 298 * the case, so reading the PAR is OK. 299 */ 300 PHY_READ(sc, MII_NSPHY_PAR, &par); 301 if (par & PAR_10) 302 mii->mii_media_active |= IFM_10_T; 303 else 304 mii->mii_media_active |= IFM_100_TX; 305 mii->mii_media_active |= IFM_HDX; 306 } else 307 mii->mii_media_active = ife->ifm_media; 308 } 309 310 static void 311 nsphy_reset(struct mii_softc *sc) 312 { 313 int i; 314 uint16_t reg; 315 316 KASSERT(mii_locked(sc->mii_pdata)); 317 318 if (sc->mii_flags & MIIF_NOISOLATE) 319 reg = BMCR_RESET; 320 else 321 reg = BMCR_RESET | BMCR_ISO; 322 PHY_WRITE(sc, MII_BMCR, reg); 323 324 /* 325 * Give it a little time to settle in case we just got power. 326 * The DP83840A data sheet suggests that a soft reset not happen 327 * within 500us of power being applied. Be conservative. 328 */ 329 delay(1000); 330 331 /* 332 * Wait another 2s for it to complete. 333 * This is only a little overkill as under normal circumstances 334 * the PHY can take up to 1s to complete reset. 335 * This is also a bit odd because after a reset, the BMCR will 336 * clear the reset bit and simply reports 0 even though the reset 337 * is not yet complete. 338 */ 339 for (i = 0; i < 1000; i++) { 340 PHY_READ(sc, MII_BMCR, ®); 341 if (reg && ((reg & BMCR_RESET) == 0)) 342 break; 343 delay(2000); 344 } 345 346 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) 347 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 348 } 349