xref: /netbsd-src/sys/dev/mii/mvphy.c (revision ce2c90c7c172d95d2402a5b3d96d8f8e6d138a21)
1 /*	$NetBSD: mvphy.c,v 1.1 2006/07/21 23:55:27 gdamore Exp $	*/
2 
3 /*-
4  * Copyright (c) 2006 Sam Leffler, Errno Consulting
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * Driver for Marvell 88E6060 10/100 5-port PHY switch.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: mvphy.c,v 1.1 2006/07/21 23:55:27 gdamore Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40 #include <sys/socket.h>
41 #include <sys/errno.h>
42 
43 #include <net/if.h>
44 #include <net/if_media.h>
45 
46 #include <dev/mii/mii.h>
47 #include <dev/mii/miivar.h>
48 #include <dev/mii/miidevs.h>
49 
50 #include <dev/mii/mvphyreg.h>
51 
52 #define	MV_PORT(sc)	((sc)->mii_phy - 16)	/* PHY # to switch port */
53 #define	MV_CPU_PORT	5			/* port # of CPU port */
54 
55 #define	MV_READ(p, phy, r) \
56 	(*(p)->mii_pdata->mii_readreg)(device_parent(&(p)->mii_dev), \
57 	    phy, (r))
58 #define	MV_WRITE(p, phy, r, v) \
59 	(*(p)->mii_pdata->mii_writereg)(device_parent(&(p)->mii_dev), \
60 	    phy, (r), (v))
61 
62 /* XXX sysctl'able */
63 #define MV_ATUCTRL_ATU_SIZE_DEFAULT	2	/* 1024 entry database */
64 #define MV_ATUCTRL_AGE_TIME_DEFAULT	19	/* 19 * 16 = 304 seconds */
65 
66 /*
67  * Register manipulation macros that expect bit field defines
68  * to follow the convention that an _S suffix is appended for
69  * a shift count, while the field mask has no suffix.
70  */
71 #define	SM(_v, _f)	(((_v) << _f##_S) & _f)
72 #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
73 
74 static int	mvphymatch(struct device *, struct cfdata *, void *);
75 static void	mvphyattach(struct device *, struct device *, void *);
76 
77 CFATTACH_DECL(mvphy, sizeof(struct mii_softc),
78     mvphymatch, mvphyattach, mii_phy_detach, mii_phy_activate);
79 
80 static int	mvphy_service(struct mii_softc *, struct mii_data *, int);
81 static void	mvphy_status(struct mii_softc *);
82 static void	mvphy_reset(struct mii_softc *sc);
83 
84 static const struct mii_phy_funcs mvphy_funcs = {
85 	mvphy_service, mvphy_status, mvphy_reset,
86 };
87 
88 static const struct mii_phydesc mvphys[] = {
89 	{ MII_OUI_xxMARVELL,		MII_MODEL_xxMARVELL_E6060,
90 	  MII_STR_xxMARVELL_E6060 },
91 
92 	{ 0,				0,
93 	  NULL },
94 };
95 
96 /*
97  * On AP30/AR5312 the switch is configured in one of two ways:
98  * as a ROUTER or as a BRIDGE.  The ROUTER config sets up ports
99  * 0-3 as LAN ports, port 4 as the WAN port, and port 5 connects
100  * to the MAC in the 5312.  The BRIDGE config sets up ports
101  * 0-4 as LAN ports with port 5 connected to the MAC in the 5312.
102  */
103 struct mvPhyConfig {
104 	uint16_t switchPortAddr;/* switch port associated with PHY */
105 	uint16_t vlanSetting;	/* VLAN table setting  for PHY */
106 	uint32_t portControl;	/* switch port control setting for PHY */
107 };
108 static const struct mvPhyConfig routerConfig[] = {
109 	{ 0x18, 0x2e,		/* PHY port 0 = LAN port 0 */
110 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
111 	{ 0x19, 0x2d,		/* PHY port 1 = LAN port 1 */
112 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
113 	{ 0x1a, 0x2b,		/* PHY port 2 = LAN port 2 */
114 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
115 	{ 0x1b, 0x27,		/* PHY port 3 = LAN port 3 */
116 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
117 	{ 0x1c, 0x1020,		/* PHY port 4 = WAN port */
118 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
119 	/* NB: 0x0f =>'s send only to LAN ports */
120 	{ 0x1d, 0x0f,		/* PHY port 5 = CPU port */
121 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING
122 #if 0
123 	  | MV_PORT_CONTROL_INGRESS_TRAILER
124 	  | MV_PORT_CONTROL_EGRESS_MODE
125 #endif
126 	  }
127 };
128 static const struct mvPhyConfig bridgeConfig[] = {
129 	{ 0x18, 0x3e,		/* PHY port 0 = LAN port 0 */
130 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
131 	{ 0x19, 0x3d,		/* PHY port 1 = LAN port 1 */
132 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
133 	{ 0x1a, 0x3b,		/* PHY port 2 = LAN port 2 */
134 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
135 	{ 0x1b, 0x37,		/* PHY port 3 = LAN port 3 */
136 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
137 	{ 0x1c, 0x37,		/* PHY port 4 = LAN port 4 */
138 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING },
139 	/* NB: 0x1f =>'s send to all ports */
140 	{ 0x1d, 0x1f,		/* PHY port 5 = CPU port */
141 	  MV_PORT_CONTROL_PORT_STATE_FORWARDING
142 #if 0
143 	  | MV_PORT_CONTROL_INGRESS_TRAILER
144 	  | MV_PORT_CONTROL_EGRESS_MODE
145 #endif
146 	}
147 };
148 
149 static void mvphy_switchconfig(struct mii_softc *, int);
150 static void mvphy_flushatu(struct mii_softc *);
151 
152 static int
153 mvphymatch(struct device *parent, struct cfdata *match, void *aux)
154 {
155 	struct mii_attach_args *ma = aux;
156 
157 	if (mii_phy_match(ma, mvphys) != NULL)
158 		return (10);
159 
160 	return (0);
161 }
162 
163 static void
164 mvphyattach(struct device *parent, struct device *self, void *aux)
165 {
166 	struct mii_softc *sc = device_private(self);
167 	struct mii_attach_args *ma = aux;
168 	struct mii_data *mii = ma->mii_data;
169 	const struct mii_phydesc *mpd;
170 
171 	mpd = mii_phy_match(ma, mvphys);
172 	aprint_naive(": Media interface\n");
173 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
174 
175 	sc->mii_inst = mii->mii_instance;
176 	sc->mii_phy = ma->mii_phyno;
177 	sc->mii_funcs = &mvphy_funcs;
178 	sc->mii_pdata = mii;
179 	sc->mii_flags = ma->mii_flags;
180 	sc->mii_anegticks = 5;
181 
182 	if (MV_PORT(sc) == 0) {		/* NB: only when attaching first PHY */
183 		/*
184 		 * Set the global switch settings and configure the
185 		 * CPU port since it does not probe as a visible PHY.
186 		 */
187 		MV_WRITE(sc, MII_MV_SWITCH_GLOBAL_ADDR, MV_ATU_CONTROL,
188 		      SM(MV_ATUCTRL_AGE_TIME_DEFAULT, MV_ATUCTRL_AGE_TIME)
189 		    | SM(MV_ATUCTRL_ATU_SIZE_DEFAULT, MV_ATUCTRL_ATU_SIZE));
190 		mvphy_switchconfig(sc, MV_CPU_PORT);
191 	}
192 	PHY_RESET(sc);
193 
194 	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
195 	aprint_normal("%s: ", sc->mii_dev.dv_xname);
196 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
197 		aprint_error("no media present");
198 	else
199 		mii_phy_add_media(sc);
200 	aprint_normal("\n");
201 }
202 
203 static int
204 mvphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
205 {
206 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
207 
208 	if (!device_is_active(&sc->mii_dev))
209 		return (ENXIO);
210 
211 	switch (cmd) {
212 	case MII_POLLSTAT:
213 		/*
214 		 * If we're not polling our PHY instance, just return.
215 		 */
216 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
217 			return (0);
218 		break;
219 
220 	case MII_MEDIACHG:
221 		/*
222 		 * If the media indicates a different PHY instance,
223 		 * isolate ourselves.
224 		 */
225 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
226 			/* XXX? */
227 			return (0);
228 		}
229 
230 		/*
231 		 * If the interface is not up, don't do anything.
232 		 */
233 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
234 			break;
235 
236 		mii_phy_setmedia(sc);
237 		break;
238 
239 	case MII_TICK:
240 		/*
241 		 * If we're not currently selected, just return.
242 		 */
243 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
244 			return (0);
245 
246 		if (mii_phy_tick(sc) == EJUSTRETURN)
247 			return (0);
248 		break;
249 
250 	case MII_DOWN:
251 		mii_phy_down(sc);
252 		return (0);
253 	}
254 
255 	/* Update the media status. */
256 	mii_phy_status(sc);
257 
258 	/* Callback if something changed. */
259 	mii_phy_update(sc, cmd);
260 	return (0);
261 }
262 
263 static void
264 mvphy_status(struct mii_softc *sc)
265 {
266 	struct mii_data *mii = sc->mii_pdata;
267 	int hwstatus;
268 
269 	mii->mii_media_status = IFM_AVALID;
270 	mii->mii_media_active = IFM_ETHER;
271 
272 	hwstatus = PHY_READ(sc, MII_MV_PHY_SPECIFIC_STATUS);
273 	if (hwstatus & MV_STATUS_REAL_TIME_LINK_UP) {
274 		mii->mii_media_status |= IFM_ACTIVE;
275 		if (hwstatus & MV_STATUS_RESOLVED_SPEED_100)
276 			mii->mii_media_active |= IFM_100_TX;
277 		else
278 			mii->mii_media_active |= IFM_10_T;
279 		if (hwstatus & MV_STATUS_RESOLVED_DUPLEX_FULL)
280 			mii->mii_media_active |= IFM_FDX;
281 	} else {
282 		mii->mii_media_active |= IFM_NONE;
283 		/* XXX flush ATU only on link down transition */
284 		mvphy_flushatu(sc);
285 	}
286 }
287 
288 static void
289 mvphy_reset(struct mii_softc *sc)
290 {
291 
292 	/* XXX handle fixed media config */
293 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
294 	mvphy_switchconfig(sc, MV_PORT(sc));
295 }
296 
297 /*
298  * Configure switch for the specified port.
299  */
300 static void
301 mvphy_switchconfig(struct mii_softc *sc, int port)
302 {
303 	/* XXX router vs bridge */
304 	const struct mvPhyConfig *conf = &routerConfig[port];
305 
306 	MV_WRITE(sc, conf->switchPortAddr, MV_PORT_BASED_VLAN_MAP,
307 	    conf->vlanSetting);
308 	/* XXX administrative control of port enable? */
309 	MV_WRITE(sc, conf->switchPortAddr, MV_PORT_CONTROL, conf->portControl);
310 	MV_WRITE(sc, conf->switchPortAddr, MV_PORT_ASSOCIATION_VECTOR, 1<<port);
311 }
312 
313 /*
314  * Flush the Address Translation Unit (ATU).
315  */
316 static void
317 mvphy_flushatu(struct mii_softc *sc)
318 {
319 	uint16_t status;
320 	int i;
321 
322 printf("%s: %s\n", sc->mii_dev.dv_xname, __func__);/*XXX*/
323 	/* wait for any previous request to complete */
324 	/* XXX if busy defer to tick */
325 	/* XXX timeout */
326 	for (i = 0; i < 1000; i++) {
327 		status = MV_READ(sc, MII_MV_SWITCH_GLOBAL_ADDR,
328 				MV_ATU_OPERATION);
329 		if (MV_ATU_IS_BUSY(status))
330 			break;
331 	}
332 	if (i != 1000) {
333 		MV_WRITE(sc, MII_MV_SWITCH_GLOBAL_ADDR, MV_ATU_OPERATION,
334 		    MV_ATU_OP_FLUSH_ALL | MV_ATU_BUSY);
335 	} else
336 		printf("%s: timeout waiting for ATU flush\n",
337 		    sc->mii_dev.dv_xname);
338 }
339