xref: /netbsd-src/sys/dev/mii/mii_physubr.c (revision 4b896b232495b7a9b8b94a1cf1e21873296d53b8)
1 /*	$NetBSD: mii_physubr.c,v 1.42 2004/04/11 15:47:33 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Subroutines common to all PHYs.
42  */
43 
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.42 2004/04/11 15:47:33 thorpej Exp $");
46 
47 #include <sys/param.h>
48 #include <sys/device.h>
49 #include <sys/systm.h>
50 #include <sys/kernel.h>
51 #include <sys/socket.h>
52 #include <sys/errno.h>
53 #include <sys/proc.h>
54 
55 #include <net/if.h>
56 #include <net/if_media.h>
57 #include <net/route.h>
58 
59 #include <dev/mii/mii.h>
60 #include <dev/mii/miivar.h>
61 
62 /*
63  * Media to register setting conversion table.  Order matters.
64  */
65 const struct mii_media mii_media_table[MII_NMEDIA] = {
66 	/* None */
67 	{ BMCR_ISO,		ANAR_CSMA,
68 	  0, },
69 
70 	/* 10baseT */
71 	{ BMCR_S10,		ANAR_CSMA|ANAR_10,
72 	  0, },
73 
74 	/* 10baseT-FDX */
75 	{ BMCR_S10|BMCR_FDX,	ANAR_CSMA|ANAR_10_FD,
76 	  0, },
77 
78 	/* 100baseT4 */
79 	{ BMCR_S100,		ANAR_CSMA|ANAR_T4,
80 	  0, },
81 
82 	/* 100baseTX */
83 	{ BMCR_S100,		ANAR_CSMA|ANAR_TX,
84 	  0, },
85 
86 	/* 100baseTX-FDX */
87 	{ BMCR_S100|BMCR_FDX,	ANAR_CSMA|ANAR_TX_FD,
88 	  0, },
89 
90 	/* 1000baseX */
91 	{ BMCR_S1000,		ANAR_CSMA,
92 	  0, },
93 
94 	/* 1000baseX-FDX */
95 	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,
96 	  0, },
97 
98 	/* 1000baseT */
99 	{ BMCR_S1000,		ANAR_CSMA,
100 	  GTCR_ADV_1000THDX },
101 
102 	/* 1000baseT-FDX */
103 	{ BMCR_S1000,		ANAR_CSMA,
104 	  GTCR_ADV_1000TFDX },
105 };
106 
107 void	mii_phy_auto_timeout(void *);
108 
109 void
110 mii_phy_setmedia(struct mii_softc *sc)
111 {
112 	struct mii_data *mii = sc->mii_pdata;
113 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
114 	int bmcr, anar, gtcr;
115 
116 	if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
117 		/*
118 		 * Force renegotiation if MIIF_DOPAUSE.
119 		 *
120 		 * XXX This is only necessary because many NICs don't
121 		 * XXX advertise PAUSE capabilities at boot time.  Maybe
122 		 * XXX we should force this only once?
123 		 */
124 		if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
125 		    (sc->mii_flags & (MIIF_FORCEANEG|MIIF_DOPAUSE)))
126 			(void) mii_phy_auto(sc, 1);
127 		return;
128 	}
129 
130 	/*
131 	 * Table index is stored in the media entry.
132 	 */
133 
134 #ifdef DIAGNOSTIC
135 	if (ife->ifm_data < 0 || ife->ifm_data >= MII_NMEDIA)
136 		panic("mii_phy_setmedia");
137 #endif
138 
139 	anar = mii_media_table[ife->ifm_data].mm_anar;
140 	bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
141 	gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
142 
143 	if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
144 		switch (IFM_SUBTYPE(ife->ifm_media)) {
145 		case IFM_1000_T:
146 			gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
147 			break;
148 
149 		default:
150 			panic("mii_phy_setmedia: MASTER on wrong media");
151 		}
152 	}
153 
154 	if (mii->mii_media.ifm_media & IFM_FLOW) {
155 		if (sc->mii_flags & MIIF_IS_1000X)
156 			anar |= ANAR_X_PAUSE_SYM | ANAR_X_PAUSE_ASYM;
157 		else {
158 			anar |= ANAR_FC;
159 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
160 			if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
161 			    (sc->mii_extcapabilities &
162 			     (EXTSR_1000THDX|EXTSR_1000TFDX)))
163 				anar |= ANAR_X_PAUSE_ASYM;
164 		}
165 	}
166 
167 	if (ife->ifm_media & IFM_LOOP)
168 		bmcr |= BMCR_LOOP;
169 
170 	PHY_WRITE(sc, MII_ANAR, anar);
171 	PHY_WRITE(sc, MII_BMCR, bmcr);
172 	if (sc->mii_flags & MIIF_HAVE_GTCR)
173 		PHY_WRITE(sc, MII_100T2CR, gtcr);
174 }
175 
176 int
177 mii_phy_auto(struct mii_softc *sc, int waitfor)
178 {
179 	int i;
180 
181 	if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
182 		/*
183 		 * Check for 1000BASE-X.  Autonegotiation is a bit
184 		 * different on such devices.
185 		 */
186 		if (sc->mii_flags & MIIF_IS_1000X) {
187 			uint16_t anar = 0;
188 
189 			if (sc->mii_extcapabilities & EXTSR_1000XFDX)
190 				anar |= ANAR_X_FD;
191 			if (sc->mii_extcapabilities & EXTSR_1000XHDX)
192 				anar |= ANAR_X_HD;
193 
194 			if (sc->mii_flags & MIIF_DOPAUSE) {
195 				/* XXX Asymmetric vs. symmetric? */
196 				anar |= ANLPAR_X_PAUSE_TOWARDS;
197 			}
198 
199 			PHY_WRITE(sc, MII_ANAR, anar);
200 		} else {
201 			uint16_t anar;
202 
203 			anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
204 			    ANAR_CSMA;
205 			if (sc->mii_flags & MIIF_DOPAUSE) {
206 				anar |= ANAR_FC;
207 				/* XXX Only 1000BASE-T has PAUSE_ASYM? */
208 				if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
209 				    (sc->mii_extcapabilities &
210 				     (EXTSR_1000THDX|EXTSR_1000TFDX)))
211 					anar |= ANAR_X_PAUSE_ASYM;
212 			}
213 			PHY_WRITE(sc, MII_ANAR, anar);
214 			if (sc->mii_flags & MIIF_HAVE_GTCR) {
215 				uint16_t gtcr = 0;
216 
217 				if (sc->mii_extcapabilities & EXTSR_1000TFDX)
218 					gtcr |= GTCR_ADV_1000TFDX;
219 				if (sc->mii_extcapabilities & EXTSR_1000THDX)
220 					gtcr |= GTCR_ADV_1000THDX;
221 
222 				PHY_WRITE(sc, MII_100T2CR, gtcr);
223 			}
224 		}
225 		PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
226 	}
227 
228 	if (waitfor) {
229 		/* Wait 500ms for it to complete. */
230 		for (i = 0; i < 500; i++) {
231 			if (PHY_READ(sc, MII_BMSR) & BMSR_ACOMP)
232 				return (0);
233 			delay(1000);
234 		}
235 
236 		/*
237 		 * Don't need to worry about clearing MIIF_DOINGAUTO.
238 		 * If that's set, a timeout is pending, and it will
239 		 * clear the flag.
240 		 */
241 		return (EIO);
242 	}
243 
244 	/*
245 	 * Just let it finish asynchronously.  This is for the benefit of
246 	 * the tick handler driving autonegotiation.  Don't want 500ms
247 	 * delays all the time while the system is running!
248 	 */
249 	if (sc->mii_flags & MIIF_AUTOTSLEEP) {
250 		sc->mii_flags |= MIIF_DOINGAUTO;
251 		tsleep(&sc->mii_flags, PZERO, "miiaut", hz >> 1);
252 		mii_phy_auto_timeout(sc);
253 	} else if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
254 		sc->mii_flags |= MIIF_DOINGAUTO;
255 		callout_reset(&sc->mii_nway_ch, hz >> 1,
256 		    mii_phy_auto_timeout, sc);
257 	}
258 	return (EJUSTRETURN);
259 }
260 
261 void
262 mii_phy_auto_timeout(void *arg)
263 {
264 	struct mii_softc *sc = arg;
265 	int s;
266 
267 	if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
268 		return;
269 
270 	s = splnet();
271 	sc->mii_flags &= ~MIIF_DOINGAUTO;
272 
273 	/* Update the media status. */
274 	(void) PHY_SERVICE(sc, sc->mii_pdata, MII_POLLSTAT);
275 	splx(s);
276 }
277 
278 int
279 mii_phy_tick(struct mii_softc *sc)
280 {
281 	struct mii_data *mii = sc->mii_pdata;
282 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
283 	int reg;
284 
285 	/* Just bail now if the interface is down. */
286 	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
287 		return (EJUSTRETURN);
288 
289 	/*
290 	 * If we're not doing autonegotiation, we don't need to do
291 	 * any extra work here.  However, we need to check the link
292 	 * status so we can generate an announcement if the status
293 	 * changes.
294 	 */
295 	if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
296 		return (0);
297 
298 	/* Read the status register twice; BMSR_LINK is latch-low. */
299 	reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
300 	if (reg & BMSR_LINK) {
301 		/*
302 		 * See above.
303 		 */
304 		return (0);
305 	}
306 
307 	/*
308 	 * Only retry autonegotiation every N seconds.
309 	 */
310 	KASSERT(sc->mii_anegticks != 0);
311 	if (++sc->mii_ticks != sc->mii_anegticks)
312 		return (EJUSTRETURN);
313 
314 	sc->mii_ticks = 0;
315 	PHY_RESET(sc);
316 
317 	if (mii_phy_auto(sc, 0) == EJUSTRETURN)
318 		return (EJUSTRETURN);
319 
320 	/*
321 	 * Might need to generate a status message if autonegotiation
322 	 * failed.
323 	 */
324 	return (0);
325 }
326 
327 void
328 mii_phy_reset(struct mii_softc *sc)
329 {
330 	int reg, i;
331 
332 	if (sc->mii_flags & MIIF_NOISOLATE)
333 		reg = BMCR_RESET;
334 	else
335 		reg = BMCR_RESET | BMCR_ISO;
336 	PHY_WRITE(sc, MII_BMCR, reg);
337 
338 	/*
339 	 * It is best to allow a little time for the reset to settle
340 	 * in before we start polling the BMCR again.  Notably, the
341 	 * DP83840A manual states that there should be a 500us delay
342 	 * between asserting software reset and attempting MII serial
343 	 * operations.  Also, a DP83815 can get into a bad state on
344 	 * cable removal and reinsertion if we do not delay here.
345 	 */
346 	delay(500);
347 
348 	/* Wait another 100ms for it to complete. */
349 	for (i = 0; i < 100; i++) {
350 		reg = PHY_READ(sc, MII_BMCR);
351 		if ((reg & BMCR_RESET) == 0)
352 			break;
353 		delay(1000);
354 	}
355 
356 	if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
357 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
358 }
359 
360 void
361 mii_phy_down(struct mii_softc *sc)
362 {
363 
364 	if (sc->mii_flags & MIIF_DOINGAUTO) {
365 		sc->mii_flags &= ~MIIF_DOINGAUTO;
366 		callout_stop(&sc->mii_nway_ch);
367 	}
368 }
369 
370 void
371 mii_phy_status(struct mii_softc *sc)
372 {
373 
374 	PHY_STATUS(sc);
375 }
376 
377 void
378 mii_phy_update(struct mii_softc *sc, int cmd)
379 {
380 	struct mii_data *mii = sc->mii_pdata;
381 	int announce, s;
382 
383 	if (sc->mii_media_active != mii->mii_media_active ||
384 	    sc->mii_media_status != mii->mii_media_status ||
385 	    cmd == MII_MEDIACHG) {
386 		announce = mii_phy_statusmsg(sc);
387 		(*mii->mii_statchg)(sc->mii_dev.dv_parent);
388 		sc->mii_media_active = mii->mii_media_active;
389 		sc->mii_media_status = mii->mii_media_status;
390 
391 		if (announce) {
392 			s = splnet();
393 			rt_ifmsg(mii->mii_ifp);
394 			splx(s);
395 		}
396 	}
397 }
398 
399 int
400 mii_phy_statusmsg(struct mii_softc *sc)
401 {
402 	struct mii_data *mii = sc->mii_pdata;
403 	struct ifnet *ifp = mii->mii_ifp;
404 	int link_state, announce = 0;
405 	u_int baudrate;
406 
407 	if (mii->mii_media_status & IFM_AVALID) {
408 		if (mii->mii_media_status & IFM_ACTIVE)
409 			link_state = LINK_STATE_UP;
410 		else
411 			link_state = LINK_STATE_DOWN;
412 	} else
413 		link_state = LINK_STATE_UNKNOWN;
414 
415 	baudrate = ifmedia_baudrate(mii->mii_media_active);
416 
417 	if (link_state != ifp->if_link_state) {
418 		ifp->if_link_state = link_state;
419 		/*
420 		 * XXX Right here we'd like to notify protocols
421 		 * XXX that the link status has changed, so that
422 		 * XXX e.g. Duplicate Address Detection can restart.
423 		 */
424 		announce = 1;
425 	}
426 
427 	if (baudrate != ifp->if_baudrate) {
428 		ifp->if_baudrate = baudrate;
429 		announce = 1;
430 	}
431 
432 	return (announce);
433 }
434 
435 /*
436  * Initialize generic PHY media based on BMSR, called when a PHY is
437  * attached.  We expect to be set up to print a comma-separated list
438  * of media names.  Does not print a newline.
439  */
440 void
441 mii_phy_add_media(struct mii_softc *sc)
442 {
443 	struct mii_data *mii = sc->mii_pdata;
444 	const char *sep = "";
445 	int fdx = 0;
446 
447 #define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
448 #define	PRINT(n)	aprint_normal("%s%s", sep, (n)); sep = ", "
449 
450 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
451 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
452 		    MII_MEDIA_NONE);
453 
454 	/*
455 	 * There are different interpretations for the bits in
456 	 * HomePNA PHYs.  And there is really only one media type
457 	 * that is supported.
458 	 */
459 	if (sc->mii_flags & MIIF_IS_HPNA) {
460 		if (sc->mii_capabilities & BMSR_10THDX) {
461 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
462 					 sc->mii_inst),
463 			    MII_MEDIA_10_T);
464 			PRINT("HomePNA1");
465 		}
466 		return;
467 	}
468 
469 	if (sc->mii_capabilities & BMSR_10THDX) {
470 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
471 		    MII_MEDIA_10_T);
472 		PRINT("10baseT");
473 	}
474 	if (sc->mii_capabilities & BMSR_10TFDX) {
475 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
476 		    MII_MEDIA_10_T_FDX);
477 		PRINT("10baseT-FDX");
478 		fdx = 1;
479 	}
480 	if (sc->mii_capabilities & BMSR_100TXHDX) {
481 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
482 		    MII_MEDIA_100_TX);
483 		PRINT("100baseTX");
484 	}
485 	if (sc->mii_capabilities & BMSR_100TXFDX) {
486 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
487 		    MII_MEDIA_100_TX_FDX);
488 		PRINT("100baseTX-FDX");
489 		fdx = 1;
490 	}
491 	if (sc->mii_capabilities & BMSR_100T4) {
492 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
493 		    MII_MEDIA_100_T4);
494 		PRINT("100baseT4");
495 	}
496 
497 	if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
498 		/*
499 		 * XXX Right now only handle 1000SX and 1000TX.  Need
500 		 * XXX to handle 1000LX and 1000CX some how.
501 		 *
502 		 * Note since it can take 5 seconds to auto-negotiate
503 		 * a gigabit link, we make anegticks 10 seconds for
504 		 * all the gigabit media types.
505 		 */
506 		if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
507 			sc->mii_anegticks = 10;
508 			sc->mii_flags |= MIIF_IS_1000X;
509 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
510 			    sc->mii_inst), MII_MEDIA_1000_X);
511 			PRINT("1000baseSX");
512 		}
513 		if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
514 			sc->mii_anegticks = 10;
515 			sc->mii_flags |= MIIF_IS_1000X;
516 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
517 			    sc->mii_inst), MII_MEDIA_1000_X_FDX);
518 			PRINT("1000baseSX-FDX");
519 			fdx = 1;
520 		}
521 
522 		/*
523 		 * 1000baseT media needs to be able to manipulate
524 		 * master/slave mode.  We set IFM_ETH_MASTER in
525 		 * the "don't care mask" and filter it out when
526 		 * the media is set.
527 		 *
528 		 * All 1000baseT PHYs have a 1000baseT control register.
529 		 */
530 		if (sc->mii_extcapabilities & EXTSR_1000THDX) {
531 			sc->mii_anegticks = 10;
532 			sc->mii_flags |= MIIF_HAVE_GTCR;
533 			mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
534 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
535 			    sc->mii_inst), MII_MEDIA_1000_T);
536 			PRINT("1000baseT");
537 		}
538 		if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
539 			sc->mii_anegticks = 10;
540 			sc->mii_flags |= MIIF_HAVE_GTCR;
541 			mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
542 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
543 			    sc->mii_inst), MII_MEDIA_1000_T_FDX);
544 			PRINT("1000baseT-FDX");
545 			fdx = 1;
546 		}
547 	}
548 
549 	if (sc->mii_capabilities & BMSR_ANEG) {
550 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
551 		    MII_NMEDIA);	/* intentionally invalid index */
552 		PRINT("auto");
553 	}
554 #undef ADD
555 #undef PRINT
556 	if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE))
557 		mii->mii_media.ifm_mask |= IFM_ETH_FMASK;
558 }
559 
560 void
561 mii_phy_delete_media(struct mii_softc *sc)
562 {
563 	struct mii_data *mii = sc->mii_pdata;
564 
565 	ifmedia_delete_instance(&mii->mii_media, sc->mii_inst);
566 }
567 
568 int
569 mii_phy_activate(struct device *self, enum devact act)
570 {
571 	int rv = 0;
572 
573 	switch (act) {
574 	case DVACT_ACTIVATE:
575 		rv = EOPNOTSUPP;
576 		break;
577 
578 	case DVACT_DEACTIVATE:
579 		/* Nothing special to do. */
580 		break;
581 	}
582 
583 	return (rv);
584 }
585 
586 /* ARGSUSED1 */
587 int
588 mii_phy_detach(struct device *self, int flags)
589 {
590 	struct mii_softc *sc = (void *) self;
591 
592 	if (sc->mii_flags & MIIF_DOINGAUTO)
593 		callout_stop(&sc->mii_nway_ch);
594 
595 	mii_phy_delete_media(sc);
596 
597 	return (0);
598 }
599 
600 const struct mii_phydesc *
601 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
602 {
603 
604 	for (; mpd->mpd_name != NULL; mpd++) {
605 		if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
606 		    MII_MODEL(ma->mii_id2) == mpd->mpd_model)
607 			return (mpd);
608 	}
609 	return (NULL);
610 }
611 
612 /*
613  * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
614  */
615 u_int
616 mii_phy_flowstatus(struct mii_softc *sc)
617 {
618 	u_int anar, anlpar;
619 
620 	if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
621 		return (0);
622 
623 	anar = PHY_READ(sc, MII_ANAR);
624 	anlpar = PHY_READ(sc, MII_ANLPAR);
625 
626 	if ((anar & ANAR_X_PAUSE_SYM) & (anlpar & ANLPAR_X_PAUSE_SYM))
627 		return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
628 
629 	if ((anar & ANAR_X_PAUSE_SYM) == 0) {
630 		if ((anar & ANAR_X_PAUSE_ASYM) &&
631 		    ((anlpar &
632 		      ANLPAR_X_PAUSE_TOWARDS) == ANLPAR_X_PAUSE_TOWARDS))
633 			return (IFM_FLOW|IFM_ETH_TXPAUSE);
634 		else
635 			return (0);
636 	}
637 
638 	if ((anar & ANAR_X_PAUSE_ASYM) == 0) {
639 		if (anlpar & ANLPAR_X_PAUSE_SYM)
640 			return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
641 		else
642 			return (0);
643 	}
644 
645 	switch ((anlpar & ANLPAR_X_PAUSE_TOWARDS)) {
646 	case ANLPAR_X_PAUSE_NONE:
647 		return (0);
648 
649 	case ANLPAR_X_PAUSE_ASYM:
650 		return (IFM_FLOW|IFM_ETH_RXPAUSE);
651 
652 	default:
653 		return (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE);
654 	}
655 	/* NOTREACHED */
656 }
657