1 /* $NetBSD: makphyreg.h,v 1.1 2001/07/12 17:30:45 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_MII_MAKPHYREG_H_ 40 #define _DEV_MII_MAKPHYREG_H_ 41 42 /* 43 * Marvell 88E1000 ``Alaska'' 10/100/1000 PHY registers. 44 */ 45 46 #define MII_MAKPHY_PSCR 0x10 /* PHY specific control register */ 47 #define PSCR_DIS_JABBER (1U << 0) /* disable jabber */ 48 #define PSCR_POL_REV (1U << 1) /* polarity reversal */ 49 #define PSCR_SQE_TEST (1U << 2) /* SQE test */ 50 #define PSCR_MBO (1U << 3) /* must be one */ 51 #define PSCR_DIS_125CLK (1U << 4) /* 125CLK low */ 52 #define PSCR_MDI_XOVER_MODE(x) ((x) << 5) /* crossover mode */ 53 #define PSCR_LOW_10T_THRESH (1U << 7) /* lower 10BASE-T Rx treshold */ 54 #define PSCR_FORCE_LINK_GOOD (1U << 10) /* force link good */ 55 #define PSCR_CRS_ON_TX (1U << 11) /* assert CRS on transmit */ 56 #define PSCR_RX_FIFO(x) ((x) << 12) /* Rx FIFO depth */ 57 #define PSCR_TX_FIFO(x) ((x) << 14) /* Tx FIFO depth */ 58 59 #define XOVER_MODE_MDI 0 60 #define XOVER_MODE_MDIX 1 61 #define XOVER_MODE_AUTO 2 62 63 #define MII_MAKPHY_PSSR 0x11 /* PHY specific status register */ 64 #define PSSR_JABBER (1U << 0) /* jabber indication */ 65 #define PSSR_POLARITY (1U << 1) /* polarity indiciation */ 66 #define PSSR_MDIX (1U << 6) /* 1 = MIDX, 0 = MDI */ 67 #define PSSR_CABLE_LENGTH_get(x) (((x) >> 7) & 0x3) 68 #define PSSR_LINK (1U << 10) /* link indication */ 69 #define PSSR_RESOLVED (1U << 11) /* speed and duplex resolved */ 70 #define PSSR_PAGE_RECEIVED (1U << 12) /* page received */ 71 #define PSSR_DUPLEX (1U << 13) /* 1 = FDX */ 72 #define PSSR_SPEED_get(x) (((x) >> 14) & 0x3) 73 74 #define SPEED_10 0 75 #define SPEED_100 1 76 #define SPEED_1000 2 77 #define SPEED_reserved 3 78 79 #define MII_MAKPHY_IE 0x12 /* Interrupt enable */ 80 #define IE_JABBER (1U << 0) /* jabber indication */ 81 #define IE_POL_CHANGED (1U << 1) /* polarity changed */ 82 #define IE_MDI_XOVER_CHANGED (1U << 6) /* MDI/MDIX changed */ 83 #define IE_FIFO_OVER_UNDER (1U << 7) /* FIFO over/underflow */ 84 #define IE_FALSE_CARRIER (1U << 8) /* false carrier detected */ 85 #define IE_SYMBOL_ERROR (1U << 9) /* symbol error occurred */ 86 #define IE_LINK_CHANGED (1U << 10) /* link status changed */ 87 #define IE_ANEG_COMPLETE (1U << 11) /* autonegotiation completed */ 88 #define IE_PAGE_RECEIVED (1U << 12) /* page received */ 89 #define IE_DUPLEX_CHANGED (1U << 13) /* duplex changed */ 90 #define IE_SPEED_CHANGED (1U << 14) /* speed changed */ 91 #define IE_ANEG_ERROR (1U << 15) /* autonegotiation error occurred */ 92 93 #define MII_MAKPHY_IS 0x13 /* Interrupt status */ 94 /* See Interrupt enable bits */ 95 96 #define MII_MAKPHY_EPSC 0x14 /* extended PHY specific control */ 97 #define EPSC_TX_CLK(x) ((x) << 4) /* transmit clock */ 98 #define EPSC_TBI_RCLK_DIS (1U << 12) /* TBI RCLK disable */ 99 #define EPSC_TBI_RX_CLK125_EN (1U << 13) /* TBI RX_CLK125 enable */ 100 #define EPSC_LINK_DOWN_NO_IDLES (1U << 15) /* 1 = lost lock detect */ 101 102 #define MII_MAKPHY_REC 0x15 /* receive error counter */ 103 104 #define MII_MAKPHY_LEDCTRL 0x18 /* LED control */ 105 #define LEDCTRL_LED_TX (1U << 0) /* 1 = activ/link, 0 = xmit */ 106 #define LEDCTRL_LED_RX (1U << 1) /* 1 = activ/link, 1 = recv */ 107 #define LEDCTRL_LED_DUPLEX (1U << 2) /* 1 = duplex, 0 = dup/coll */ 108 #define LEDCTRL_LED_LINK (1U << 3) /* 1 = spd/link, 0 = link */ 109 #define LEDCTRL_BLINK_RATE(x) ((x) << 8) 110 #define LEDCTRL_PULSE_STRCH(x) ((x) << 12) 111 #define LEDCTRL_DISABLE (1U << 15) /* disable LED */ 112 113 #endif /* _DEV_MII_MAKPHYREG_H_ */ 114