1 /* $NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center, and by Frank van der Linden. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * Driver for Intel's 82577 (Hanksville) Ethernet 10/100/1000 PHY 59 * Data Sheet: http://download.intel.com/design/network/datashts/319439.pdf 60 */ 61 62 #include <sys/cdefs.h> 63 __KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $"); 64 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/device.h> 69 #include <sys/socket.h> 70 #include <sys/errno.h> 71 72 #include <net/if.h> 73 #include <net/if_media.h> 74 75 #include <dev/mii/mii.h> 76 #include <dev/mii/miivar.h> 77 #include <dev/mii/miidevs.h> 78 79 #include <dev/mii/ihphyreg.h> 80 81 static int ihphymatch(device_t, cfdata_t, void *); 82 static void ihphyattach(device_t, device_t, void *); 83 84 CFATTACH_DECL3_NEW(ihphy, sizeof(struct mii_softc), 85 ihphymatch, ihphyattach, mii_phy_detach, mii_phy_activate, NULL, NULL, 86 DVF_DETACH_SHUTDOWN); 87 88 static int ihphy_service(struct mii_softc *, struct mii_data *, int); 89 static void ihphy_status(struct mii_softc *); 90 static void ihphy_reset(struct mii_softc *); 91 92 static const struct mii_phy_funcs ihphy_funcs = { 93 ihphy_service, ihphy_status, ihphy_reset, 94 }; 95 96 static const struct mii_phydesc ihphys[] = { 97 MII_PHY_DESC(INTEL, I82577), 98 MII_PHY_DESC(INTEL, I82579), 99 MII_PHY_DESC(INTEL, I217), 100 MII_PHY_DESC(INTEL, I82580), 101 MII_PHY_DESC(INTEL, I350), 102 MII_PHY_END, 103 }; 104 105 static int 106 ihphymatch(device_t parent, cfdata_t match, void *aux) 107 { 108 struct mii_attach_args *ma = aux; 109 110 if (mii_phy_match(ma, ihphys) != NULL) 111 return 10; 112 113 return 0; 114 } 115 116 static void 117 ihphyattach(device_t parent, device_t self, void *aux) 118 { 119 struct mii_softc *sc = device_private(self); 120 struct mii_attach_args *ma = aux; 121 struct mii_data *mii = ma->mii_data; 122 const struct mii_phydesc *mpd; 123 uint16_t reg; 124 125 mpd = mii_phy_match(ma, ihphys); 126 aprint_naive(": Media interface\n"); 127 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 128 129 sc->mii_dev = self; 130 sc->mii_inst = mii->mii_instance; 131 sc->mii_phy = ma->mii_phyno; 132 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 133 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 134 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 135 sc->mii_funcs = &ihphy_funcs; 136 sc->mii_pdata = mii; 137 sc->mii_flags = ma->mii_flags; 138 sc->mii_anegticks = MII_ANEGTICKS; 139 140 PHY_RESET(sc); 141 142 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 143 sc->mii_capabilities &= ma->mii_capmask; 144 if (sc->mii_capabilities & BMSR_EXTSTAT) 145 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities); 146 aprint_normal_dev(self, ""); 147 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 148 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) 149 aprint_error("no media present"); 150 else 151 mii_phy_add_media(sc); 152 aprint_normal("\n"); 153 154 /* Link setup (as done by Intel's Linux driver for the 82577). */ 155 PHY_READ(sc, IHPHY_MII_CFG, ®); 156 reg |= IHPHY_CFG_TX_CRS; 157 reg |= IHPHY_CFG_DOWN_SHIFT; 158 PHY_WRITE(sc, IHPHY_MII_CFG, reg); 159 } 160 161 static int 162 ihphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 163 { 164 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 165 uint16_t reg; 166 167 switch (cmd) { 168 case MII_POLLSTAT: 169 /* If we're not polling our PHY instance, just return. */ 170 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 171 return 0; 172 break; 173 174 case MII_MEDIACHG: 175 /* 176 * If the media indicates a different PHY instance, 177 * isolate ourselves. 178 */ 179 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 180 PHY_READ(sc, MII_BMCR, ®); 181 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 182 return 0; 183 } 184 185 /* If the interface is not up, don't do anything. */ 186 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 187 break; 188 189 /* If media is deselected, disable link (standby). */ 190 PHY_READ(sc, IHPHY_MII_ECR, ®); 191 if (IFM_SUBTYPE(ife->ifm_media) == IFM_NONE) 192 reg &= ~IHPHY_ECR_LNK_EN; 193 else 194 reg |= IHPHY_ECR_LNK_EN; 195 PHY_WRITE(sc, IHPHY_MII_ECR, reg); 196 197 /* XXX Adjust MDI/MDIX configuration? Other settings? */ 198 199 mii_phy_setmedia(sc); 200 break; 201 202 case MII_TICK: 203 /* If we're not currently selected, just return. */ 204 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 205 return 0; 206 207 if (mii_phy_tick(sc) == EJUSTRETURN) 208 return 0; 209 break; 210 211 case MII_DOWN: 212 mii_phy_down(sc); 213 PHY_WRITE(sc, MII_BMCR, BMCR_PDOWN); 214 return 0; 215 } 216 217 /* Update the media status. */ 218 mii_phy_status(sc); 219 220 /* Callback if something changed. */ 221 mii_phy_update(sc, cmd); 222 return 0; 223 } 224 225 static void 226 ihphy_status(struct mii_softc *sc) 227 { 228 struct mii_data *mii = sc->mii_pdata; 229 uint16_t esr, bmcr, gtsr; 230 231 mii->mii_media_status = IFM_AVALID; 232 mii->mii_media_active = IFM_ETHER; 233 234 PHY_READ(sc, IHPHY_MII_ESR, &esr); 235 236 if (esr & IHPHY_ESR_LINK) 237 mii->mii_media_status |= IFM_ACTIVE; 238 239 PHY_READ(sc, MII_BMCR, &bmcr); 240 if (bmcr & (BMCR_ISO | BMCR_PDOWN)) { 241 mii->mii_media_active |= IFM_NONE; 242 mii->mii_media_status = 0; 243 return; 244 } 245 246 if (bmcr & BMCR_LOOP) 247 mii->mii_media_active |= IFM_LOOP; 248 249 if (bmcr & BMCR_AUTOEN) { 250 if ((esr & IHPHY_ESR_ANEG_STAT) == 0) { 251 /* Erg, still trying, I guess... */ 252 mii->mii_media_active |= IFM_NONE; 253 return; 254 } 255 } 256 257 switch (esr & IHPHY_ESR_SPEED) { 258 case IHPHY_SPEED_1000: 259 mii->mii_media_active |= IFM_1000_T; 260 PHY_READ(sc, MII_100T2SR, >sr); 261 if (gtsr & GTSR_MS_RES) 262 mii->mii_media_active |= IFM_ETH_MASTER; 263 break; 264 265 case IHPHY_SPEED_100: 266 /* 100BASE-T2 and 100BASE-T4 are not supported. */ 267 mii->mii_media_active |= IFM_100_TX; 268 break; 269 270 case IHPHY_SPEED_10: 271 mii->mii_media_active |= IFM_10_T; 272 break; 273 274 default: 275 mii->mii_media_active |= IFM_NONE; 276 mii->mii_media_status = 0; 277 return; 278 } 279 280 if (esr & IHPHY_ESR_DUPLEX) 281 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); 282 else 283 mii->mii_media_active |= IFM_HDX; 284 } 285 286 static void 287 ihphy_reset(struct mii_softc *sc) 288 { 289 int i; 290 uint16_t reg; 291 292 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO); 293 294 /* 295 * Regarding reset, the data sheet specifies (page 55): 296 * 297 * "After PHY reset, a delay of 10 ms is required before 298 * any register access using MDIO." 299 */ 300 delay(10000); 301 302 /* Wait another 100ms for it to complete. */ 303 for (i = 0; i < 100; i++) { 304 PHY_READ(sc, MII_BMCR, ®); 305 if ((reg & BMCR_RESET) == 0) 306 break; 307 delay(1000); 308 } 309 310 if (sc->mii_inst != 0) 311 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 312 } 313