xref: /netbsd-src/sys/dev/mii/ihphy.c (revision b757af438b42b93f8c6571f026d8b8ef3eaf5fc9)
1 /*	$NetBSD: ihphy.c,v 1.2 2011/05/20 06:06:59 msaitoh Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center, and by Frank van der Linden.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55  */
56 
57 /*
58  * Driver for Intel's 82577 (Hanksville) Ethernet 10/100/1000 PHY
59  * Data Sheet: http://download.intel.com/design/network/datashts/319439.pdf
60  */
61 
62 #include <sys/cdefs.h>
63 __KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.2 2011/05/20 06:06:59 msaitoh Exp $");
64 
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/kernel.h>
68 #include <sys/device.h>
69 #include <sys/socket.h>
70 #include <sys/errno.h>
71 
72 #include <net/if.h>
73 #include <net/if_media.h>
74 
75 #include <dev/mii/mii.h>
76 #include <dev/mii/miivar.h>
77 #include <dev/mii/miidevs.h>
78 
79 #include <dev/mii/ihphyreg.h>
80 
81 static int	ihphymatch(device_t, cfdata_t, void *);
82 static void	ihphyattach(device_t, device_t, void *);
83 
84 CFATTACH_DECL3_NEW(ihphy, sizeof(struct mii_softc),
85     ihphymatch, ihphyattach, mii_phy_detach, mii_phy_activate, NULL, NULL,
86     DVF_DETACH_SHUTDOWN);
87 
88 static int	ihphy_service(struct mii_softc *, struct mii_data *, int);
89 static void	ihphy_status(struct mii_softc *);
90 static void	ihphy_reset(struct mii_softc *);
91 
92 static const struct mii_phy_funcs ihphy_funcs = {
93 	ihphy_service, ihphy_status, ihphy_reset,
94 };
95 
96 static const struct mii_phydesc ihphys[] = {
97 	{ MII_OUI_INTEL,		MII_MODEL_INTEL_I82577,
98 	  MII_STR_INTEL_I82577 },
99 	{ MII_OUI_INTEL,		MII_MODEL_INTEL_I82579,
100 	  MII_STR_INTEL_I82579 },
101 
102 	{ 0,				0,
103 	  NULL },
104 };
105 
106 static int
107 ihphymatch(device_t parent, cfdata_t match, void *aux)
108 {
109 	struct mii_attach_args *ma = aux;
110 
111 	if (mii_phy_match(ma, ihphys) != NULL)
112 		return 10;
113 
114 	return 0;
115 }
116 
117 static void
118 ihphyattach(device_t parent, device_t self, void *aux)
119 {
120 	struct mii_softc *sc = device_private(self);
121 	struct mii_attach_args *ma = aux;
122 	struct mii_data *mii = ma->mii_data;
123 	const struct mii_phydesc *mpd;
124 	int reg;
125 
126 	mpd = mii_phy_match(ma, ihphys);
127 	aprint_naive(": Media interface\n");
128 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
129 
130 	sc->mii_dev = self;
131 	sc->mii_inst = mii->mii_instance;
132 	sc->mii_phy = ma->mii_phyno;
133 	sc->mii_funcs = &ihphy_funcs;
134 	sc->mii_pdata = mii;
135 	sc->mii_flags = ma->mii_flags;
136 	sc->mii_anegticks = MII_ANEGTICKS;
137 
138 	PHY_RESET(sc);
139 
140 	sc->mii_capabilities =
141 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
142 	if (sc->mii_capabilities & BMSR_EXTSTAT)
143 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
144 	aprint_normal_dev(self, "");
145 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
146 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
147 		aprint_error("no media present");
148 	else
149 		mii_phy_add_media(sc);
150 	aprint_normal("\n");
151 
152 	/*
153 	 * Link setup (as done by Intel's Linux driver for the 82577).
154 	 */
155 	reg = PHY_READ(sc, IHPHY_MII_CFG);
156 	reg |= IHPHY_CFG_TX_CRS;
157 	reg |= IHPHY_CFG_DOWN_SHIFT;
158 	PHY_WRITE(sc, IHPHY_MII_CFG, reg);
159 }
160 
161 static int
162 ihphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
163 {
164 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
165 	int reg;
166 
167 	switch (cmd) {
168 	case MII_POLLSTAT:
169 		/*
170 		 * If we're not polling our PHY instance, just return.
171 		 */
172 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
173 			return 0;
174 		break;
175 
176 	case MII_MEDIACHG:
177 		/*
178 		 * If the media indicates a different PHY instance,
179 		 * isolate ourselves.
180 		 */
181 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
182 			reg = PHY_READ(sc, MII_BMCR);
183 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
184 			return 0;
185 		}
186 
187 		/*
188 		 * If the interface is not up, don't do anything.
189 		 */
190 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
191 			break;
192 
193 		/*
194 		 * If media is deselected, disable link (standby).
195 		 */
196 		reg = PHY_READ(sc, IHPHY_MII_ECR);
197 		if (IFM_SUBTYPE(ife->ifm_media) == IFM_NONE)
198 			reg &= ~IHPHY_ECR_LNK_EN;
199 		else
200 			reg |= IHPHY_ECR_LNK_EN;
201 		PHY_WRITE(sc, IHPHY_MII_ECR, reg);
202 
203 		/*
204 		 * XXX Adjust MDI/MDIX configuration?  Other settings?
205 		 */
206 
207 		mii_phy_setmedia(sc);
208 		break;
209 
210 	case MII_TICK:
211 		/*
212 		 * If we're not currently selected, just return.
213 		 */
214 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
215 			return 0;
216 
217 		/*
218 		 * Only used for autonegotiation.
219 		 */
220 		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
221 			return 0;
222 
223 		if (mii_phy_tick(sc) == EJUSTRETURN)
224 			return 0;
225 		break;
226 
227 	case MII_DOWN:
228 		mii_phy_down(sc);
229 		PHY_WRITE(sc, MII_BMCR, BMCR_PDOWN);
230 		return 0;
231 	}
232 
233 	/* Update the media status. */
234 	mii_phy_status(sc);
235 
236 	/* Callback if something changed. */
237 	mii_phy_update(sc, cmd);
238 	return 0;
239 }
240 
241 static void
242 ihphy_status(struct mii_softc *sc)
243 {
244 	struct mii_data *mii = sc->mii_pdata;
245 	int esr, bmcr, gtsr;
246 
247 	mii->mii_media_status = IFM_AVALID;
248 	mii->mii_media_active = IFM_ETHER;
249 
250 	esr = PHY_READ(sc, IHPHY_MII_ESR);
251 
252 	if (esr & IHPHY_ESR_LINK)
253 		mii->mii_media_status |= IFM_ACTIVE;
254 
255 	bmcr = PHY_READ(sc, MII_BMCR);
256 	if (bmcr & (BMCR_ISO | BMCR_PDOWN)) {
257 		mii->mii_media_active |= IFM_NONE;
258 		mii->mii_media_status = 0;
259 		return;
260 	}
261 
262 	if (bmcr & BMCR_LOOP)
263 		mii->mii_media_active |= IFM_LOOP;
264 
265 	if (bmcr & BMCR_AUTOEN) {
266 		if ((esr & IHPHY_ESR_ANEG_STAT) == 0) {
267 			/* Erg, still trying, I guess... */
268 			mii->mii_media_active |= IFM_NONE;
269 			return;
270 		}
271 	}
272 
273 	switch (esr & IHPHY_ESR_SPEED) {
274 	case IHPHY_SPEED_1000:
275 		mii->mii_media_active |= IFM_1000_T;
276 		gtsr = PHY_READ(sc, MII_100T2SR);
277 		if (gtsr & GTSR_MS_RES)
278 			mii->mii_media_active |= IFM_ETH_MASTER;
279 		break;
280 
281 	case IHPHY_SPEED_100:
282 		/* 100BASE-T2 and 100BASE-T4 are not supported. */
283 		mii->mii_media_active |= IFM_100_TX;
284 		break;
285 
286 	case IHPHY_SPEED_10:
287 		mii->mii_media_active |= IFM_10_T;
288 		break;
289 
290 	default:
291 		mii->mii_media_active |= IFM_NONE;
292 		mii->mii_media_status = 0;
293 		return;
294 	}
295 
296 	if (esr & IHPHY_ESR_DUPLEX)
297 		mii->mii_media_active |=
298 		    IFM_FDX | mii_phy_flowstatus(sc);
299 }
300 
301 static void
302 ihphy_reset(struct mii_softc *sc)
303 {
304 	int reg, i;
305 
306 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
307 
308 	/*
309 	 * Regarding reset, the data sheet specifies (page 55):
310 	 *
311 	 * "After PHY reset, a delay of 10 ms is required before
312 	 *  any register access using MDIO."
313 	 */
314 	delay(10000);
315 
316 	/* Wait another 100ms for it to complete. */
317 	for (i = 0; i < 100; i++) {
318 		reg = PHY_READ(sc, MII_BMCR);
319 		if ((reg & BMCR_RESET) == 0)
320 			break;
321 		delay(1000);
322 	}
323 
324 	if (sc->mii_inst != 0)
325 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
326 }
327