1 /* $NetBSD: ihphy.c,v 1.19 2020/11/04 09:15:10 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center, and by Frank van der Linden. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * Driver for Intel's 82577 (Hanksville) Ethernet 10/100/1000 PHY 59 * Data Sheet: http://download.intel.com/design/network/datashts/319439.pdf 60 */ 61 62 #include <sys/cdefs.h> 63 __KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.19 2020/11/04 09:15:10 msaitoh Exp $"); 64 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/device.h> 69 #include <sys/socket.h> 70 #include <sys/errno.h> 71 72 #include <net/if.h> 73 #include <net/if_media.h> 74 75 #include <dev/mii/mii.h> 76 #include <dev/mii/miivar.h> 77 #include <dev/mii/miidevs.h> 78 79 #include <dev/mii/ihphyreg.h> 80 81 static int ihphymatch(device_t, cfdata_t, void *); 82 static void ihphyattach(device_t, device_t, void *); 83 84 CFATTACH_DECL_NEW(ihphy, sizeof(struct mii_softc), 85 ihphymatch, ihphyattach, mii_phy_detach, mii_phy_activate); 86 87 static int ihphy_service(struct mii_softc *, struct mii_data *, int); 88 static void ihphy_status(struct mii_softc *); 89 static void ihphy_reset(struct mii_softc *); 90 91 static const struct mii_phy_funcs ihphy_funcs = { 92 ihphy_service, ihphy_status, ihphy_reset, 93 }; 94 95 static const struct mii_phydesc ihphys[] = { 96 MII_PHY_DESC(INTEL, I82577), 97 MII_PHY_DESC(INTEL, I82579), 98 MII_PHY_DESC(INTEL, I217), 99 MII_PHY_DESC(INTEL, I82580), 100 MII_PHY_DESC(INTEL, I350), 101 MII_PHY_END, 102 }; 103 104 static int 105 ihphymatch(device_t parent, cfdata_t match, void *aux) 106 { 107 struct mii_attach_args *ma = aux; 108 109 if (mii_phy_match(ma, ihphys) != NULL) 110 return 10; 111 112 return 0; 113 } 114 115 static void 116 ihphyattach(device_t parent, device_t self, void *aux) 117 { 118 struct mii_softc *sc = device_private(self); 119 struct mii_attach_args *ma = aux; 120 struct mii_data *mii = ma->mii_data; 121 const struct mii_phydesc *mpd; 122 uint16_t reg; 123 124 mpd = mii_phy_match(ma, ihphys); 125 aprint_naive(": Media interface\n"); 126 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 127 128 sc->mii_dev = self; 129 sc->mii_inst = mii->mii_instance; 130 sc->mii_phy = ma->mii_phyno; 131 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 132 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 133 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 134 sc->mii_funcs = &ihphy_funcs; 135 sc->mii_pdata = mii; 136 sc->mii_flags = ma->mii_flags; 137 138 mii_lock(mii); 139 140 PHY_RESET(sc); 141 142 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 143 sc->mii_capabilities &= ma->mii_capmask; 144 if (sc->mii_capabilities & BMSR_EXTSTAT) 145 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities); 146 147 mii_unlock(mii); 148 149 mii_phy_add_media(sc); 150 151 mii_lock(mii); 152 /* Link setup (as done by Intel's Linux driver for the 82577). */ 153 PHY_READ(sc, IHPHY_MII_CFG, ®); 154 reg |= IHPHY_CFG_TX_CRS; 155 reg |= IHPHY_CFG_DOWN_SHIFT; 156 PHY_WRITE(sc, IHPHY_MII_CFG, reg); 157 mii_unlock(mii); 158 } 159 160 static int 161 ihphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 162 { 163 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 164 uint16_t reg; 165 166 KASSERT(mii_locked(mii)); 167 168 switch (cmd) { 169 case MII_POLLSTAT: 170 /* If we're not polling our PHY instance, just return. */ 171 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 172 return 0; 173 break; 174 175 case MII_MEDIACHG: 176 /* 177 * If the media indicates a different PHY instance, 178 * isolate ourselves. 179 */ 180 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 181 PHY_READ(sc, MII_BMCR, ®); 182 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 183 return 0; 184 } 185 186 /* If the interface is not up, don't do anything. */ 187 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 188 break; 189 190 /* If media is deselected, disable link (standby). */ 191 PHY_READ(sc, IHPHY_MII_ECR, ®); 192 if (IFM_SUBTYPE(ife->ifm_media) == IFM_NONE) 193 reg &= ~IHPHY_ECR_LNK_EN; 194 else 195 reg |= IHPHY_ECR_LNK_EN; 196 PHY_WRITE(sc, IHPHY_MII_ECR, reg); 197 198 /* XXX Adjust MDI/MDIX configuration? Other settings? */ 199 200 mii_phy_setmedia(sc); 201 break; 202 203 case MII_TICK: 204 /* If we're not currently selected, just return. */ 205 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 206 return 0; 207 208 if (mii_phy_tick(sc) == EJUSTRETURN) 209 return 0; 210 break; 211 212 case MII_DOWN: 213 mii_phy_down(sc); 214 PHY_WRITE(sc, MII_BMCR, BMCR_PDOWN); 215 return 0; 216 } 217 218 /* Update the media status. */ 219 mii_phy_status(sc); 220 221 /* Callback if something changed. */ 222 mii_phy_update(sc, cmd); 223 return 0; 224 } 225 226 static void 227 ihphy_status(struct mii_softc *sc) 228 { 229 struct mii_data *mii = sc->mii_pdata; 230 uint16_t esr, bmcr, gtsr; 231 232 KASSERT(mii_locked(mii)); 233 234 mii->mii_media_status = IFM_AVALID; 235 mii->mii_media_active = IFM_ETHER; 236 237 PHY_READ(sc, IHPHY_MII_ESR, &esr); 238 239 if (esr & IHPHY_ESR_LINK) 240 mii->mii_media_status |= IFM_ACTIVE; 241 242 PHY_READ(sc, MII_BMCR, &bmcr); 243 if (bmcr & (BMCR_ISO | BMCR_PDOWN)) { 244 mii->mii_media_active |= IFM_NONE; 245 return; 246 } 247 248 if (bmcr & BMCR_LOOP) 249 mii->mii_media_active |= IFM_LOOP; 250 251 if (bmcr & BMCR_AUTOEN) { 252 if ((esr & IHPHY_ESR_ANEG_STAT) == 0) { 253 /* Erg, still trying, I guess... */ 254 mii->mii_media_active |= IFM_NONE; 255 return; 256 } 257 } 258 259 switch (esr & IHPHY_ESR_SPEED) { 260 case IHPHY_SPEED_1000: 261 mii->mii_media_active |= IFM_1000_T; 262 PHY_READ(sc, MII_100T2SR, >sr); 263 if (gtsr & GTSR_MS_RES) 264 mii->mii_media_active |= IFM_ETH_MASTER; 265 break; 266 267 case IHPHY_SPEED_100: 268 /* 100BASE-T2 and 100BASE-T4 are not supported. */ 269 mii->mii_media_active |= IFM_100_TX; 270 break; 271 272 case IHPHY_SPEED_10: 273 mii->mii_media_active |= IFM_10_T; 274 break; 275 276 default: 277 mii->mii_media_active |= IFM_NONE; 278 mii->mii_media_status = 0; 279 return; 280 } 281 282 if (esr & IHPHY_ESR_DUPLEX) 283 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); 284 else 285 mii->mii_media_active |= IFM_HDX; 286 } 287 288 static void 289 ihphy_reset(struct mii_softc *sc) 290 { 291 int i; 292 uint16_t reg; 293 294 KASSERT(mii_locked(sc->mii_pdata)); 295 296 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO); 297 298 /* Wait another 100ms for it to complete. */ 299 for (i = 0; i < 100; i++) { 300 PHY_READ(sc, MII_BMCR, ®); 301 if ((reg & BMCR_RESET) == 0) 302 break; 303 delay(1000); 304 } 305 306 if (sc->mii_inst != 0) 307 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 308 } 309