xref: /netbsd-src/sys/dev/mii/brgphy.c (revision 21e37cc72a480a47828990a439cde7ac9ffaf0c6)
1 /*	$NetBSD: brgphy.c,v 1.20 2004/04/11 15:40:56 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by Manuel Bouyer.
54  * 4. The name of the author may not be used to endorse or promote products
55  *    derived from this software without specific prior written permission.
56  *
57  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67  */
68 
69 /*
70  * driver for the Broadcom BCM5400 Gig-E PHY.
71  *
72  * Programming information for this PHY was gleaned from FreeBSD
73  * (they were apparently able to get a datasheet from Broadcom).
74  */
75 
76 #include <sys/cdefs.h>
77 __KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.20 2004/04/11 15:40:56 thorpej Exp $");
78 
79 #include <sys/param.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/device.h>
83 #include <sys/socket.h>
84 #include <sys/errno.h>
85 
86 #include <net/if.h>
87 #include <net/if_media.h>
88 
89 #include <dev/mii/mii.h>
90 #include <dev/mii/miivar.h>
91 #include <dev/mii/miidevs.h>
92 
93 #include <dev/mii/brgphyreg.h>
94 
95 int	brgphymatch(struct device *, struct cfdata *, void *);
96 void	brgphyattach(struct device *, struct device *, void *);
97 
98 CFATTACH_DECL(brgphy, sizeof(struct mii_softc),
99     brgphymatch, brgphyattach, mii_phy_detach, mii_phy_activate);
100 
101 int	brgphy_service(struct mii_softc *, struct mii_data *, int);
102 void	brgphy_status(struct mii_softc *);
103 
104 void	brgphy_5401_reset(struct mii_softc *);
105 void	brgphy_5411_reset(struct mii_softc *);
106 void	brgphy_5703_reset(struct mii_softc *);
107 void	brgphy_5704_reset(struct mii_softc *);
108 void	brgphy_5705_reset(struct mii_softc *);
109 
110 const struct mii_phy_funcs brgphy_funcs = {
111 	brgphy_service, brgphy_status, mii_phy_reset,
112 };
113 
114 const struct mii_phy_funcs brgphy_5401_funcs = {
115 	brgphy_service, brgphy_status, brgphy_5401_reset,
116 };
117 
118 const struct mii_phy_funcs brgphy_5411_funcs = {
119 	brgphy_service, brgphy_status, brgphy_5411_reset,
120 };
121 
122 const struct mii_phy_funcs brgphy_5703_funcs = {
123 	brgphy_service, brgphy_status, brgphy_5703_reset,
124 };
125 
126 const struct mii_phy_funcs brgphy_5704_funcs = {
127 	brgphy_service, brgphy_status, brgphy_5704_reset,
128 };
129 
130 const struct mii_phy_funcs brgphy_5705_funcs = {
131 	brgphy_service, brgphy_status, brgphy_5705_reset,
132 };
133 
134 
135 const struct mii_phydesc brgphys[] = {
136 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5400,
137 	  MII_STR_BROADCOM_BCM5400 },
138 
139 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5401,
140 	  MII_STR_BROADCOM_BCM5401 },
141 
142 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5411,
143 	  MII_STR_BROADCOM_BCM5411 },
144 
145 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5421,
146 	  MII_STR_BROADCOM_BCM5421 },
147 
148 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5701,
149 	  MII_STR_BROADCOM_BCM5701 },
150 
151 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5703,
152 	  MII_STR_BROADCOM_BCM5703 },
153 
154 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5704,
155 	  MII_STR_BROADCOM_BCM5704 },
156 
157 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5705,
158 	  MII_STR_BROADCOM_BCM5705 },
159 
160 	{ 0,				0,
161 	  NULL },
162 };
163 
164 static void bcm5401_load_dspcode(struct mii_softc *);
165 static void bcm5411_load_dspcode(struct mii_softc *);
166 static void bcm5703_load_dspcode(struct mii_softc *);
167 static void bcm5704_load_dspcode(struct mii_softc *);
168 
169 int
170 brgphymatch(struct device *parent, struct cfdata *match, void *aux)
171 {
172 	struct mii_attach_args *ma = aux;
173 
174 	if (mii_phy_match(ma, brgphys) != NULL)
175 		return (10);
176 
177 	return (0);
178 }
179 
180 void
181 brgphyattach(struct device *parent, struct device *self, void *aux)
182 {
183 	struct mii_softc *sc = (struct mii_softc *)self;
184 	struct mii_attach_args *ma = aux;
185 	struct mii_data *mii = ma->mii_data;
186 	const struct mii_phydesc *mpd;
187 
188 	mpd = mii_phy_match(ma, brgphys);
189 	aprint_naive(": Media interface\n");
190 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
191 
192 	sc->mii_inst = mii->mii_instance;
193 	sc->mii_phy = ma->mii_phyno;
194 	sc->mii_pdata = mii;
195 	sc->mii_flags = ma->mii_flags;
196 	sc->mii_anegticks = 5;
197 
198 	switch (MII_MODEL(ma->mii_id2)) {
199 	case MII_MODEL_BROADCOM_BCM5400:
200 		sc->mii_funcs = &brgphy_5401_funcs;
201 		aprint_normal("%s: using BCM5401 DSP patch\n",
202 		    sc->mii_dev.dv_xname);
203 		break;
204 
205 	case MII_MODEL_BROADCOM_BCM5401:
206 		if (MII_REV(ma->mii_id2) == 1 || MII_REV(ma->mii_id2) == 3) {
207 			sc->mii_funcs = &brgphy_5401_funcs;
208 			aprint_normal("%s: using BCM5401 DSP patch\n",
209 			    sc->mii_dev.dv_xname);
210 		} else
211 			sc->mii_funcs = &brgphy_funcs;
212 		break;
213 
214 	case MII_MODEL_BROADCOM_BCM5411:
215 		sc->mii_funcs = &brgphy_5411_funcs;
216 		aprint_normal("%s: using BCM5411 DSP patch\n",
217 		    sc->mii_dev.dv_xname);
218 		break;
219 
220 #ifdef notyet /* unverified, untested */
221 	case MII_MODEL_BROADCOM_BCM5703:
222 		sc->mii_funcs = &brgphy_5703_funcs;
223 		aprint_normal("%s: using BCM5703 DSP patch\n",
224 		    sc->mii_dev.dv_xname);
225 		break;
226 #endif
227 
228 	case MII_MODEL_BROADCOM_BCM5704:
229 		sc->mii_funcs = &brgphy_5704_funcs;
230 		aprint_normal("%s: using BCM5704 DSP patch\n",
231 		    sc->mii_dev.dv_xname);
232 		break;
233 
234 	case MII_MODEL_BROADCOM_BCM5705:
235 		sc->mii_funcs = &brgphy_5705_funcs;
236 		break;
237 
238 	default:
239 		sc->mii_funcs = &brgphy_funcs;
240 		break;
241 	}
242 
243 	PHY_RESET(sc);
244 
245 	sc->mii_capabilities =
246 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
247 	if (sc->mii_capabilities & BMSR_EXTSTAT)
248 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
249 
250 	aprint_normal("%s: ", sc->mii_dev.dv_xname);
251 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
252 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
253 		aprint_error("no media present");
254 	else
255 		mii_phy_add_media(sc);
256 	aprint_normal("\n");
257 }
258 
259 int
260 brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
261 {
262 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
263 	int reg;
264 
265 	switch (cmd) {
266 	case MII_POLLSTAT:
267 		/*
268 		 * If we're not polling our PHY instance, just return.
269 		 */
270 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
271 			return (0);
272 		break;
273 
274 	case MII_MEDIACHG:
275 		/*
276 		 * If the media indicates a different PHY instance,
277 		 * isolate ourselves.
278 		 */
279 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
280 			reg = PHY_READ(sc, MII_BMCR);
281 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
282 			return (0);
283 		}
284 
285 		/*
286 		 * If the interface is not up, don't do anything.
287 		 */
288 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
289 			break;
290 
291 		if (sc->mii_funcs != &brgphy_5705_funcs)
292 			mii_phy_reset(sc);    /* XXX hardware bug work-around */
293 		mii_phy_setmedia(sc);
294 		break;
295 
296 	case MII_TICK:
297 		/*
298 		 * If we're not currently selected, just return.
299 		 */
300 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
301 			return (0);
302 
303 		if (mii_phy_tick(sc) == EJUSTRETURN)
304 			return (0);
305 		break;
306 
307 	case MII_DOWN:
308 		mii_phy_down(sc);
309 		return (0);
310 	}
311 
312 	/* Update the media status. */
313 	mii_phy_status(sc);
314 
315 	/*
316 	 * Callback if something changed.  Note that we need to poke
317 	 * the DSP on the Broadcom PHYs if the media changes.
318 	 */
319 	if (sc->mii_media_active != mii->mii_media_active ||
320 	    sc->mii_media_status != mii->mii_media_status ||
321 	    cmd == MII_MEDIACHG) {
322 		mii_phy_update(sc, cmd);
323 		if (sc->mii_funcs == &brgphy_5401_funcs)
324 			bcm5401_load_dspcode(sc);
325 		else if (sc->mii_funcs == &brgphy_5411_funcs)
326 			bcm5411_load_dspcode(sc);
327 	}
328 	return (0);
329 }
330 
331 void
332 brgphy_status(struct mii_softc *sc)
333 {
334 	struct mii_data *mii = sc->mii_pdata;
335 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
336 	int bmcr, auxsts, gtsr;
337 
338 	mii->mii_media_status = IFM_AVALID;
339 	mii->mii_media_active = IFM_ETHER;
340 
341 	auxsts = PHY_READ(sc, BRGPHY_MII_AUXSTS);
342 
343 	if (auxsts & BRGPHY_AUXSTS_LINK)
344 		mii->mii_media_status |= IFM_ACTIVE;
345 
346 	bmcr = PHY_READ(sc, MII_BMCR);
347 	if (bmcr & BMCR_ISO) {
348 		mii->mii_media_active |= IFM_NONE;
349 		mii->mii_media_status = 0;
350 		return;
351 	}
352 
353 	if (bmcr & BMCR_LOOP)
354 		mii->mii_media_active |= IFM_LOOP;
355 
356 	if (bmcr & BMCR_AUTOEN) {
357 		/*
358 		 * The media status bits are only valid of autonegotiation
359 		 * has completed (or it's disabled).
360 		 */
361 		if ((auxsts & BRGPHY_AUXSTS_ACOMP) == 0) {
362 			/* Erg, still trying, I guess... */
363 			mii->mii_media_active |= IFM_NONE;
364 			return;
365 		}
366 
367 		switch (auxsts & BRGPHY_AUXSTS_AN_RES) {
368 		case BRGPHY_RES_1000FD:
369 			mii->mii_media_active |= IFM_1000_T|IFM_FDX;
370 			gtsr = PHY_READ(sc, MII_100T2SR);
371 			if (gtsr & GTSR_MS_RES)
372 				mii->mii_media_active |= IFM_ETH_MASTER;
373 			break;
374 
375 		case BRGPHY_RES_1000HD:
376 			mii->mii_media_active |= IFM_1000_T;
377 			gtsr = PHY_READ(sc, MII_100T2SR);
378 			if (gtsr & GTSR_MS_RES)
379 				mii->mii_media_active |= IFM_ETH_MASTER;
380 			break;
381 
382 		case BRGPHY_RES_100FD:
383 			mii->mii_media_active |= IFM_100_TX|IFM_FDX;
384 			break;
385 
386 		case BRGPHY_RES_100T4:
387 			mii->mii_media_active |= IFM_100_T4;
388 			break;
389 
390 		case BRGPHY_RES_100HD:
391 			mii->mii_media_active |= IFM_100_TX;
392 			break;
393 
394 		case BRGPHY_RES_10FD:
395 			mii->mii_media_active |= IFM_10_T|IFM_FDX;
396 			break;
397 
398 		case BRGPHY_RES_10HD:
399 			mii->mii_media_active |= IFM_10_T;
400 			break;
401 
402 		default:
403 			mii->mii_media_active |= IFM_NONE;
404 			mii->mii_media_status = 0;
405 		}
406 		if (mii->mii_media_active & IFM_FDX)
407 			mii->mii_media_active |= mii_phy_flowstatus(sc);
408 	} else
409 		mii->mii_media_active = ife->ifm_media;
410 }
411 
412 void
413 brgphy_5401_reset(struct mii_softc *sc)
414 {
415 
416 	mii_phy_reset(sc);
417 	bcm5401_load_dspcode(sc);
418 }
419 
420 void
421 brgphy_5411_reset(struct mii_softc *sc)
422 {
423 
424 	mii_phy_reset(sc);
425 	bcm5411_load_dspcode(sc);
426 }
427 
428 
429 void
430 brgphy_5703_reset(struct mii_softc *sc)
431 {
432 
433 	mii_phy_reset(sc);
434 	bcm5703_load_dspcode(sc);
435 }
436 
437 void
438 brgphy_5704_reset(struct mii_softc *sc)
439 {
440 
441 	mii_phy_reset(sc);
442 	bcm5704_load_dspcode(sc);
443 }
444 
445 /*
446  * Hardware bug workaround.  Do nothing since after
447  * reset the 5705 PHY would get stuck in 10/100 MII mode.
448  */
449 
450 void
451 brgphy_5705_reset(struct mii_softc *sc)
452 {
453 }
454 
455 /* Turn off tap power management on 5401. */
456 static void
457 bcm5401_load_dspcode(struct mii_softc *sc)
458 {
459 	static const struct {
460 		int		reg;
461 		uint16_t	val;
462 	} dspcode[] = {
463 		{ BRGPHY_MII_AUXCTL,		0x0c20 },
464 		{ BRGPHY_MII_DSP_ADDR_REG,	0x0012 },
465 		{ BRGPHY_MII_DSP_RW_PORT,	0x1804 },
466 		{ BRGPHY_MII_DSP_ADDR_REG,	0x0013 },
467 		{ BRGPHY_MII_DSP_RW_PORT,	0x1204 },
468 		{ BRGPHY_MII_DSP_ADDR_REG,	0x8006 },
469 		{ BRGPHY_MII_DSP_RW_PORT,	0x0132 },
470 		{ BRGPHY_MII_DSP_ADDR_REG,	0x8006 },
471 		{ BRGPHY_MII_DSP_RW_PORT,	0x0232 },
472 		{ BRGPHY_MII_DSP_ADDR_REG,	0x201f },
473 		{ BRGPHY_MII_DSP_RW_PORT,	0x0a20 },
474 		{ 0,				0 },
475 	};
476 	int i;
477 
478 	for (i = 0; dspcode[i].reg != 0; i++)
479 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
480     delay(40);
481 }
482 
483 static void
484 bcm5411_load_dspcode(struct mii_softc *sc)
485 {
486 	static const struct {
487 		int		reg;
488 		uint16_t	val;
489 	} dspcode[] = {
490 		{ 0x1c,				0x8c23 },
491 		{ 0x1c,				0x8ca3 },
492 		{ 0x1c,				0x8c23 },
493 		{ 0,				0 },
494 	};
495 	int i;
496 
497 	for (i = 0; dspcode[i].reg != 0; i++)
498 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
499 }
500 
501 static void
502 bcm5703_load_dspcode(struct mii_softc *sc)
503 {
504 	static const struct {
505 		int		reg;
506 		uint16_t	val;
507 	} dspcode[] = {
508 		{ BRGPHY_MII_AUXCTL,		0x0c00 },
509 		{ BRGPHY_MII_DSP_ADDR_REG,	0x201f },
510 		{ BRGPHY_MII_DSP_RW_PORT,	0x2aaa },
511 		{ 0,				0 },
512 	};
513 	int i;
514 
515 	for (i = 0; dspcode[i].reg != 0; i++)
516 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
517 }
518 
519 static void
520 bcm5704_load_dspcode(struct mii_softc *sc)
521 {
522 	static const struct {
523 		int		reg;
524 		uint16_t	val;
525 	} dspcode[] = {
526 		{ 0x1c,				0x8d68 },
527    		{ 0x1c,				0x8d68 },
528 		{ 0,				0 },
529 	};
530 	int i;
531 
532 	for (i = 0; dspcode[i].reg != 0; i++)
533 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
534 }
535