1 /* $NetBSD: atphy.c,v 1.11 2011/10/02 21:42:19 jmcneill Exp $ */ 2 /* $OpenBSD: atphy.c,v 1.1 2008/09/25 20:47:16 brad Exp $ */ 3 4 /*- 5 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Driver for the Attansic F1 10/100/1000 PHY. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atphy.c,v 1.11 2011/10/02 21:42:19 jmcneill Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/socket.h> 43 44 #include <net/if.h> 45 #include <net/if_media.h> 46 47 #include <dev/mii/mii.h> 48 #include <dev/mii/miivar.h> 49 #include <dev/mii/miidevs.h> 50 51 /* Special Control Register */ 52 #define ATPHY_SCR 0x10 53 #define ATPHY_SCR_JABBER_DISABLE 0x0001 54 #define ATPHY_SCR_POLARITY_REVERSAL 0x0002 55 #define ATPHY_SCR_SQE_TEST 0x0004 56 #define ATPHY_SCR_MAC_PDOWN 0x0008 57 #define ATPHY_SCR_CLK125_DISABLE 0x0010 58 #define ATPHY_SCR_MDI_MANUAL_MODE 0x0000 59 #define ATPHY_SCR_MDIX_MANUAL_MODE 0x0020 60 #define ATPHY_SCR_AUTO_X_1000T 0x0040 61 #define ATPHY_SCR_AUTO_X_MODE 0x0060 62 #define ATPHY_SCR_10BT_EXT_ENABLE 0x0080 63 #define ATPHY_SCR_MII_5BIT_ENABLE 0x0100 64 #define ATPHY_SCR_SCRAMBLER_DISABLE 0x0200 65 #define ATPHY_SCR_FORCE_LINK_GOOD 0x0400 66 #define ATPHY_SCR_ASSERT_CRS_ON_TX 0x0800 67 68 /* Special Status Register. */ 69 #define ATPHY_SSR 0x11 70 #define ATPHY_SSR_SPD_DPLX_RESOLVED 0x0800 71 #define ATPHY_SSR_DUPLEX 0x2000 72 #define ATPHY_SSR_SPEED_MASK 0xC000 73 #define ATPHY_SSR_10MBS 0x0000 74 #define ATPHY_SSR_100MBS 0x4000 75 #define ATPHY_SSR_1000MBS 0x8000 76 77 static int atphy_match(device_t, cfdata_t, void *); 78 static void atphy_attach(device_t, device_t, void *); 79 80 static int atphy_service(struct mii_softc *, struct mii_data *, int); 81 static void atphy_reset(struct mii_softc *); 82 static void atphy_status(struct mii_softc *); 83 static int atphy_mii_phy_auto(struct mii_softc *); 84 static bool atphy_is_gige(const struct mii_phydesc *); 85 86 CFATTACH_DECL_NEW(atphy, sizeof(struct mii_softc), 87 atphy_match, atphy_attach, mii_phy_detach, mii_phy_activate); 88 89 const struct mii_phy_funcs atphy_funcs = { 90 atphy_service, atphy_status, atphy_reset, 91 }; 92 93 static const struct mii_phydesc etphys[] = { 94 { MII_OUI_ATHEROS, MII_MODEL_ATHEROS_F1, 95 MII_STR_ATHEROS_F1 }, 96 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L1, 97 MII_STR_ATTANSIC_L1 }, 98 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L2, 99 MII_STR_ATTANSIC_L2 }, 100 { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8021, 101 MII_STR_ATTANSIC_AR8021 }, 102 { 0, 0, 103 NULL }, 104 }; 105 106 static bool 107 atphy_is_gige(const struct mii_phydesc *mpd) 108 { 109 switch (mpd->mpd_oui) { 110 case MII_OUI_ATTANSIC: 111 switch (mpd->mpd_model) { 112 case MII_MODEL_ATTANSIC_L2: 113 return false; 114 } 115 } 116 117 return true; 118 } 119 120 static int 121 atphy_match(device_t parent, cfdata_t match, void *aux) 122 { 123 struct mii_attach_args *ma = aux; 124 125 if (mii_phy_match(ma, etphys) != NULL) 126 return 10; 127 128 return 0; 129 } 130 131 void 132 atphy_attach(device_t parent, device_t self, void *aux) 133 { 134 struct mii_softc *sc = device_private(self); 135 struct mii_attach_args *ma = aux; 136 struct mii_data *mii = ma->mii_data; 137 const struct mii_phydesc *mpd; 138 uint16_t bmsr; 139 140 mpd = mii_phy_match(ma, etphys); 141 aprint_naive(": Media interface\n"); 142 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 143 144 sc->mii_dev = self; 145 sc->mii_inst = mii->mii_instance; 146 sc->mii_phy = ma->mii_phyno; 147 sc->mii_funcs = &atphy_funcs; 148 sc->mii_pdata = mii; 149 sc->mii_flags = ma->mii_flags; 150 if (atphy_is_gige(mpd)) 151 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 152 else 153 sc->mii_anegticks = MII_ANEGTICKS; 154 155 sc->mii_flags |= MIIF_NOLOOP; 156 157 PHY_RESET(sc); 158 159 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 160 sc->mii_capabilities = bmsr & ma->mii_capmask; 161 if (atphy_is_gige(mpd) && (sc->mii_capabilities & BMSR_EXTSTAT)) 162 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 163 164 aprint_normal_dev(self, ""); 165 mii_phy_add_media(sc); 166 aprint_normal("\n"); 167 } 168 169 int 170 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 171 { 172 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 173 uint16_t anar, bmcr, bmsr; 174 175 switch (cmd) { 176 case MII_POLLSTAT: 177 /* 178 * If we're not polling our PHY instance, just return. 179 */ 180 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 181 return 0; 182 break; 183 184 case MII_MEDIACHG: 185 /* 186 * If the media indicates a different PHY instance, 187 * isolate ourselves. 188 */ 189 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 190 bmcr = PHY_READ(sc, MII_BMCR); 191 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 192 return 0; 193 } 194 195 /* 196 * If the interface is not up, don't do anything. 197 */ 198 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 199 break; 200 201 bmcr = 0; 202 switch (IFM_SUBTYPE(ife->ifm_media)) { 203 case IFM_AUTO: 204 case IFM_1000_T: 205 atphy_mii_phy_auto(sc); 206 goto done; 207 case IFM_100_TX: 208 bmcr = BMCR_S100; 209 break; 210 case IFM_10_T: 211 bmcr = BMCR_S10; 212 break; 213 case IFM_NONE: 214 bmcr = PHY_READ(sc, MII_BMCR); 215 /* 216 * XXX 217 * Due to an unknown reason powering down PHY resulted 218 * in unexpected results such as inaccessibility of 219 * hardware of freshly rebooted system. Disable 220 * powering down PHY until I got more information for 221 * Attansic/Atheros PHY hardwares. 222 */ 223 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 224 goto done; 225 default: 226 return EINVAL; 227 } 228 229 anar = mii_anar(ife->ifm_media); 230 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { 231 bmcr |= BMCR_FDX; 232 /* Enable pause. */ 233 if (sc->mii_flags & MIIF_DOPAUSE) 234 anar |= ANAR_X_PAUSE_TOWARDS; 235 } 236 237 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | 238 EXTSR_1000THDX)) != 0) 239 PHY_WRITE(sc, MII_100T2CR, 0); 240 PHY_WRITE(sc, MII_ANAR, anar); 241 242 /* 243 * Start autonegotiation. 244 */ 245 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG); 246 done: 247 break; 248 249 case MII_TICK: 250 /* 251 * If we're not currently selected, just return. 252 */ 253 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 254 return 0; 255 256 /* 257 * Is the interface even up? 258 */ 259 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 260 return 0; 261 262 /* 263 * Only used for autonegotiation. 264 */ 265 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 266 sc->mii_ticks = 0; 267 break; 268 } 269 270 /* 271 * Check for link. 272 * Read the status register twice; BMSR_LINK is latch-low. 273 */ 274 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 275 if (bmsr & BMSR_LINK) { 276 sc->mii_ticks = 0; 277 break; 278 } 279 280 /* Announce link loss right after it happens. */ 281 if (sc->mii_ticks++ == 0) 282 break; 283 284 /* 285 * Only retry autonegotiation every mii_anegticks seconds. 286 */ 287 if (sc->mii_ticks <= sc->mii_anegticks) 288 break; 289 290 sc->mii_ticks = 0; 291 atphy_mii_phy_auto(sc); 292 break; 293 } 294 295 /* Update the media status. */ 296 mii_phy_status(sc); 297 298 /* Callback if something changed. */ 299 mii_phy_update(sc, cmd); 300 return 0; 301 } 302 303 static void 304 atphy_status(struct mii_softc *sc) 305 { 306 struct mii_data *mii = sc->mii_pdata; 307 uint32_t bmsr, bmcr, gsr, ssr; 308 309 mii->mii_media_status = IFM_AVALID; 310 mii->mii_media_active = IFM_ETHER; 311 312 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 313 if (bmsr & BMSR_LINK) 314 mii->mii_media_status |= IFM_ACTIVE; 315 316 bmcr = PHY_READ(sc, MII_BMCR); 317 if (bmcr & BMCR_ISO) { 318 mii->mii_media_active |= IFM_NONE; 319 mii->mii_media_status = 0; 320 return; 321 } 322 323 if (bmcr & BMCR_LOOP) 324 mii->mii_media_active |= IFM_LOOP; 325 326 ssr = PHY_READ(sc, ATPHY_SSR); 327 if (!(ssr & ATPHY_SSR_SPD_DPLX_RESOLVED)) { 328 /* Erg, still trying, I guess... */ 329 mii->mii_media_active |= IFM_NONE; 330 return; 331 } 332 333 switch (ssr & ATPHY_SSR_SPEED_MASK) { 334 case ATPHY_SSR_1000MBS: 335 mii->mii_media_active |= IFM_1000_T; 336 /* 337 * atphy(4) has a valid link so reset mii_ticks. 338 * Resetting mii_ticks is needed in order to 339 * detect link loss after auto-negotiation. 340 */ 341 sc->mii_ticks = 0; 342 break; 343 case ATPHY_SSR_100MBS: 344 mii->mii_media_active |= IFM_100_TX; 345 sc->mii_ticks = 0; 346 break; 347 case ATPHY_SSR_10MBS: 348 mii->mii_media_active |= IFM_10_T; 349 sc->mii_ticks = 0; 350 break; 351 default: 352 mii->mii_media_active |= IFM_NONE; 353 return; 354 } 355 356 if (ssr & ATPHY_SSR_DUPLEX) 357 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); 358 else 359 mii->mii_media_active |= IFM_HDX; 360 361 gsr = PHY_READ(sc, MII_100T2SR); 362 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && 363 gsr & GTSR_MS_RES) 364 mii->mii_media_active |= IFM_ETH_MASTER; 365 } 366 367 static void 368 atphy_reset(struct mii_softc *sc) 369 { 370 uint32_t reg; 371 int i; 372 373 /* Take PHY out of power down mode. */ 374 PHY_WRITE(sc, 29, 0x29); 375 PHY_WRITE(sc, 30, 0); 376 377 reg = PHY_READ(sc, ATPHY_SCR); 378 /* Enable automatic crossover. */ 379 reg |= ATPHY_SCR_AUTO_X_MODE; 380 /* Disable power down. */ 381 reg &= ~ATPHY_SCR_MAC_PDOWN; 382 /* Enable CRS on Tx. */ 383 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX; 384 /* Auto correction for reversed cable polarity. */ 385 reg |= ATPHY_SCR_POLARITY_REVERSAL; 386 PHY_WRITE(sc, ATPHY_SCR, reg); 387 388 atphy_mii_phy_auto(sc); 389 390 /* Workaround F1 bug to reset phy. */ 391 reg = PHY_READ(sc, MII_BMCR) | BMCR_RESET; 392 PHY_WRITE(sc, MII_BMCR, reg); 393 394 for (i = 0; i < 1000; i++) { 395 DELAY(1); 396 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0) 397 break; 398 } 399 } 400 401 static int 402 atphy_mii_phy_auto(struct mii_softc *sc) 403 { 404 uint16_t anar; 405 406 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; 407 if (sc->mii_flags & MIIF_DOPAUSE) 408 anar |= ANAR_X_PAUSE_TOWARDS; 409 PHY_WRITE(sc, MII_ANAR, anar); 410 if (sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) 411 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX | 412 GTCR_ADV_1000THDX); 413 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 414 415 return EJUSTRETURN; 416 } 417