1 /* $NetBSD: wdc_isa.c,v 1.52 2007/10/19 12:00:24 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: wdc_isa.c,v 1.52 2007/10/19 12:00:24 ad Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/bus.h> 48 #include <sys/intr.h> 49 50 #include <dev/isa/isavar.h> 51 #include <dev/isa/isadmavar.h> 52 53 #include <dev/ic/wdcreg.h> 54 #include <dev/ata/atavar.h> 55 #include <dev/ic/wdcvar.h> 56 57 #define WDC_ISA_REG_NPORTS 8 58 #define WDC_ISA_AUXREG_OFFSET 0x206 59 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 60 61 /* options passed via the 'flags' config keyword */ 62 #define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */ 63 #define WDC_OPTIONS_ATA_NOSTREAM 0x04 64 #define WDC_OPTIONS_ATAPI_NOSTREAM 0x08 65 66 struct wdc_isa_softc { 67 struct wdc_softc sc_wdcdev; 68 struct ata_channel *wdc_chanlist[1]; 69 struct ata_channel ata_channel; 70 struct ata_queue wdc_chqueue; 71 struct wdc_regs wdc_regs; 72 isa_chipset_tag_t sc_ic; 73 void *sc_ih; 74 int sc_drq; 75 }; 76 77 static int wdc_isa_probe(struct device *, struct cfdata *, void *); 78 static void wdc_isa_attach(struct device *, struct device *, void *); 79 80 CFATTACH_DECL(wdc_isa, sizeof(struct wdc_isa_softc), 81 wdc_isa_probe, wdc_isa_attach, NULL, NULL); 82 83 #if 0 84 static void wdc_isa_dma_setup(struct wdc_isa_softc *); 85 static int wdc_isa_dma_init(void*, int, int, void *, size_t, int); 86 static void wdc_isa_dma_start(void*, int, int); 87 static int wdc_isa_dma_finish(void*, int, int, int); 88 #endif 89 90 static int 91 wdc_isa_probe(struct device *parent, struct cfdata *match, 92 void *aux) 93 { 94 struct ata_channel ch; 95 struct isa_attach_args *ia = aux; 96 struct wdc_softc wdc; 97 struct wdc_regs wdr; 98 int result = 0, i; 99 100 if (ia->ia_nio < 1) 101 return (0); 102 if (ia->ia_nirq < 1) 103 return (0); 104 105 if (ISA_DIRECT_CONFIG(ia)) 106 return (0); 107 108 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 109 return (0); 110 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 111 return (0); 112 if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq == ISA_UNKNOWN_DRQ) 113 ia->ia_ndrq = 0; 114 115 memset(&wdc, 0, sizeof(wdc)); 116 memset(&ch, 0, sizeof(ch)); 117 ch.ch_atac = &wdc.sc_atac; 118 wdc.regs = &wdr; 119 120 wdr.cmd_iot = ia->ia_iot; 121 122 if (bus_space_map(wdr.cmd_iot, ia->ia_io[0].ir_addr, 123 WDC_ISA_REG_NPORTS, 0, &wdr.cmd_baseioh)) 124 goto out; 125 126 for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { 127 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, i, 128 i == 0 ? 4 : 1, &wdr.cmd_iohs[i]) != 0) 129 goto outunmap; 130 } 131 wdc_init_shadow_regs(&ch); 132 133 wdr.ctl_iot = ia->ia_iot; 134 if (bus_space_map(wdr.ctl_iot, ia->ia_io[0].ir_addr + 135 WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 0, &wdr.ctl_ioh)) 136 goto outunmap; 137 138 result = wdcprobe(&ch); 139 if (result) { 140 ia->ia_nio = 1; 141 ia->ia_io[0].ir_size = WDC_ISA_REG_NPORTS; 142 143 ia->ia_nirq = 1; 144 145 ia->ia_niomem = 0; 146 } 147 148 bus_space_unmap(wdr.ctl_iot, wdr.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 149 outunmap: 150 bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, WDC_ISA_REG_NPORTS); 151 out: 152 return (result); 153 } 154 155 static void 156 wdc_isa_attach(struct device *parent, struct device *self, void *aux) 157 { 158 struct wdc_isa_softc *sc = (void *)self; 159 struct wdc_regs *wdr; 160 struct isa_attach_args *ia = aux; 161 int wdc_cf_flags = device_cfdata(self)->cf_flags; 162 int i; 163 164 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs; 165 wdr->cmd_iot = ia->ia_iot; 166 wdr->ctl_iot = ia->ia_iot; 167 sc->sc_ic = ia->ia_ic; 168 if (bus_space_map(wdr->cmd_iot, ia->ia_io[0].ir_addr, 169 WDC_ISA_REG_NPORTS, 0, &wdr->cmd_baseioh) || 170 bus_space_map(wdr->ctl_iot, 171 ia->ia_io[0].ir_addr + WDC_ISA_AUXREG_OFFSET, 172 WDC_ISA_AUXREG_NPORTS, 0, &wdr->ctl_ioh)) { 173 printf(": couldn't map registers\n"); 174 return; 175 } 176 177 for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { 178 if (bus_space_subregion(wdr->cmd_iot, 179 wdr->cmd_baseioh, i, i == 0 ? 4 : 1, 180 &wdr->cmd_iohs[i]) != 0) { 181 printf(": couldn't subregion registers\n"); 182 return; 183 } 184 } 185 186 wdr->data32iot = wdr->cmd_iot; 187 wdr->data32ioh = wdr->cmd_iohs[0]; 188 189 #if 0 190 if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ) { 191 sc->sc_drq = ia->ia_drq[0].ir_drq; 192 193 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; 194 sc->sc_wdcdev.dma_arg = sc; 195 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 196 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 197 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 198 wdc_isa_dma_setup(sc); 199 } 200 #endif 201 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA; 202 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 203 if (wdc_cf_flags & WDC_OPTIONS_32) 204 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; 205 if (wdc_cf_flags & WDC_OPTIONS_ATA_NOSTREAM) 206 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM; 207 if (wdc_cf_flags & WDC_OPTIONS_ATAPI_NOSTREAM) 208 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM; 209 210 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 211 sc->wdc_chanlist[0] = &sc->ata_channel; 212 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist; 213 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 214 sc->ata_channel.ch_channel = 0; 215 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; 216 sc->ata_channel.ch_queue = &sc->wdc_chqueue; 217 sc->ata_channel.ch_ndrive = 2; 218 wdc_init_shadow_regs(&sc->ata_channel); 219 220 printf("\n"); 221 222 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 223 IST_EDGE, IPL_BIO, wdcintr, &sc->ata_channel); 224 225 wdcattach(&sc->ata_channel); 226 } 227 228 #if 0 229 static void 230 wdc_isa_dma_setup(struct wdc_isa_softc *sc) 231 { 232 bus_size_t maxsize; 233 234 if ((maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq)) < MAXPHYS) { 235 printf("%s: max DMA size %lu is less than required %d\n", 236 sc->sc_wdcdev.sc_dev.dv_xname, (u_long)maxsize, MAXPHYS); 237 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 238 return; 239 } 240 241 if (isa_drq_alloc(sc->sc_ic, sc->sc_drq) != 0) { 242 printf("%s: can't reserve drq %d\n", 243 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 244 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 245 return; 246 } 247 248 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, 249 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 250 printf("%s: can't create map for drq %d\n", 251 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 252 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 253 } 254 } 255 256 static int 257 wdc_isa_dma_init(void *v, int channel, int drive, void *databuf, 258 size_t datalen, int read) 259 { 260 struct wdc_isa_softc *sc = v; 261 262 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL, 263 (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND, 264 BUS_DMA_NOWAIT); 265 return 0; 266 } 267 268 static void 269 wdc_isa_dma_start(void *v, int channel, int drive) 270 { 271 /* nothing to do */ 272 } 273 274 static int 275 wdc_isa_dma_finish(void *v, int channel, int drive, int read) 276 { 277 struct wdc_isa_softc *sc = v; 278 279 isa_dmadone(sc->sc_ic, sc->sc_drq); 280 return 0; 281 } 282 #endif 283