1 /* $NetBSD: wdc_isa.c,v 1.19 2000/04/02 02:07:52 itojun Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 48 #include <dev/isa/isavar.h> 49 #include <dev/isa/isadmavar.h> 50 51 #include <dev/ata/atavar.h> 52 #include <dev/ic/wdcvar.h> 53 54 #define WDC_ISA_REG_NPORTS 8 55 #define WDC_ISA_AUXREG_OFFSET 0x206 56 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 57 58 /* options passed via the 'flags' config keyword */ 59 #define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */ 60 61 struct wdc_isa_softc { 62 struct wdc_softc sc_wdcdev; 63 struct channel_softc *wdc_chanptr; 64 struct channel_softc wdc_channel; 65 isa_chipset_tag_t sc_ic; 66 void *sc_ih; 67 int sc_drq; 68 }; 69 70 int wdc_isa_probe __P((struct device *, struct cfdata *, void *)); 71 void wdc_isa_attach __P((struct device *, struct device *, void *)); 72 73 struct cfattach wdc_isa_ca = { 74 sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach 75 }; 76 77 static void wdc_isa_dma_setup __P((struct wdc_isa_softc *)); 78 static int wdc_isa_dma_init __P((void*, int, int, void *, size_t, int)); 79 static void wdc_isa_dma_start __P((void*, int, int)); 80 static int wdc_isa_dma_finish __P((void*, int, int, int)); 81 82 int 83 wdc_isa_probe(parent, match, aux) 84 struct device *parent; 85 struct cfdata *match; 86 void *aux; 87 { 88 struct channel_softc ch; 89 struct isa_attach_args *ia = aux; 90 int result = 0; 91 92 memset(&ch, 0, sizeof(ch)); 93 94 ch.cmd_iot = ia->ia_iot; 95 if (bus_space_map(ch.cmd_iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0, 96 &ch.cmd_ioh)) 97 goto out; 98 99 ch.ctl_iot = ia->ia_iot; 100 if (bus_space_map(ch.ctl_iot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, 101 WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh)) 102 goto outunmap; 103 104 result = wdcprobe(&ch); 105 if (result) { 106 ia->ia_iosize = WDC_ISA_REG_NPORTS; 107 ia->ia_msize = 0; 108 } 109 110 bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 111 outunmap: 112 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_ISA_REG_NPORTS); 113 out: 114 return (result); 115 } 116 117 void 118 wdc_isa_attach(parent, self, aux) 119 struct device *parent, *self; 120 void *aux; 121 { 122 struct wdc_isa_softc *sc = (void *)self; 123 struct isa_attach_args *ia = aux; 124 125 printf("\n"); 126 127 sc->wdc_channel.cmd_iot = ia->ia_iot; 128 sc->wdc_channel.ctl_iot = ia->ia_iot; 129 sc->sc_ic = ia->ia_ic; 130 if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase, 131 WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) || 132 bus_space_map(sc->wdc_channel.ctl_iot, 133 ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 134 0, &sc->wdc_channel.ctl_ioh)) { 135 printf("%s: couldn't map registers\n", 136 sc->sc_wdcdev.sc_dev.dv_xname); 137 } 138 sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot; 139 sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh; 140 141 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 142 IPL_BIO, wdcintr, &sc->wdc_channel); 143 144 if (ia->ia_drq != DRQUNK) { 145 sc->sc_drq = ia->ia_drq; 146 147 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA; 148 sc->sc_wdcdev.dma_arg = sc; 149 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 150 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 151 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 152 wdc_isa_dma_setup(sc); 153 } 154 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_PREATA; 155 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_32) 156 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32; 157 sc->sc_wdcdev.PIO_cap = 0; 158 sc->wdc_chanptr = &sc->wdc_channel; 159 sc->sc_wdcdev.channels = &sc->wdc_chanptr; 160 sc->sc_wdcdev.nchannels = 1; 161 sc->wdc_channel.channel = 0; 162 sc->wdc_channel.wdc = &sc->sc_wdcdev; 163 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 164 M_DEVBUF, M_NOWAIT); 165 if (sc->wdc_channel.ch_queue == NULL) { 166 printf("%s: can't allocate memory for command queue", 167 sc->sc_wdcdev.sc_dev.dv_xname); 168 return; 169 } 170 wdcattach(&sc->wdc_channel); 171 } 172 173 static void 174 wdc_isa_dma_setup(sc) 175 struct wdc_isa_softc *sc; 176 { 177 bus_size_t maxsize; 178 179 if ((maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq)) < MAXPHYS) { 180 printf("%s: max DMA size %lu is less than required %d\n", 181 sc->sc_wdcdev.sc_dev.dv_xname, (u_long)maxsize, MAXPHYS); 182 sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA; 183 return; 184 } 185 186 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, 187 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 188 printf("%s: can't create map for drq %d\n", 189 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 190 sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA; 191 } 192 } 193 194 static int 195 wdc_isa_dma_init(v, channel, drive, databuf, datalen, read) 196 void *v; 197 void *databuf; 198 size_t datalen; 199 int read; 200 { 201 struct wdc_isa_softc *sc = v; 202 203 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL, 204 (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND, 205 BUS_DMA_NOWAIT); 206 return 0; 207 } 208 209 static void 210 wdc_isa_dma_start(v, channel, drive) 211 void *v; 212 int channel, drive; 213 { 214 /* nothing to do */ 215 } 216 217 static int 218 wdc_isa_dma_finish(v, channel, drive, read) 219 void *v; 220 int channel, drive; 221 int read; 222 { 223 struct wdc_isa_softc *sc = v; 224 225 isa_dmadone(sc->sc_ic, sc->sc_drq); 226 return 0; 227 } 228