xref: /netbsd-src/sys/dev/isa/tcic2_isa.c (revision 5e4c038a45edbc7d63b7c2daa76e29f88b64a4e3)
1 /*	$NetBSD: tcic2_isa.c,v 1.6 2002/01/07 21:47:13 thorpej Exp $	*/
2 
3 /*
4  *
5  * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
6  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Marc Horowitz.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: tcic2_isa.c,v 1.6 2002/01/07 21:47:13 thorpej Exp $");
36 
37 #undef	TCICISADEBUG
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/extent.h>
43 #include <sys/malloc.h>
44 
45 #include <machine/bus.h>
46 #include <machine/intr.h>
47 
48 #include <dev/isa/isareg.h>
49 #include <dev/isa/isavar.h>
50 
51 #include <dev/pcmcia/pcmciareg.h>
52 #include <dev/pcmcia/pcmciavar.h>
53 #include <dev/pcmcia/pcmciachip.h>
54 
55 #include <dev/ic/tcic2reg.h>
56 #include <dev/ic/tcic2var.h>
57 
58 /*****************************************************************************
59  * Configurable parameters.
60  *****************************************************************************/
61 
62 #include "opt_tcic_isa_alloc_iobase.h"
63 #include "opt_tcic_isa_alloc_iosize.h"
64 #include "opt_tcic_isa_intr_alloc_mask.h"
65 
66 /*
67  * Default I/O allocation range.  If both are set to non-zero, these
68  * values will be used instead.  Otherwise, the code attempts to probe
69  * the bus width.  Systems with 10 address bits should use 0x300 and 0xff.
70  * Systems with 12 address bits (most) should use 0x400 and 0xbff.
71  */
72 
73 #ifndef TCIC_ISA_ALLOC_IOBASE
74 #define	TCIC_ISA_ALLOC_IOBASE		0
75 #endif
76 
77 #ifndef TCIC_ISA_ALLOC_IOSIZE
78 #define	TCIC_ISA_ALLOC_IOSIZE		0
79 #endif
80 
81 int	tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE;
82 int	tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE;
83 
84 /*
85  * Default IRQ allocation bitmask.  This defines the range of allowable
86  * IRQs for PCMCIA slots.  Useful if order of probing would screw up other
87  * devices, or if TCIC hardware/cards have trouble with certain interrupt
88  * lines.
89  *
90  * We disable IRQ 10 by default, since some common laptops (namely, the
91  * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
92  *
93  * XXX Do we care about this?  the Versa doesn't use a tcic. -chb
94  */
95 
96 #ifndef TCIC_ISA_INTR_ALLOC_MASK
97 #define	TCIC_ISA_INTR_ALLOC_MASK	0xffff
98 #endif
99 
100 int	tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK;
101 
102 /*****************************************************************************
103  * End of configurable parameters.
104  *****************************************************************************/
105 
106 #ifdef TCICISADEBUG
107 int	tcic_isa_debug = 1;
108 #define	DPRINTF(arg) if (tcic_isa_debug) printf arg;
109 #else
110 #define	DPRINTF(arg)
111 #endif
112 
113 int	tcic_isa_probe __P((struct device *, struct cfdata *, void *));
114 void	tcic_isa_attach __P((struct device *, struct device *, void *));
115 
116 void	*tcic_isa_chip_intr_establish __P((pcmcia_chipset_handle_t,
117 	    struct pcmcia_function *, int, int (*) (void *), void *));
118 void	tcic_isa_chip_intr_disestablish __P((pcmcia_chipset_handle_t, void *));
119 
120 struct cfattach tcic_isa_ca = {
121 	sizeof(struct tcic_softc), tcic_isa_probe, tcic_isa_attach
122 };
123 
124 static struct pcmcia_chip_functions tcic_isa_functions = {
125 	tcic_chip_mem_alloc,
126 	tcic_chip_mem_free,
127 	tcic_chip_mem_map,
128 	tcic_chip_mem_unmap,
129 
130 	tcic_chip_io_alloc,
131 	tcic_chip_io_free,
132 	tcic_chip_io_map,
133 	tcic_chip_io_unmap,
134 
135 	tcic_isa_chip_intr_establish,
136 	tcic_isa_chip_intr_disestablish,
137 
138 	tcic_chip_socket_enable,
139 	tcic_chip_socket_disable,
140 };
141 
142 int
143 tcic_isa_probe(parent, match, aux)
144 	struct device *parent;
145 	struct cfdata *match;
146 	void *aux;
147 {
148 	struct isa_attach_args *ia = aux;
149 	bus_space_tag_t iot = ia->ia_iot;
150 	bus_space_handle_t ioh, memh;
151 	int val, found, msize;
152 
153 	if (ia->ia_nio < 1)
154 		return (0);
155 	if (ia->ia_niomem < 1)
156 		return (0);
157 
158 	if (ISA_DIRECT_CONFIG(ia))
159 		return (0);
160 
161 	/* Disallow wildcarded i/o address. */
162 	if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
163 		return (0);
164 	if (ia->ia_iomem[0].ir_addr == ISACF_IOMEM_DEFAULT)
165 		return (0);
166 
167 	if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh))
168 		return (0);
169 
170 	if (ia->ia_iomem[0].ir_size == ISACF_IOSIZ_DEFAULT)
171 		msize = TCIC_MEMSIZE;
172 	else
173 		msize = ia->ia_iomem[0].ir_size;
174 
175 	if (bus_space_map(ia->ia_memt, ia->ia_iomem[0].ir_addr,
176 	    msize, 0, &memh)) {
177 		bus_space_unmap(iot, ioh, TCIC_IOSIZE);
178 		return (0);
179 	}
180 
181 	DPRINTF(("tcic probing 0x%03x\n", ia->ia_iobase));
182 	found = 0;
183 
184 	/*
185 	 * First, check for the reserved bits to be zero.
186 	 */
187 	if (tcic_check_reserved_bits(iot, ioh)) {
188 		DPRINTF(("tcic: reserved bits checked OK\n"));
189 		/* Second, check whether the we know how to handle the chip. */
190 		if ((val = tcic_chipid(iot, ioh))) {
191 			DPRINTF(("tcic id: 0x%02x\n", val));
192 			if (tcic_chipid_known(val))
193 				found++;
194 		}
195 	}
196 	else
197 		DPRINTF(("tcic: reserved bits didn't check OK\n"));
198 
199 	bus_space_unmap(iot, ioh, TCIC_IOSIZE);
200 	bus_space_unmap(ia->ia_memt, memh, msize);
201 
202 	if (!found)
203 		return (0);
204 
205 	ia->ia_nio = 1;
206 	ia->ia_io[0].ir_size = TCIC_IOSIZE;
207 
208 	ia->ia_niomem = 1;
209 	ia->ia_iomem[0].ir_size = msize;
210 
211 	/* IRQ is special. */
212 
213 	ia->ia_ndrq = 0;
214 
215 	return (1);
216 }
217 
218 void
219 tcic_isa_attach(parent, self, aux)
220 	struct device *parent, *self;
221 	void *aux;
222 {
223 	struct tcic_softc *sc = (void *) self;
224 	struct isa_attach_args *ia = aux;
225 	isa_chipset_tag_t ic = ia->ia_ic;
226 	bus_space_tag_t iot = ia->ia_iot;
227 	bus_space_tag_t memt = ia->ia_memt;
228 	bus_space_handle_t ioh;
229 	bus_space_handle_t memh;
230 
231 	/* Map i/o space. */
232 	if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) {
233 		printf(": can't map i/o space\n");
234 		return;
235 	}
236 
237 	/* Map mem space. */
238 	if (bus_space_map(memt, ia->ia_iomem[0].ir_addr,
239 	    ia->ia_iomem[0].ir_size, 0, &memh)) {
240 		printf(": can't map mem space\n");
241 		return;
242 	}
243 
244 	sc->membase = ia->ia_iomem[0].ir_addr;
245 	sc->subregionmask =
246 	    (1 << (ia->ia_iomem[0].ir_size / TCIC_MEM_PAGESIZE)) - 1;
247 	sc->memsize2 = tcic_log2((u_int)ia->ia_iomem[0].ir_size);
248 
249 	sc->intr_est = ic;
250 	sc->pct = (pcmcia_chipset_tag_t) & tcic_isa_functions;
251 
252 	sc->iot = iot;
253 	sc->ioh = ioh;
254 	sc->memt = memt;
255 	sc->memh = memh;
256 
257 	/*
258 	 * determine chip type and initialise some chip type dependend
259 	 * parameters in softc.
260 	 */
261 	sc->chipid = tcic_chipid(iot, ioh);
262 	sc->validirqs = tcic_validirqs(sc->chipid);
263 
264 	/*
265 	 * allocate an irq.  interrupts are relatively
266 	 * scarce but for TCIC controllers very infrequent.
267 	 */
268 
269 	if (ia->ia_nirq < 1)
270 		sc->irq = ISACF_IRQ_DEFAULT;
271 	else
272 		sc->irq = ia->ia_irq[0].ir_irq;
273 	if (sc->irq == ISACF_IRQ_DEFAULT) {
274 		if (isa_intr_alloc(ic,
275 		    sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
276 		    IST_EDGE, &sc->irq)) {
277 			printf("\n%s: can't allocate interrupt\n",
278 			    sc->dev.dv_xname);
279 			return;
280 		}
281 		printf(": using irq %d", sc->irq);
282 	}
283 	printf("\n");
284 
285 	tcic_attach(sc);
286 
287 
288 	/*
289 	 * XXX mycroft recommends I/O space range 0x400-0xfff.
290 	 */
291 
292 	/*
293 	 * XXX some hardware doesn't seem to grok addresses in 0x400 range--
294 	 * apparently missing a bit or more of address lines. (e.g.
295 	 * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
296 	 * TravelMate 5000--not clear which is at fault)
297 	 *
298 	 * Add a kludge to detect 10 bit wide buses and deal with them,
299 	 * and also a config file option to override the probe.
300 	 */
301 
302 #if 0
303 	/*
304 	 * This is what we'd like to use, but...
305 	 */
306 	sc->iobase = 0x400;
307 	sc->iosize = 0xbff;
308 #else
309 	/*
310 	 * ...the above bus width probe doesn't always work.
311 	 * So, experimentation has shown the following range
312 	 * to not lose on systems that 0x300-0x3ff loses on
313 	 * (e.g. the NEC Versa 6030X).
314 	 */
315 	sc->iobase = 0x330;
316 	sc->iosize = 0x0cf;
317 #endif
318 
319 	DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n",
320 	    sc->dev.dv_xname, (long) sc->iobase,
321 	    (long) sc->iobase + sc->iosize));
322 
323 	if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) {
324 		sc->iobase = tcic_isa_alloc_iobase;
325 		sc->iosize = tcic_isa_alloc_iosize;
326 
327 		DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
328 		    "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
329 		    (long) sc->iobase + sc->iosize));
330 	}
331 	sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
332 	    tcic_intr, sc);
333 	if (sc->ih == NULL) {
334 		printf("%s: can't establish interrupt\n", sc->dev.dv_xname);
335 		return;
336 	}
337 
338 	tcic_attach_sockets(sc);
339 }
340 
341 void *
342 tcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
343 	pcmcia_chipset_handle_t pch;
344 	struct pcmcia_function *pf;
345 	int ipl;
346 	int (*fct) __P((void *));
347 	void *arg;
348 {
349 	struct tcic_handle *h = (struct tcic_handle *) pch;
350 	int irq, ist;
351 	void *ih;
352 
353 	DPRINTF(("%s: tcic_isa_chip_intr_establish\n", h->sc->dev.dv_xname));
354 
355 	/* XXX should we convert level to pulse? -chb  */
356 	if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
357 		ist = IST_LEVEL;
358 	else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
359 		ist = IST_PULSE;
360 	else
361 		ist = IST_LEVEL;
362 
363 	if (isa_intr_alloc(h->sc->intr_est,
364 	    h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
365 		return (NULL);
366 	if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
367 	    fct, arg)) == NULL)
368 		return (NULL);
369 
370 	DPRINTF(("%s: intr estrablished\n", h->sc->dev.dv_xname));
371 
372 	h->ih_irq = irq;
373 
374 	printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
375 
376 	return (ih);
377 }
378 
379 void
380 tcic_isa_chip_intr_disestablish(pch, ih)
381 	pcmcia_chipset_handle_t pch;
382 	void *ih;
383 {
384 	struct tcic_handle *h = (struct tcic_handle *) pch;
385 	int val, reg;
386 
387 	DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", h->sc->dev.dv_xname));
388 
389 	h->ih_irq = 0;
390 
391 	reg = TCIC_IR_SCF1_N(h->sock);
392 	val = tcic_read_ind_2(h, reg);
393 	val &= ~TCIC_SCF1_IRQ_MASK;
394 	tcic_write_ind_2(h, reg, val);
395 
396 	isa_intr_disestablish(h->sc->intr_est, ih);
397 }
398