xref: /netbsd-src/sys/dev/isa/tcic2_isa.c (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1 /*	$NetBSD: tcic2_isa.c,v 1.21 2008/06/26 12:33:17 drochner Exp $	*/
2 
3 /*
4  *
5  * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
6  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Marc Horowitz.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: tcic2_isa.c,v 1.21 2008/06/26 12:33:17 drochner Exp $");
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40 #include <sys/extent.h>
41 #include <sys/malloc.h>
42 
43 #include <sys/bus.h>
44 #include <sys/intr.h>
45 
46 #include <dev/isa/isareg.h>
47 #include <dev/isa/isavar.h>
48 
49 #include <dev/pcmcia/pcmciareg.h>
50 #include <dev/pcmcia/pcmciavar.h>
51 #include <dev/pcmcia/pcmciachip.h>
52 
53 #include <dev/ic/tcic2reg.h>
54 #include <dev/ic/tcic2var.h>
55 
56 /*****************************************************************************
57  * Configurable parameters.
58  *****************************************************************************/
59 
60 #include "opt_tcic_isa_alloc_iobase.h"
61 #include "opt_tcic_isa_alloc_iosize.h"
62 #include "opt_tcic_isa_intr_alloc_mask.h"
63 
64 /*
65  * Default I/O allocation range.  If both are set to non-zero, these
66  * values will be used instead.  Otherwise, the code attempts to probe
67  * the bus width.  Systems with 10 address bits should use 0x300 and 0xff.
68  * Systems with 12 address bits (most) should use 0x400 and 0xbff.
69  */
70 
71 #ifndef TCIC_ISA_ALLOC_IOBASE
72 #define	TCIC_ISA_ALLOC_IOBASE		0
73 #endif
74 
75 #ifndef TCIC_ISA_ALLOC_IOSIZE
76 #define	TCIC_ISA_ALLOC_IOSIZE		0
77 #endif
78 
79 int	tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE;
80 int	tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE;
81 
82 /*
83  * Default IRQ allocation bitmask.  This defines the range of allowable
84  * IRQs for PCMCIA slots.  Useful if order of probing would screw up other
85  * devices, or if TCIC hardware/cards have trouble with certain interrupt
86  * lines.
87  *
88  * We disable IRQ 10 by default, since some common laptops (namely, the
89  * NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
90  *
91  * XXX Do we care about this?  the Versa doesn't use a tcic. -chb
92  */
93 
94 #ifndef TCIC_ISA_INTR_ALLOC_MASK
95 #define	TCIC_ISA_INTR_ALLOC_MASK	0xffff
96 #endif
97 
98 int	tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK;
99 
100 /*****************************************************************************
101  * End of configurable parameters.
102  *****************************************************************************/
103 
104 #ifdef TCICISADEBUG
105 int	tcic_isa_debug = 1;
106 #define	DPRINTF(arg) if (tcic_isa_debug) printf arg;
107 #else
108 #define	DPRINTF(arg)
109 #endif
110 
111 int	tcic_isa_probe(struct device *, struct cfdata *, void *);
112 void	tcic_isa_attach(struct device *, struct device *, void *);
113 
114 void	*tcic_isa_chip_intr_establish(pcmcia_chipset_handle_t,
115 	    struct pcmcia_function *, int, int (*) (void *), void *);
116 void	tcic_isa_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
117 
118 CFATTACH_DECL(tcic_isa, sizeof(struct tcic_softc),
119     tcic_isa_probe, tcic_isa_attach, NULL, NULL);
120 
121 static const struct pcmcia_chip_functions tcic_isa_functions = {
122 	tcic_chip_mem_alloc,
123 	tcic_chip_mem_free,
124 	tcic_chip_mem_map,
125 	tcic_chip_mem_unmap,
126 
127 	tcic_chip_io_alloc,
128 	tcic_chip_io_free,
129 	tcic_chip_io_map,
130 	tcic_chip_io_unmap,
131 
132 	tcic_isa_chip_intr_establish,
133 	tcic_isa_chip_intr_disestablish,
134 
135 	tcic_chip_socket_enable,
136 	tcic_chip_socket_disable,
137 	tcic_chip_socket_settype,
138 
139 	NULL,	/* card_detect */
140 };
141 
142 int
143 tcic_isa_probe(struct device *parent, struct cfdata *match,
144     void *aux)
145 {
146 	struct isa_attach_args *ia = aux;
147 	bus_space_tag_t iot = ia->ia_iot;
148 	bus_space_handle_t ioh, memh;
149 	int val, found, msize;
150 
151 	if (ia->ia_nio < 1)
152 		return (0);
153 	if (ia->ia_niomem < 1)
154 		return (0);
155 
156 	if (ISA_DIRECT_CONFIG(ia))
157 		return (0);
158 
159 	/* Disallow wildcarded i/o address. */
160 	if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT)
161 		return (0);
162 	if (ia->ia_iomem[0].ir_addr == ISA_UNKNOWN_IOMEM)
163 		return (0);
164 
165 	if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh))
166 		return (0);
167 
168 	if (ia->ia_iomem[0].ir_size == ISA_UNKNOWN_IOSIZ)
169 		msize = TCIC_MEMSIZE;
170 	else
171 		msize = ia->ia_iomem[0].ir_size;
172 
173 	if (bus_space_map(ia->ia_memt, ia->ia_iomem[0].ir_addr,
174 	    msize, 0, &memh)) {
175 		bus_space_unmap(iot, ioh, TCIC_IOSIZE);
176 		return (0);
177 	}
178 
179 	DPRINTF(("tcic probing 0x%03x\n", ia->ia_iomem[0].ir_addr));
180 	found = 0;
181 
182 	/*
183 	 * First, check for the reserved bits to be zero.
184 	 */
185 	if (tcic_check_reserved_bits(iot, ioh)) {
186 		DPRINTF(("tcic: reserved bits checked OK\n"));
187 		/* Second, check whether the we know how to handle the chip. */
188 		if ((val = tcic_chipid(iot, ioh))) {
189 			DPRINTF(("tcic id: 0x%02x\n", val));
190 			if (tcic_chipid_known(val))
191 				found++;
192 		}
193 	}
194 	else {
195 		DPRINTF(("tcic: reserved bits didn't check OK\n"));
196 	}
197 
198 	bus_space_unmap(iot, ioh, TCIC_IOSIZE);
199 	bus_space_unmap(ia->ia_memt, memh, msize);
200 
201 	if (!found)
202 		return (0);
203 
204 	ia->ia_nio = 1;
205 	ia->ia_io[0].ir_size = TCIC_IOSIZE;
206 
207 	ia->ia_niomem = 1;
208 	ia->ia_iomem[0].ir_size = msize;
209 
210 	/* IRQ is special. */
211 
212 	ia->ia_ndrq = 0;
213 
214 	return (1);
215 }
216 
217 void
218 tcic_isa_attach(struct device *parent, struct device *self, void *aux)
219 {
220 	struct tcic_softc *sc = (void *) self;
221 	struct isa_attach_args *ia = aux;
222 	isa_chipset_tag_t ic = ia->ia_ic;
223 	bus_space_tag_t iot = ia->ia_iot;
224 	bus_space_tag_t memt = ia->ia_memt;
225 	bus_space_handle_t ioh;
226 	bus_space_handle_t memh;
227 
228 	/* Map i/o space. */
229 	if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) {
230 		printf(": can't map i/o space\n");
231 		return;
232 	}
233 
234 	/* Map mem space. */
235 	if (bus_space_map(memt, ia->ia_iomem[0].ir_addr,
236 	    ia->ia_iomem[0].ir_size, 0, &memh)) {
237 		printf(": can't map mem space\n");
238 		return;
239 	}
240 
241 	sc->membase = ia->ia_iomem[0].ir_addr;
242 	sc->subregionmask =
243 	    (1 << (ia->ia_iomem[0].ir_size / TCIC_MEM_PAGESIZE)) - 1;
244 	sc->memsize2 = tcic_log2((u_int)ia->ia_iomem[0].ir_size);
245 
246 	sc->intr_est = ic;
247 	sc->pct = (pcmcia_chipset_tag_t) & tcic_isa_functions;
248 
249 	sc->iot = iot;
250 	sc->ioh = ioh;
251 	sc->memt = memt;
252 	sc->memh = memh;
253 
254 	/*
255 	 * determine chip type and initialise some chip type dependend
256 	 * parameters in softc.
257 	 */
258 	sc->chipid = tcic_chipid(iot, ioh);
259 	sc->validirqs = tcic_validirqs(sc->chipid);
260 
261 	/*
262 	 * allocate an irq.  interrupts are relatively
263 	 * scarce but for TCIC controllers very infrequent.
264 	 */
265 
266 	if (ia->ia_nirq < 1)
267 		sc->irq = ISA_UNKNOWN_IRQ;
268 	else
269 		sc->irq = ia->ia_irq[0].ir_irq;
270 	if (sc->irq == ISA_UNKNOWN_IRQ) {
271 		if (isa_intr_alloc(ic,
272 		    sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
273 		    IST_EDGE, &sc->irq)) {
274 			aprint_normal("\n");
275 			aprint_error_dev(&sc->dev, "can't allocate interrupt\n");
276 			return;
277 		}
278 		printf(": using irq %d", sc->irq);
279 	}
280 	printf("\n");
281 
282 	tcic_attach(sc);
283 
284 
285 	/*
286 	 * XXX mycroft recommends I/O space range 0x400-0xfff.
287 	 */
288 
289 	/*
290 	 * XXX some hardware doesn't seem to grok addresses in 0x400 range--
291 	 * apparently missing a bit or more of address lines. (e.g.
292 	 * CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
293 	 * TravelMate 5000--not clear which is at fault)
294 	 *
295 	 * Add a kludge to detect 10 bit wide buses and deal with them,
296 	 * and also a config file option to override the probe.
297 	 */
298 
299 #if 0
300 	/*
301 	 * This is what we'd like to use, but...
302 	 */
303 	sc->iobase = 0x400;
304 	sc->iosize = 0xbff;
305 #else
306 	/*
307 	 * ...the above bus width probe doesn't always work.
308 	 * So, experimentation has shown the following range
309 	 * to not lose on systems that 0x300-0x3ff loses on
310 	 * (e.g. the NEC Versa 6030X).
311 	 */
312 	sc->iobase = 0x330;
313 	sc->iosize = 0x0cf;
314 #endif
315 
316 	DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n",
317 	    device_xname(&sc->dev), (long) sc->iobase,
318 	    (long) sc->iobase + sc->iosize));
319 
320 	if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) {
321 		sc->iobase = tcic_isa_alloc_iobase;
322 		sc->iosize = tcic_isa_alloc_iosize;
323 
324 		DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
325 		    "(config override)\n", device_xname(&sc->dev), (long) sc->iobase,
326 		    (long) sc->iobase + sc->iosize));
327 	}
328 	sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
329 	    tcic_intr, sc);
330 	if (sc->ih == NULL) {
331 		printf("%s: can't establish interrupt\n", device_xname(&sc->dev));
332 		return;
333 	}
334 
335 	tcic_attach_sockets(sc);
336 }
337 
338 void *
339 tcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
340 	pcmcia_chipset_handle_t pch;
341 	struct pcmcia_function *pf;
342 	int ipl;
343 	int (*fct)(void *);
344 	void *arg;
345 {
346 	struct tcic_handle *h = (struct tcic_handle *) pch;
347 	int irq, ist;
348 	void *ih;
349 
350 	DPRINTF(("%s: tcic_isa_chip_intr_establish\n", device_xname(&h->sc->dev)));
351 
352 	/* XXX should we convert level to pulse? -chb  */
353 	if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
354 		ist = IST_LEVEL;
355 	else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
356 		ist = IST_PULSE;
357 	else
358 		ist = IST_LEVEL;
359 
360 	if (isa_intr_alloc(h->sc->intr_est,
361 	    h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
362 		return (NULL);
363 	if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
364 	    fct, arg)) == NULL)
365 		return (NULL);
366 
367 	DPRINTF(("%s: intr estrablished\n", device_xname(&h->sc->dev)));
368 
369 	h->ih_irq = irq;
370 
371 	printf("%s: card irq %d\n", device_xname(h->pcmcia), irq);
372 
373 	return (ih);
374 }
375 
376 void
377 tcic_isa_chip_intr_disestablish(pch, ih)
378 	pcmcia_chipset_handle_t pch;
379 	void *ih;
380 {
381 	struct tcic_handle *h = (struct tcic_handle *) pch;
382 	int val, reg;
383 
384 	DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", device_xname(&h->sc->dev)));
385 
386 	h->ih_irq = 0;
387 
388 	reg = TCIC_IR_SCF1_N(h->sock);
389 	val = tcic_read_ind_2(h, reg);
390 	val &= ~TCIC_SCF1_IRQ_MASK;
391 	tcic_write_ind_2(h, reg, val);
392 
393 	isa_intr_disestablish(h->sc->intr_est, ih);
394 }
395