1 /* $NetBSD: sb.c,v 1.15 1994/12/17 18:45:11 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1991-1993 Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the Computer Systems 18 * Engineering Group at Lawrence Berkeley Laboratory. 19 * 4. Neither the name of the University nor of the Laboratory may be used 20 * to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/errno.h> 39 #include <sys/ioctl.h> 40 #include <sys/syslog.h> 41 #include <sys/device.h> 42 #include <sys/buf.h> 43 44 #include <machine/cpu.h> 45 #include <machine/pio.h> 46 47 #include <i386/isa/isavar.h> 48 #include <i386/isa/dmavar.h> 49 50 #include "sbreg.h" 51 52 /* 53 * Software state, per SoundBlaster card. 54 * The soundblaster has multiple functionality, which we must demultiplex. 55 * One approach is to have one major device number for the soundblaster card, 56 * and use different minor numbers to indicate which hardware function 57 * we want. This would make for one large driver. Instead our approach 58 * is to partition the design into a set of drivers that share an underlying 59 * piece of hardware. Most things are hard to share, for example, the audio 60 * and midi ports. For audio, we might want to mix two processes' signals, 61 * and for midi we might want to merge streams (this is hard due to 62 * running status). Moreover, we should be able to re-use the high-level 63 * modules with other kinds of hardware. In this module, we only handle the 64 * most basic communications with the sb card. 65 */ 66 struct sb_softc { 67 struct device sc_dev; /* base device */ 68 struct isadev sc_id; /* ISA device */ 69 struct intrhand sc_ih; /* interrupt vectoring */ 70 71 int sc_open; /* reference count of open calls */ 72 int sc_dmachan; /* dma channel */ 73 int sc_locked; /* true when doing HS DMA */ 74 int sc_iobase; /* I/O port base address */ 75 int sc_adacmode; /* low/high speed mode indicator */ 76 #define SB_ADAC_LS 0 77 #define SB_ADAC_HS 1 78 int sc_adactc; /* current adac time constant */ 79 u_long sc_interrupts; /* number of interrupts taken */ 80 void (*sc_intr)(void*); /* dma completion intr handler */ 81 void (*sc_mintr)(void*, int);/* midi input intr handler */ 82 void *sc_arg; /* arg for sc_intr() */ 83 }; 84 85 int sbreset __P((struct sb_softc *)); 86 void sb_spkron __P((struct sb_softc *)); 87 void sb_spkroff __P((struct sb_softc *)); 88 89 static int wdsp(int iobase, int v); 90 static int rdsp(int iobase); 91 92 #define splsb splhigh /* XXX */ 93 struct sb_softc *sb_softc; /* XXX */ 94 95 #ifndef NEWCONFIG 96 #define at_dma(flags, ptr, cc, chan) isa_dmastart(flags, ptr, cc, chan) 97 #endif 98 99 struct { 100 int wdsp; 101 int rdsp; 102 int wmidi; 103 } sberr; 104 105 int sbprobe __P((struct device *, void *, void *)); 106 #ifdef NEWCONFIG 107 void sbforceintr(void *); 108 #endif 109 void sbattach __P((struct device *, struct device *, void *)); 110 int sbintr __P((struct sb_softc *)); 111 112 struct cfdriver sbcd = { 113 NULL, "sb", sbprobe, sbattach, DV_DULL, sizeof(struct sb_softc) 114 }; 115 116 int 117 sbprobe(parent, match, aux) 118 struct device *parent; 119 void *match, *aux; 120 { 121 register struct sb_softc *sc = match; 122 register struct isa_attach_args *ia = aux; 123 register int iobase = ia->ia_iobase; 124 125 if (!SB_BASE_VALID(ia->ia_iobase)) { 126 printf("sb: configured iobase %d invalid\n", ia->ia_iobase); 127 return 0; 128 } 129 sc->sc_iobase = iobase; 130 if (sbreset(sc) < 0) { 131 printf("sb: couldn't reset card\n"); 132 return 0; 133 } 134 /* 135 * Cannot auto-discover DMA channel. 136 */ 137 if (!SB_DRQ_VALID(ia->ia_drq)) { 138 printf("sb: configured dma chan %d invalid\n", ia->ia_drq); 139 return 0; 140 } 141 #ifdef NEWCONFIG 142 /* 143 * If the IRQ wasn't compiled in, auto-detect it. 144 */ 145 if (ia->ia_irq == IRQUNK) { 146 ia->ia_irq = isa_discoverintr(sbforceintr, aux); 147 sbreset(iobase); 148 if (!SB_IRQ_VALID(ia->ia_irq)) { 149 printf("sb: couldn't auto-detect interrupt"); 150 return 0; 151 } 152 } else 153 #endif 154 if (!SB_IRQ_VALID(ia->ia_irq)) { 155 int irq = ia->ia_irq; 156 printf("sb: configured irq %d invalid\n", irq); 157 return 0; 158 } 159 ia->ia_iosize = SB_NPORT; 160 return 1; 161 } 162 163 #ifdef NEWCONFIG 164 void 165 sbforceintr(aux) 166 void *aux; 167 { 168 static char dmabuf; 169 struct isa_attach_args *ia = aux; 170 int iobase = ia->ia_iobase; 171 172 /* 173 * Set up a DMA read of one byte. 174 * XXX Note that at this point we haven't called 175 * at_setup_dmachan(). This is okay because it just 176 * allocates a buffer in case it needs to make a copy, 177 * and it won't need to make a copy for a 1 byte buffer. 178 * (I think that calling at_setup_dmachan() should be optional; 179 * if you don't call it, it will be called the first time 180 * it is needed (and you pay the latency). Also, you might 181 * never need the buffer anyway.) 182 */ 183 at_dma(B_READ, &dmabuf, 1, ia->ia_drq); 184 if (wdsp(iobase, SB_DSP_RDMA) == 0) { 185 (void)wdsp(iobase, 0); 186 (void)wdsp(iobase, 0); 187 } 188 } 189 #endif 190 191 void 192 sbattach(parent, self, aux) 193 struct device *parent, *self; 194 void *aux; 195 { 196 register struct sb_softc *sc = (struct sb_softc *)self; 197 struct isa_attach_args *ia = (struct isa_attach_args *)aux; 198 register int iobase = ia->ia_iobase; 199 register int vers; 200 201 /* XXX */ 202 sb_softc = sc; 203 204 sc->sc_iobase = iobase; 205 sc->sc_dmachan = ia->ia_drq; 206 sc->sc_locked = 0; 207 208 #ifdef NEWCONFIG 209 isa_establish(&sc->sc_id, &sc->sc_dev); 210 #endif 211 sc->sc_ih.ih_fun = sbintr; 212 sc->sc_ih.ih_arg = sc; 213 sc->sc_ih.ih_level = IPL_BIO; 214 intr_establish(ia->ia_irq, &sc->sc_ih); 215 216 #ifdef NEWCONFIG 217 /* 218 * We limit DMA transfers to a page, and use the generic DMA handling 219 * code in isa.c. This code can end up copying a buffer, but since 220 * the audio driver uses relative small buffers this isn't likely. 221 * 222 * This allocation scheme means that the maximum transfer is limited 223 * by the page size (rather than 64k). This is reasonable. For 4K 224 * pages, the transfer time at 48KHz is 4096 / 48000 = 85ms. This 225 * is plenty long enough to amortize any fixed time overhead. 226 */ 227 at_setup_dmachan(sc->sc_dmachan, NBPG); 228 #endif 229 230 vers = sbversion(sc); 231 printf(": dsp v%d.%d\n", vers >> 8, vers & 0xff); 232 } 233 234 #define SBUNIT(x) (minor(x) & 0xf) 235 236 struct sb_softc * 237 sbopen() 238 { 239 /* XXXX */ 240 struct sb_softc *sc = sb_softc; 241 242 if (sc == 0) 243 return 0; 244 245 if (sc->sc_open == 0 && sbreset(sc) == 0) { 246 sc->sc_open = 1; 247 sc->sc_mintr = 0; 248 sc->sc_intr = 0; 249 return sc; 250 } 251 return 0; 252 } 253 254 void 255 sbclose(sc) 256 struct sb_softc *sc; 257 { 258 259 sc->sc_open = 0; 260 sb_spkroff(sc); 261 sc->sc_intr = 0; 262 sc->sc_mintr = 0; 263 /* XXX this will turn off any dma */ 264 sbreset(sc); 265 } 266 267 /* 268 * Write a byte to the dsp. 269 * XXX We are at the mercy of the card as we use a 270 * polling loop and wait until it can take the byte. 271 */ 272 static int 273 wdsp(int iobase, int v) 274 { 275 register int i; 276 277 for (i = 100; --i >= 0; ) { 278 register u_char x; 279 x = inb(iobase + SBP_DSP_WSTAT); 280 delay(20); 281 if ((x & SB_DSP_BUSY) != 0) 282 continue; 283 outb(iobase + SBP_DSP_WRITE, v); 284 delay(20); 285 return 0; 286 } 287 ++sberr.wdsp; 288 return -1; 289 } 290 291 /* 292 * Read a byte from the DSP, using polling. 293 */ 294 int 295 rdsp(int iobase) 296 { 297 register int i; 298 299 for (i = 100; --i >= 0; ) { 300 register u_char x; 301 x = inb(iobase + SBP_DSP_RSTAT); 302 delay(20); 303 if ((x & SB_DSP_READY) == 0) 304 continue; 305 x = inb(iobase + SBP_DSP_READ); 306 delay(20); 307 return x; 308 } 309 ++sberr.rdsp; 310 return -1; 311 } 312 313 /* 314 * Reset the card. 315 * Return non-zero if the card isn't detected. 316 */ 317 int 318 sbreset(sc) 319 struct sb_softc *sc; 320 { 321 register int iobase = sc->sc_iobase; 322 register int i; 323 324 /* 325 * See SBK, section 11.3. 326 * We pulse a reset signal into the card. 327 * Gee, what a brilliant hardware design. 328 */ 329 outb(iobase + SBP_DSP_RESET, 1); 330 delay(20); 331 outb(iobase + SBP_DSP_RESET, 0); 332 delay(20); 333 if (rdsp(iobase) != SB_MAGIC) 334 return -1; 335 return 0; 336 } 337 338 /* 339 * Turn on the speaker. The SBK documention says this operation 340 * can take up to 1/10 of a second. Higher level layers should 341 * probably let the task sleep for this amount of time after 342 * calling here. Otherwise, things might not work (because 343 * wdsp() and rdsp() will probably timeout.) 344 * 345 * These engineers had their heads up their ass when 346 * they designed this card. 347 */ 348 void 349 sb_spkron(sc) 350 struct sb_softc *sc; 351 { 352 353 (void)wdsp(sc->sc_iobase, SB_DSP_SPKR_ON); 354 /* XXX bogus */ 355 delay(1000); 356 } 357 358 /* 359 * Turn off the speaker; see comment above. 360 */ 361 void 362 sb_spkroff(sc) 363 struct sb_softc *sc; 364 { 365 366 (void)wdsp(sc->sc_iobase, SB_DSP_SPKR_OFF); 367 } 368 369 /* 370 * Read the version number out of the card. Return major code 371 * in high byte, and minor code in low byte. 372 */ 373 int 374 sbversion(sc) 375 struct sb_softc *sc; 376 { 377 register int iobase = sc->sc_iobase; 378 int v; 379 380 if (wdsp(iobase, SB_DSP_VERSION) < 0) 381 return 0; 382 v = rdsp(iobase) << 8; 383 v |= rdsp(iobase); 384 return ((v >= 0) ? v : 0); 385 } 386 387 /* 388 * Halt a DMA in progress. A low-speed transfer can be 389 * resumed with sb_contdma(). 390 */ 391 void 392 sb_haltdma(sc) 393 struct sb_softc *sc; 394 { 395 396 if (sc->sc_locked) 397 sbreset(sc); 398 else 399 (void)wdsp(sc->sc_iobase, SB_DSP_HALT); 400 } 401 402 void 403 sb_contdma(sc) 404 struct sb_softc *sc; 405 { 406 407 (void)wdsp(sc->sc_iobase, SB_DSP_CONT); 408 } 409 410 /* 411 * Time constant routines follow. See SBK, section 12. 412 * Although they don't come out and say it (in the docs), 413 * the card clearly uses a 1MHz countdown timer, as the 414 * low-speed formula (p. 12-4) is: 415 * tc = 256 - 10^6 / sr 416 * In high-speed mode, the constant is the upper byte of a 16-bit counter, 417 * and a 256MHz clock is used: 418 * tc = 65536 - 256 * 10^ 6 / sr 419 * Since we can only use the upper byte of the HS TC, the two formulae 420 * are equivalent. (Why didn't they say so?) E.g., 421 * (65536 - 256 * 10 ^ 6 / x) >> 8 = 256 - 10^6 / x 422 * 423 * The crossover point (from low- to high-speed modes) is different 424 * for the SBPRO and SB20. The table on p. 12-5 gives the following data: 425 * 426 * SBPRO SB20 427 * ----- -------- 428 * input ls min 4 KHz 4 HJz 429 * input ls max 23 KHz 13 KHz 430 * input hs max 44.1 KHz 15 KHz 431 * output ls min 4 KHz 4 KHz 432 * output ls max 23 KHz 23 KHz 433 * output hs max 44.1 KHz 44.1 KHz 434 */ 435 #define SB_LS_MIN 0x06 /* 4000 Hz */ 436 #ifdef SBPRO 437 #define SB_ADC_LS_MAX 0xd4 /* 22727 Hz */ 438 #define SB_ADC_HS_MAX 0xe9 /* 43478 Hz */ 439 #else 440 #define SB_ADC_LS_MAX 0xb3 /* 12987 Hz */ 441 #define SB_ADC_HS_MAX 0xbd /* 14925 Hz */ 442 #endif 443 #define SB_DAC_LS_MAX 0xd4 /* 22727 Hz */ 444 #define SB_DAC_HS_MAX 0xe9 /* 43478 Hz */ 445 446 /* 447 * Convert a linear sampling rate into the DAC time constant. 448 * Set *mode to indicate the high/low-speed DMA operation. 449 * Because of limitations of the card, not all rates are possible. 450 * We return the time constant of the closest possible rate. 451 * The sampling rate limits are different for the DAC and ADC, 452 * so isdac indicates output, and !isdac indicates input. 453 */ 454 int 455 sb_srtotc(sr, mode, isdac) 456 int sr; 457 int *mode; 458 int isdac; 459 { 460 register int tc = 256 - 1000000 / sr; 461 462 if (tc < SB_LS_MIN) { 463 tc = SB_LS_MIN; 464 *mode = SB_ADAC_LS; 465 } else if (isdac) { 466 if (tc < SB_DAC_LS_MAX) 467 *mode = SB_ADAC_LS; 468 else { 469 *mode = SB_ADAC_HS; 470 if (tc > SB_DAC_HS_MAX) 471 tc = SB_DAC_HS_MAX; 472 } 473 } else { 474 if (tc < SB_ADC_LS_MAX) 475 *mode = SB_ADAC_LS; 476 else { 477 *mode = SB_ADAC_HS; 478 if (tc > SB_ADC_HS_MAX) 479 tc = SB_ADC_HS_MAX; 480 } 481 } 482 return tc; 483 } 484 485 /* 486 * Convert a DAC time constant to a sampling rate. 487 * See SBK, section 12. 488 */ 489 int 490 sb_tctosr(tc) 491 int tc; 492 { 493 return (1000000 / (256 - tc)); 494 } 495 496 int 497 sb_set_sr(sc, sr, isdac) 498 register struct sb_softc *sc; 499 u_long *sr; 500 int isdac; 501 { 502 register int tc; 503 int mode; 504 505 tc = sb_srtotc(*sr, &mode, isdac); 506 if (wdsp(sc->sc_iobase, SB_DSP_TIMECONST) < 0 || 507 wdsp(sc->sc_iobase, tc) < 0) 508 return -1; 509 510 *sr = sb_tctosr(tc); 511 sc->sc_adacmode = mode; 512 sc->sc_adactc = tc; 513 514 return 0; 515 } 516 517 int 518 sb_round_sr(sr, isdac) 519 u_long sr; 520 int isdac; 521 { 522 int mode, tc; 523 524 tc = sb_srtotc(sr, &mode, isdac); 525 return sb_tctosr(tc); 526 } 527 528 int 529 sb_dma_input(sc, p, cc, intr, arg) 530 struct sb_softc *sc; 531 void *p; 532 int cc; 533 void (*intr)(); 534 void *arg; 535 { 536 register int iobase; 537 538 at_dma(B_READ, p, cc, sc->sc_dmachan); 539 sc->sc_intr = intr; 540 sc->sc_arg = arg; 541 iobase = sc->sc_iobase; 542 --cc; 543 if (sc->sc_adacmode == SB_ADAC_LS) { 544 if (wdsp(iobase, SB_DSP_RDMA) < 0 || 545 wdsp(iobase, cc) < 0 || 546 wdsp(iobase, cc >> 8) < 0) { 547 sbreset(sc); 548 return EIO; 549 } 550 } else { 551 if (wdsp(iobase, SB_DSP_BLOCKSIZE) < 0 || 552 wdsp(iobase, cc) < 0 || 553 wdsp(iobase, cc >> 8) < 0 || 554 wdsp(iobase, SB_DSP_HS_INPUT) < 0) { 555 sbreset(sc); 556 return EIO; 557 } 558 sc->sc_locked = 1; 559 } 560 return 0; 561 } 562 563 int 564 sb_dma_output(sc, p, cc, intr, arg) 565 struct sb_softc *sc; 566 void *p; 567 int cc; 568 void (*intr)(); 569 void *arg; 570 { 571 register int iobase; 572 573 at_dma(B_WRITE, p, cc, sc->sc_dmachan); 574 sc->sc_intr = intr; 575 sc->sc_arg = arg; 576 iobase = sc->sc_iobase; 577 --cc; 578 if (sc->sc_adacmode == SB_ADAC_LS) { 579 if (wdsp(iobase, SB_DSP_WDMA) < 0 || 580 wdsp(iobase, cc) < 0 || 581 wdsp(iobase, cc >> 8) < 0) { 582 sbreset(sc); 583 return EIO; 584 } 585 } else { 586 if (wdsp(iobase, SB_DSP_BLOCKSIZE) < 0 || 587 wdsp(iobase, cc) < 0 || 588 wdsp(iobase, cc >> 8) < 0 || 589 wdsp(iobase, SB_DSP_HS_OUTPUT) < 0) { 590 sbreset(sc); 591 return EIO; 592 } 593 sc->sc_locked = 1; 594 } 595 return 0; 596 } 597 598 /* 599 * Only the DSP unit on the sound blaster generates interrupts. 600 * There are three cases of interrupt: reception of a midi byte 601 * (when mode is enabled), completion of dma transmission, or 602 * completion of a dma reception. The three modes are mutually 603 * exclusive so we know a priori which event has occurred. 604 */ 605 int 606 sbintr(sc) 607 register struct sb_softc *sc; 608 { 609 610 sc->sc_locked = 0; 611 /* clear interrupt */ 612 inb(sc->sc_iobase + SBP_DSP_RSTAT); 613 delay(20); 614 if (sc->sc_mintr != 0) { 615 int c = rdsp(sc->sc_iobase); 616 (*sc->sc_mintr)(sc->sc_arg, c); 617 } else if (sc->sc_intr != 0) 618 (*sc->sc_intr)(sc->sc_arg); 619 else 620 return 0; 621 return 1; 622 } 623 624 /* 625 * Enter midi uart mode and arrange for read interrupts 626 * to vector to `intr'. This puts the card in a mode 627 * which allows only midi I/O; the card must be reset 628 * to leave this mode. Unfortunately, the card does not 629 * use transmit interrupts, so bytes must be output 630 * using polling. To keep the polling overhead to a 631 * minimum, output should be driven off a timer. 632 * This is a little tricky since only 320us separate 633 * consecutive midi bytes. 634 */ 635 void 636 sb_set_midi_mode(sc, intr, arg) 637 struct sb_softc *sc; 638 void (*intr)(); 639 void *arg; 640 { 641 642 wdsp(sc->sc_iobase, SB_MIDI_UART_INTR); 643 sc->sc_mintr = intr; 644 sc->sc_intr = 0; 645 sc->sc_arg = arg; 646 } 647 648 /* 649 * Write a byte to the midi port, when in midi uart mode. 650 */ 651 void 652 sb_midi_output(sc, v) 653 struct sb_softc *sc; 654 int v; 655 { 656 657 if (wdsp(sc->sc_iobase, v) < 0) 658 ++sberr.wmidi; 659 } 660