1 /* $NetBSD: isadma.c,v 1.32 1997/09/05 01:48:33 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the ISA on-board DMA controller. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/proc.h> 47 #include <sys/device.h> 48 49 #include <vm/vm.h> 50 51 #include <machine/bus.h> 52 53 #include <dev/isa/isareg.h> 54 #include <dev/isa/isavar.h> 55 #include <dev/isa/isadmavar.h> 56 #include <dev/isa/isadmareg.h> 57 58 /* Used by isa_malloc() */ 59 #include <sys/malloc.h> 60 struct isa_mem { 61 struct device *isadev; 62 int chan; 63 bus_size_t size; 64 bus_addr_t addr; 65 caddr_t kva; 66 struct isa_mem *next; 67 } *isa_mem_head = 0; 68 69 /* 70 * High byte of DMA address is stored in this DMAPG register for 71 * the Nth DMA channel. 72 */ 73 static int dmapageport[2][4] = { 74 {0x7, 0x3, 0x1, 0x2}, 75 {0xf, 0xb, 0x9, 0xa} 76 }; 77 78 static u_int8_t dmamode[4] = { 79 DMA37MD_READ | DMA37MD_SINGLE, 80 DMA37MD_WRITE | DMA37MD_SINGLE, 81 DMA37MD_READ | DMA37MD_SINGLE | DMA37MD_LOOP, 82 DMA37MD_WRITE | DMA37MD_SINGLE | DMA37MD_LOOP 83 }; 84 85 static inline void isa_dmaunmask __P((struct isa_softc *, int)); 86 static inline void isa_dmamask __P((struct isa_softc *, int)); 87 88 static inline void 89 isa_dmaunmask(sc, chan) 90 struct isa_softc *sc; 91 int chan; 92 { 93 int ochan = chan & 3; 94 95 /* set dma channel mode, and set dma channel mode */ 96 if ((chan & 4) == 0) 97 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 98 DMA1_SMSK, ochan | DMA37SM_CLEAR); 99 else 100 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 101 DMA2_SMSK, ochan | DMA37SM_CLEAR); 102 } 103 104 static inline void 105 isa_dmamask(sc, chan) 106 struct isa_softc *sc; 107 int chan; 108 { 109 int ochan = chan & 3; 110 111 /* set dma channel mode, and set dma channel mode */ 112 if ((chan & 4) == 0) { 113 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 114 DMA1_SMSK, ochan | DMA37SM_SET); 115 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 116 DMA1_FFC, 0); 117 } else { 118 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 119 DMA2_SMSK, ochan | DMA37SM_SET); 120 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 121 DMA2_FFC, 0); 122 } 123 } 124 125 /* 126 * isa_dmacascade(): program 8237 DMA controller channel to accept 127 * external dma control by a board. 128 */ 129 void 130 isa_dmacascade(isadev, chan) 131 struct device *isadev; 132 int chan; 133 { 134 struct isa_softc *sc = (struct isa_softc *)isadev; 135 int ochan = chan & 3; 136 137 if (chan < 0 || chan > 7) { 138 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 139 goto lose; 140 } 141 142 if (ISA_DRQ_ISFREE(sc, chan) == 0) { 143 printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan); 144 goto lose; 145 } 146 147 ISA_DRQ_ALLOC(sc, chan); 148 149 /* set dma channel mode, and set dma channel mode */ 150 if ((chan & 4) == 0) 151 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, 152 DMA1_MODE, ochan | DMA37MD_CASCADE); 153 else 154 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, 155 DMA2_MODE, ochan | DMA37MD_CASCADE); 156 157 isa_dmaunmask(sc, chan); 158 return; 159 160 lose: 161 panic("isa_dmacascade"); 162 } 163 164 int 165 isa_dmamap_create(isadev, chan, size, flags) 166 struct device *isadev; 167 int chan; 168 bus_size_t size; 169 int flags; 170 { 171 struct isa_softc *sc = (struct isa_softc *)isadev; 172 bus_size_t maxsize; 173 174 if (chan < 0 || chan > 7) { 175 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 176 goto lose; 177 } 178 179 if (chan & 4) 180 maxsize = (1 << 17); 181 else 182 maxsize = (1 << 16); 183 184 if (size > maxsize) 185 return (EINVAL); 186 187 if (ISA_DRQ_ISFREE(sc, chan) == 0) { 188 printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan); 189 goto lose; 190 } 191 192 ISA_DRQ_ALLOC(sc, chan); 193 194 return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize, 195 flags, &sc->sc_dmamaps[chan])); 196 197 lose: 198 panic("isa_dmamap_create"); 199 } 200 201 void 202 isa_dmamap_destroy(isadev, chan) 203 struct device *isadev; 204 int chan; 205 { 206 struct isa_softc *sc = (struct isa_softc *)isadev; 207 208 if (chan < 0 || chan > 7) { 209 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 210 goto lose; 211 } 212 213 if (ISA_DRQ_ISFREE(sc, chan)) { 214 printf("%s: drq %d is already free\n", 215 sc->sc_dev.dv_xname, chan); 216 goto lose; 217 } 218 219 ISA_DRQ_FREE(sc, chan); 220 221 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]); 222 return; 223 224 lose: 225 panic("isa_dmamap_destroy"); 226 } 227 228 /* 229 * isa_dmastart(): program 8237 DMA controller channel and set it 230 * in motion. 231 */ 232 int 233 isa_dmastart(isadev, chan, addr, nbytes, p, flags, busdmaflags) 234 struct device *isadev; 235 int chan; 236 void *addr; 237 bus_size_t nbytes; 238 struct proc *p; 239 int flags; 240 int busdmaflags; 241 { 242 struct isa_softc *sc = (struct isa_softc *)isadev; 243 bus_dmamap_t dmam; 244 bus_addr_t dmaaddr; 245 int waport; 246 int ochan = chan & 3; 247 int error; 248 249 if (chan < 0 || chan > 7) { 250 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 251 goto lose; 252 } 253 254 #ifdef ISADMA_DEBUG 255 printf("isa_dmastart: drq %d, addr %p, nbytes 0x%lx, p %p, " 256 "flags 0x%x, dmaflags 0x%x\n", 257 chan, addr, nbytes, p, flags, busdmaflags); 258 #endif 259 260 if (chan & 4) { 261 if (nbytes > (1 << 17) || nbytes & 1 || (u_long)addr & 1) { 262 printf("%s: drq %d, nbytes 0x%lx, addr %p\n", 263 sc->sc_dev.dv_xname, chan, nbytes, addr); 264 goto lose; 265 } 266 } else { 267 if (nbytes > (1 << 16)) { 268 printf("%s: drq %d, nbytes 0x%lx\n", 269 sc->sc_dev.dv_xname, chan, nbytes); 270 goto lose; 271 } 272 } 273 274 dmam = sc->sc_dmamaps[chan]; 275 if (dmam == NULL) 276 panic("isa_dmastart: no DMA map for chan %d\n", chan); 277 278 error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes, 279 p, busdmaflags); 280 if (error) 281 return (error); 282 283 #ifdef ISADMA_DEBUG 284 __asm(".globl isa_dmastart_afterload ; isa_dmastart_afterload:"); 285 #endif 286 287 if (flags & DMAMODE_READ) { 288 bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREREAD); 289 sc->sc_dmareads |= (1 << chan); 290 } else { 291 bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREWRITE); 292 sc->sc_dmareads &= ~(1 << chan); 293 } 294 295 dmaaddr = dmam->dm_segs[0].ds_addr; 296 297 #ifdef ISADMA_DEBUG 298 printf(" dmaaddr 0x%lx\n", dmaaddr); 299 300 __asm(".globl isa_dmastart_aftersync ; isa_dmastart_aftersync:"); 301 #endif 302 303 sc->sc_dmalength[chan] = nbytes; 304 305 isa_dmamask(sc, chan); 306 sc->sc_dmafinished &= ~(1 << chan); 307 308 if ((chan & 4) == 0) { 309 /* set dma channel mode */ 310 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE, 311 ochan | dmamode[flags]); 312 313 /* send start address */ 314 waport = DMA1_CHN(ochan); 315 bus_space_write_1(sc->sc_iot, sc->sc_dmapgh, 316 dmapageport[0][ochan], (dmaaddr >> 16) & 0xff); 317 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport, 318 dmaaddr & 0xff); 319 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport, 320 (dmaaddr >> 8) & 0xff); 321 322 /* send count */ 323 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1, 324 (--nbytes) & 0xff); 325 bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1, 326 (nbytes >> 8) & 0xff); 327 } else { 328 /* set dma channel mode */ 329 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE, 330 ochan | dmamode[flags]); 331 332 /* send start address */ 333 waport = DMA2_CHN(ochan); 334 bus_space_write_1(sc->sc_iot, sc->sc_dmapgh, 335 dmapageport[1][ochan], (dmaaddr >> 16) & 0xff); 336 dmaaddr >>= 1; 337 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport, 338 dmaaddr & 0xff); 339 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport, 340 (dmaaddr >> 8) & 0xff); 341 342 /* send count */ 343 nbytes >>= 1; 344 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2, 345 (--nbytes) & 0xff); 346 bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2, 347 (nbytes >> 8) & 0xff); 348 } 349 350 isa_dmaunmask(sc, chan); 351 return (0); 352 353 lose: 354 panic("isa_dmastart"); 355 } 356 357 void 358 isa_dmaabort(isadev, chan) 359 struct device *isadev; 360 int chan; 361 { 362 struct isa_softc *sc = (struct isa_softc *)isadev; 363 364 if (chan < 0 || chan > 7) { 365 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 366 panic("isa_dmaabort"); 367 } 368 369 isa_dmamask(sc, chan); 370 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]); 371 sc->sc_dmareads &= ~(1 << chan); 372 } 373 374 bus_size_t 375 isa_dmacount(isadev, chan) 376 struct device *isadev; 377 int chan; 378 { 379 struct isa_softc *sc = (struct isa_softc *)isadev; 380 int waport; 381 bus_size_t nbytes; 382 int ochan = chan & 3; 383 384 if (chan < 0 || chan > 7) { 385 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 386 panic("isa_dmacount"); 387 } 388 389 isa_dmamask(sc, chan); 390 391 /* 392 * We have to shift the byte count by 1. If we're in auto-initialize 393 * mode, the count may have wrapped around to the initial value. We 394 * can't use the TC bit to check for this case, so instead we compare 395 * against the original byte count. 396 * If we're not in auto-initialize mode, then the count will wrap to 397 * -1, so we also handle that case. 398 */ 399 if ((chan & 4) == 0) { 400 waport = DMA1_CHN(ochan); 401 nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h, 402 waport + 1) + 1; 403 nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h, 404 waport + 1) << 8; 405 nbytes &= 0xffff; 406 } else { 407 waport = DMA2_CHN(ochan); 408 nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h, 409 waport + 2) + 1; 410 nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h, 411 waport + 2) << 8; 412 nbytes <<= 1; 413 nbytes &= 0x1ffff; 414 } 415 416 if (nbytes == sc->sc_dmalength[chan]) 417 nbytes = 0; 418 419 isa_dmaunmask(sc, chan); 420 return (nbytes); 421 } 422 423 int 424 isa_dmafinished(isadev, chan) 425 struct device *isadev; 426 int chan; 427 { 428 struct isa_softc *sc = (struct isa_softc *)isadev; 429 430 if (chan < 0 || chan > 7) { 431 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 432 panic("isa_dmafinished"); 433 } 434 435 /* check that the terminal count was reached */ 436 if ((chan & 4) == 0) 437 sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot, 438 sc->sc_dma1h, DMA1_SR) & 0x0f; 439 else 440 sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot, 441 sc->sc_dma2h, DMA2_SR) & 0x0f) << 4; 442 443 return ((sc->sc_dmafinished & (1 << chan)) != 0); 444 } 445 446 void 447 isa_dmadone(isadev, chan) 448 struct device *isadev; 449 int chan; 450 { 451 struct isa_softc *sc = (struct isa_softc *)isadev; 452 bus_dmamap_t dmam; 453 454 if (chan < 0 || chan > 7) { 455 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 456 panic("isa_dmadone"); 457 } 458 459 dmam = sc->sc_dmamaps[chan]; 460 461 isa_dmamask(sc, chan); 462 463 if (isa_dmafinished(isadev, chan) == 0) 464 printf("%s: isa_dmadone: channel %d not finished\n", 465 sc->sc_dev.dv_xname, chan); 466 467 bus_dmamap_sync(sc->sc_dmat, dmam, 468 (sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD : 469 BUS_DMASYNC_POSTWRITE); 470 471 bus_dmamap_unload(sc->sc_dmat, dmam); 472 sc->sc_dmareads &= ~(1 << chan); 473 } 474 475 int 476 isa_dmamem_alloc(isadev, chan, size, addrp, flags) 477 struct device *isadev; 478 int chan; 479 bus_size_t size; 480 bus_addr_t *addrp; 481 int flags; 482 { 483 struct isa_softc *sc = (struct isa_softc *)isadev; 484 bus_dma_segment_t seg; 485 int error, boundary, rsegs; 486 487 if (chan < 0 || chan > 7) { 488 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 489 panic("isa_dmamem_alloc"); 490 } 491 492 boundary = (chan & 4) ? (1 << 17) : (1 << 16); 493 494 size = round_page(size); 495 496 error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary, 497 &seg, 1, &rsegs, flags); 498 if (error) 499 return (error); 500 501 *addrp = seg.ds_addr; 502 return (0); 503 } 504 505 void 506 isa_dmamem_free(isadev, chan, addr, size) 507 struct device *isadev; 508 int chan; 509 bus_addr_t addr; 510 bus_size_t size; 511 { 512 struct isa_softc *sc = (struct isa_softc *)isadev; 513 bus_dma_segment_t seg; 514 515 if (chan < 0 || chan > 7) { 516 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 517 panic("isa_dmamem_free"); 518 } 519 520 seg.ds_addr = addr; 521 seg.ds_len = size; 522 523 bus_dmamem_free(sc->sc_dmat, &seg, 1); 524 } 525 526 int 527 isa_dmamem_map(isadev, chan, addr, size, kvap, flags) 528 struct device *isadev; 529 int chan; 530 bus_addr_t addr; 531 bus_size_t size; 532 caddr_t *kvap; 533 int flags; 534 { 535 struct isa_softc *sc = (struct isa_softc *)isadev; 536 bus_dma_segment_t seg; 537 538 if (chan < 0 || chan > 7) { 539 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 540 panic("isa_dmamem_map"); 541 } 542 543 seg.ds_addr = addr; 544 seg.ds_len = size; 545 546 return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags)); 547 } 548 549 void 550 isa_dmamem_unmap(isadev, chan, kva, size) 551 struct device *isadev; 552 int chan; 553 caddr_t kva; 554 size_t size; 555 { 556 struct isa_softc *sc = (struct isa_softc *)isadev; 557 558 if (chan < 0 || chan > 7) { 559 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 560 panic("isa_dmamem_unmap"); 561 } 562 563 bus_dmamem_unmap(sc->sc_dmat, kva, size); 564 } 565 566 int 567 isa_dmamem_mmap(isadev, chan, addr, size, off, prot, flags) 568 struct device *isadev; 569 int chan; 570 bus_addr_t addr; 571 bus_size_t size; 572 int off, prot, flags; 573 { 574 struct isa_softc *sc = (struct isa_softc *)isadev; 575 bus_dma_segment_t seg; 576 577 if (chan < 0 || chan > 7) { 578 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 579 panic("isa_dmamem_mmap"); 580 } 581 582 seg.ds_addr = addr; 583 seg.ds_len = size; 584 585 return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags)); 586 } 587 588 int 589 isa_drq_isfree(isadev, chan) 590 struct device *isadev; 591 int chan; 592 { 593 struct isa_softc *sc = (struct isa_softc *)isadev; 594 if (chan < 0 || chan > 7) { 595 printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan); 596 panic("isa_drq_isfree"); 597 } 598 return ISA_DRQ_ISFREE(sc, chan); 599 } 600 601 void * 602 isa_malloc(isadev, chan, size, pool, flags) 603 struct device *isadev; 604 int chan; 605 size_t size; 606 int pool; 607 int flags; 608 { 609 bus_addr_t addr; 610 caddr_t kva; 611 int bflags; 612 struct isa_mem *m; 613 614 bflags = flags & M_WAITOK ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT; 615 616 if (isa_dmamem_alloc(isadev, chan, size, &addr, bflags)) 617 return 0; 618 if (isa_dmamem_map(isadev, chan, addr, size, &kva, bflags)) { 619 isa_dmamem_free(isadev, chan, addr, size); 620 return 0; 621 } 622 m = malloc(sizeof(*m), pool, flags); 623 if (m == 0) { 624 isa_dmamem_unmap(isadev, chan, kva, size); 625 isa_dmamem_free(isadev, chan, addr, size); 626 return 0; 627 } 628 m->isadev = isadev; 629 m->chan = chan; 630 m->size = size; 631 m->addr = addr; 632 m->kva = kva; 633 m->next = isa_mem_head; 634 isa_mem_head = m; 635 return (void *)kva; 636 } 637 638 void 639 isa_free(addr, pool) 640 void *addr; 641 int pool; 642 { 643 struct isa_mem **mp, *m; 644 caddr_t kva = (caddr_t)addr; 645 646 for(mp = &isa_mem_head; *mp && (*mp)->kva != kva; mp = &(*mp)->next) 647 ; 648 m = *mp; 649 if (!m) { 650 printf("isa_free: freeing unallocted memory\n"); 651 return; 652 } 653 *mp = m->next; 654 isa_dmamem_unmap(m->isadev, m->chan, kva, m->size); 655 isa_dmamem_free(m->isadev, m->chan, m->addr, m->size); 656 free(m, pool); 657 } 658 659 int 660 isa_mappage(mem, off, prot) 661 void *mem; 662 int off; 663 int prot; 664 { 665 struct isa_mem *m; 666 667 for(m = isa_mem_head; m && m->kva != (caddr_t)mem; m = m->next) 668 ; 669 if (!m) { 670 printf("isa_mappage: mapping unallocted memory\n"); 671 return -1; 672 } 673 return isa_dmamem_mmap(m->isadev, m->chan, m->addr, 674 m->size, off, prot, BUS_DMA_WAITOK); 675 } 676