1 /* $NetBSD: if_iy.c,v 1.99 2016/12/15 09:28:05 ozaki-r Exp $ */ 2 /* #define IYDEBUG */ 3 /* #define IYMEMDEBUG */ 4 5 /*- 6 * Copyright (c) 1996,2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Ignatios Souvatzis. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Supported hardware: 36 * 37 * - Intel EtherExpress Pro/10. 38 * - possibly other boards using the i82595 chip and no special tweaks. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: if_iy.c,v 1.99 2016/12/15 09:28:05 ozaki-r Exp $"); 43 44 #include "opt_inet.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/mbuf.h> 49 #include <sys/buf.h> 50 #include <sys/protosw.h> 51 #include <sys/socket.h> 52 #include <sys/ioctl.h> 53 #include <sys/errno.h> 54 #include <sys/syslog.h> 55 #include <sys/device.h> 56 #include <sys/endian.h> 57 #include <sys/rndsource.h> 58 59 #include <net/if.h> 60 #include <net/if_types.h> 61 #include <net/if_dl.h> 62 63 #include <net/if_ether.h> 64 65 #include <net/bpf.h> 66 #include <net/bpfdesc.h> 67 68 #ifdef INET 69 #include <netinet/in.h> 70 #include <netinet/in_systm.h> 71 #include <netinet/in_var.h> 72 #include <netinet/ip.h> 73 #include <netinet/if_inarp.h> 74 #endif 75 76 77 #if defined(SIOCSIFMEDIA) 78 #include <net/if_media.h> 79 #endif 80 81 #include <sys/cpu.h> 82 #include <sys/bus.h> 83 #include <sys/intr.h> 84 85 #include <dev/isa/isareg.h> 86 #include <dev/isa/isavar.h> 87 #include <dev/ic/i82595reg.h> 88 89 /* XXX why isn't this centralized? */ 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_stream_2 bus_space_write_2 92 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 93 #define bus_space_read_stream_2 bus_space_read_2 94 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 /* 98 * Ethernet status, per interface. 99 */ 100 struct iy_softc { 101 device_t sc_dev; 102 void *sc_ih; 103 104 bus_space_tag_t sc_iot; 105 bus_space_handle_t sc_ioh; 106 107 struct ethercom sc_ethercom; 108 109 struct ifmedia iy_ifmedia; 110 int iy_media; 111 112 int mappedirq; 113 114 int hard_vers; 115 116 int promisc; 117 118 int sram, tx_size, rx_size; 119 120 int tx_start, tx_end, tx_last; 121 int rx_start; 122 123 int doing_mc_setup; 124 #ifdef IYDEBUG 125 int sc_debug; 126 #endif 127 128 krndsource_t rnd_source; 129 }; 130 131 void iywatchdog(struct ifnet *); 132 int iyioctl(struct ifnet *, u_long, void *); 133 int iyintr(void *); 134 void iyinit(struct iy_softc *); 135 void iystop(struct iy_softc *); 136 void iystart(struct ifnet *); 137 138 void iy_intr_rx(struct iy_softc *); 139 void iy_intr_tx(struct iy_softc *); 140 141 void iyreset(struct iy_softc *); 142 void iy_readframe(struct iy_softc *, int); 143 void iy_drop_packet_buffer(struct iy_softc *); 144 void iy_find_mem_size(struct iy_softc *); 145 void iyrint(struct iy_softc *); 146 void iytint(struct iy_softc *); 147 void iyxmit(struct iy_softc *); 148 static void iy_mc_setup(struct iy_softc *); 149 static void iy_mc_reset(struct iy_softc *); 150 void iyget(struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int); 151 void iyprobemem(struct iy_softc *); 152 static inline void eepromwritebit(bus_space_tag_t, bus_space_handle_t, int); 153 static inline int eepromreadbit(bus_space_tag_t, bus_space_handle_t); 154 155 #ifdef IYDEBUGX 156 void print_rbd(volatile struct iy_recv_buf_desc *); 157 158 int in_ifrint = 0; 159 int in_iftint = 0; 160 #endif 161 162 int iy_mediachange(struct ifnet *); 163 void iy_mediastatus(struct ifnet *, struct ifmediareq *); 164 165 int iyprobe(device_t, cfdata_t, void *); 166 void iyattach(device_t, device_t, void *); 167 168 static u_int16_t eepromread(bus_space_tag_t, bus_space_handle_t, int); 169 170 static int eepromreadall(bus_space_tag_t, bus_space_handle_t, u_int16_t *, 171 int); 172 173 CFATTACH_DECL_NEW(iy, sizeof(struct iy_softc), 174 iyprobe, iyattach, NULL, NULL); 175 176 static u_int8_t eepro_irqmap[] = EEPP_INTMAP; 177 static u_int8_t eepro_revirqmap[] = EEPP_RINTMAP; 178 179 int 180 iyprobe(device_t parent, cfdata_t match, void *aux) 181 { 182 struct isa_attach_args *ia = aux; 183 u_int16_t eaddr[8]; 184 bus_space_tag_t iot; 185 bus_space_handle_t ioh; 186 u_int8_t c, d; 187 int irq; 188 189 if (ia->ia_nio < 1) 190 return (0); 191 if (ia->ia_nirq < 1) 192 return (0); 193 194 if (ISA_DIRECT_CONFIG(ia)) 195 return (0); 196 197 iot = ia->ia_iot; 198 199 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 200 return 0; 201 202 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) 203 return 0; 204 205 /* try to find the round robin sig: */ 206 207 c = bus_space_read_1(iot, ioh, ID_REG); 208 if ((c & ID_REG_MASK) != ID_REG_SIG) 209 goto out; 210 211 d = bus_space_read_1(iot, ioh, ID_REG); 212 if ((d & ID_REG_MASK) != ID_REG_SIG) 213 goto out; 214 215 if (((d-c) & R_ROBIN_BITS) != 0x40) 216 goto out; 217 218 d = bus_space_read_1(iot, ioh, ID_REG); 219 if ((d & ID_REG_MASK) != ID_REG_SIG) 220 goto out; 221 222 if (((d-c) & R_ROBIN_BITS) != 0x80) 223 goto out; 224 225 d = bus_space_read_1(iot, ioh, ID_REG); 226 if ((d & ID_REG_MASK) != ID_REG_SIG) 227 goto out; 228 229 if (((d-c) & R_ROBIN_BITS) != 0xC0) 230 goto out; 231 232 d = bus_space_read_1(iot, ioh, ID_REG); 233 if ((d & ID_REG_MASK) != ID_REG_SIG) 234 goto out; 235 236 if (((d-c) & R_ROBIN_BITS) != 0x00) 237 goto out; 238 239 #ifdef IYDEBUG 240 printf("iyprobe verified working ID reg.\n"); 241 #endif 242 243 if (eepromreadall(iot, ioh, eaddr, 8)) 244 goto out; 245 246 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 247 irq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 248 else 249 irq = ia->ia_irq[0].ir_irq; 250 251 if (irq >= sizeof(eepro_revirqmap)) 252 goto out; 253 254 if (eepro_revirqmap[irq] == 0xff) 255 goto out; 256 257 /* now lets reset the chip */ 258 259 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 260 delay(200); 261 262 ia->ia_nio = 1; 263 ia->ia_io[0].ir_size = 16; 264 265 ia->ia_nirq = 1; 266 ia->ia_irq[0].ir_irq = irq; 267 268 ia->ia_niomem = 0; 269 ia->ia_ndrq = 0; 270 271 bus_space_unmap(iot, ioh, 16); 272 return 1; /* found */ 273 out: 274 bus_space_unmap(iot, ioh, 16); 275 return 0; 276 } 277 278 void 279 iyattach(device_t parent, device_t self, void *aux) 280 { 281 struct iy_softc *sc = device_private(self); 282 struct isa_attach_args *ia = aux; 283 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 284 bus_space_tag_t iot; 285 bus_space_handle_t ioh; 286 unsigned temp; 287 u_int16_t eaddr[8]; 288 u_int8_t myaddr[ETHER_ADDR_LEN]; 289 int eirq; 290 291 iot = ia->ia_iot; 292 293 if (bus_space_map(iot, ia->ia_io[0].ir_addr, 16, 0, &ioh)) { 294 aprint_error(": can't map i/o space\n"); 295 return; 296 } 297 298 sc->sc_iot = iot; 299 sc->sc_ioh = ioh; 300 301 sc->mappedirq = eepro_revirqmap[ia->ia_irq[0].ir_irq]; 302 303 /* now let's reset the chip */ 304 305 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 306 delay(200); 307 308 iyprobemem(sc); 309 310 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 311 ifp->if_softc = sc; 312 ifp->if_start = iystart; 313 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS 314 | IFF_MULTICAST; 315 316 sc->doing_mc_setup = 0; 317 318 ifp->if_ioctl = iyioctl; 319 ifp->if_watchdog = iywatchdog; 320 321 IFQ_SET_READY(&ifp->if_snd); 322 323 (void)eepromreadall(iot, ioh, eaddr, 8); 324 sc->hard_vers = eaddr[EEPW6] & EEPP_BoardRev; 325 326 #ifdef DIAGNOSTICS 327 if ((eaddr[EEPPEther0] != 328 eepromread(iot, ioh, EEPPEther0a)) && 329 (eaddr[EEPPEther1] != 330 eepromread(iot, ioh, EEPPEther1a)) && 331 (eaddr[EEPPEther2] != 332 eepromread(iot, ioh, EEPPEther2a))) 333 334 aprint_error("EEPROM Ethernet address differs from copy\n"); 335 #endif 336 337 myaddr[1] = eaddr[EEPPEther0] & 0xFF; 338 myaddr[0] = eaddr[EEPPEther0] >> 8; 339 myaddr[3] = eaddr[EEPPEther1] & 0xFF; 340 myaddr[2] = eaddr[EEPPEther1] >> 8; 341 myaddr[5] = eaddr[EEPPEther2] & 0xFF; 342 myaddr[4] = eaddr[EEPPEther2] >> 8; 343 344 ifmedia_init(&sc->iy_ifmedia, 0, iy_mediachange, iy_mediastatus); 345 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_2, 0, NULL); 346 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL); 347 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL); 348 ifmedia_add(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 349 ifmedia_set(&sc->iy_ifmedia, IFM_ETHER | IFM_AUTO); 350 /* Attach the interface. */ 351 if_attach(ifp); 352 ether_ifattach(ifp, myaddr); 353 aprint_normal(": address %s, rev. %d, %d kB\n", 354 ether_sprintf(myaddr), 355 sc->hard_vers, sc->sram/1024); 356 357 eirq = eepro_irqmap[eaddr[EEPPW1] & EEPP_Int]; 358 if (eirq != ia->ia_irq[0].ir_irq) 359 aprint_error("%s: EEPROM irq setting %d ignored\n", 360 device_xname(sc->sc_dev), eirq); 361 362 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 363 IST_EDGE, IPL_NET, iyintr, sc); 364 365 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 366 RND_TYPE_NET, RND_FLAG_DEFAULT); 367 368 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 369 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 370 } 371 372 void 373 iystop(struct iy_softc *sc) 374 { 375 bus_space_tag_t iot; 376 bus_space_handle_t ioh; 377 #ifdef IYDEBUG 378 u_int p, v; 379 #endif 380 381 iot = sc->sc_iot; 382 ioh = sc->sc_ioh; 383 384 bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD); 385 386 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 387 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); 388 389 bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD); 390 delay(200); 391 #ifdef IYDEBUG 392 printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n", 393 device_xname(sc->sc_dev), sc->tx_start, sc->tx_end, sc->tx_last); 394 p = sc->tx_last; 395 if (!p) 396 p = sc->tx_start; 397 do { 398 char sbuf[128]; 399 400 bus_space_write_2(iot, ioh, HOST_ADDR_REG, p); 401 402 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 403 snprintb(sbuf, sizeof(sbuf), "\020\006Ab\010Dn", v); 404 printf("0x%04x: %s ", p, sbuf); 405 406 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 407 snprintb(sbuf, sizeof(sbuf), 408 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN" 409 "\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL", v); 410 printf("0x%s", sbuf); 411 412 p = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 413 printf(" 0x%04x", p); 414 415 v = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 416 snprintb(sbuf, sizeof(sbuf), "\020\020Ch", v); 417 printf(" 0x%s\n", sbuf); 418 419 } while (v & 0x8000); 420 #endif 421 sc->tx_start = sc->tx_end = sc->rx_size; 422 sc->tx_last = 0; 423 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 424 } 425 426 void 427 iyreset(struct iy_softc *sc) 428 { 429 int s; 430 s = splnet(); 431 iystop(sc); 432 iyinit(sc); 433 splx(s); 434 } 435 436 void 437 iyinit(struct iy_softc *sc) 438 { 439 int i; 440 unsigned temp; 441 struct ifnet *ifp; 442 bus_space_tag_t iot; 443 bus_space_handle_t ioh; 444 445 iot = sc->sc_iot; 446 ioh = sc->sc_ioh; 447 448 ifp = &sc->sc_ethercom.ec_if; 449 #ifdef IYDEBUG 450 printf("ifp is %p\n", ifp); 451 #endif 452 453 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 454 455 temp = bus_space_read_1(iot, ioh, EEPROM_REG); 456 if (temp & 0x10) 457 bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10); 458 459 for (i=0; i<6; ++i) { 460 bus_space_write_1(iot, ioh, I_ADD(i), CLLADDR(ifp->if_sadl)[i]); 461 } 462 463 temp = bus_space_read_1(iot, ioh, REG1); 464 bus_space_write_1(iot, ioh, REG1, 465 temp | /* XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP | */ RCV_DISCARD_BAD); 466 467 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 468 temp = MATCH_ALL; 469 } else 470 temp = MATCH_BRDCST; 471 472 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 473 474 #ifdef IYDEBUG 475 { 476 char sbuf[128]; 477 478 snprintb(sbuf, sizeof(sbuf), 479 "\020\1PRMSC\2NOBRDST\3SEECRC\4LENGTH\5NOSaIns\6MultiIA", 480 temp); 481 482 printf("%s: RECV_MODES set to %s\n", device_xname(sc->sc_dev), 483 sbuf); 484 } 485 #endif 486 /* XXX VOODOO */ 487 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 488 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 489 /* XXX END OF VOODOO */ 490 491 492 delay(500000); /* for the hardware to test for the connector */ 493 494 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 495 #ifdef IYDEBUG 496 { 497 char sbuf[128]; 498 499 snprintb(sbuf, sizeof(sbuf), 500 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 501 temp); 502 printf("%s: media select was 0x%s ", device_xname(sc->sc_dev), 503 sbuf); 504 } 505 #endif 506 temp = (temp & TEST_MODE_MASK); 507 508 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 509 case IFM_10_5: 510 temp &= ~ (BNC_BIT | TPE_BIT); 511 break; 512 513 case IFM_10_2: 514 temp = (temp & ~TPE_BIT) | BNC_BIT; 515 break; 516 517 case IFM_10_T: 518 temp = (temp & ~BNC_BIT) | TPE_BIT; 519 break; 520 default: 521 ; 522 /* nothing; leave as it is */ 523 } 524 switch (temp & (BNC_BIT | TPE_BIT)) { 525 case BNC_BIT: 526 sc->iy_media = IFM_ETHER | IFM_10_2; 527 break; 528 case TPE_BIT: 529 sc->iy_media = IFM_ETHER | IFM_10_T; 530 break; 531 default: 532 sc->iy_media = IFM_ETHER | IFM_10_5; 533 } 534 535 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 536 #ifdef IYDEBUG 537 { 538 char sbuf[128]; 539 540 snprintb(sbuf, sizeof(sbuf), 541 "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC", 542 temp); 543 printf("changed to 0x%s\n", sbuf); 544 } 545 #endif 546 547 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 548 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS); 549 bus_space_write_1(iot, ioh, 0, BANK_SEL(1)); 550 551 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 552 bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq); 553 554 #ifdef IYDEBUG 555 { 556 char sbuf[128]; 557 558 snprintb(sbuf, sizeof(sbuf), 559 "\020\4bad_irq\010flash/boot present", temp); 560 561 printf("%s: int no was %s\n", device_xname(sc->sc_dev), sbuf); 562 563 temp = bus_space_read_1(iot, ioh, INT_NO_REG); 564 snprintb(sbuf, sizeof(sbuf), 565 "\020\4bad_irq\010flash/boot present", temp); 566 printf("%s: int no now %s\n", device_xname(sc->sc_dev), sbuf); 567 } 568 #endif 569 570 bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0); 571 bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size -2) >>8); 572 bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >>8); 573 bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, (sc->sram - 2) >>8); 574 575 temp = bus_space_read_1(iot, ioh, REG1); 576 #ifdef IYDEBUG 577 { 578 char sbuf[128]; 579 580 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 581 temp); 582 583 printf("%s: HW access is %s\n", device_xname(sc->sc_dev), sbuf); 584 } 585 #endif 586 bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */ 587 588 #ifdef IYDEBUG 589 { 590 char sbuf[128]; 591 592 temp = bus_space_read_1(iot, ioh, REG1); 593 snprintb(sbuf, sizeof(sbuf), "\020\2WORD_WIDTH\010INT_ENABLE", 594 temp); 595 printf("%s: HW access is %s\n", device_xname(sc->sc_dev), sbuf); 596 } 597 #endif 598 599 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 600 601 bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT)); 602 bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */ 603 604 bus_space_write_1(iot, ioh, RCV_COPY_THRESHOLD, 0); 605 606 bus_space_write_2(iot, ioh, RCV_START_LOW, 0); 607 bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2); 608 sc->rx_start = 0; 609 610 bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD); 611 delay(200); 612 613 bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size); 614 615 sc->tx_start = sc->tx_end = sc->rx_size; 616 sc->tx_last = 0; 617 618 bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD); 619 620 ifp->if_flags |= IFF_RUNNING; 621 ifp->if_flags &= ~IFF_OACTIVE; 622 } 623 624 void 625 iystart(struct ifnet *ifp) 626 { 627 struct iy_softc *sc; 628 629 630 struct mbuf *m0, *m; 631 u_int len, pad, last, end; 632 u_int llen, residual; 633 int avail; 634 char *data; 635 unsigned temp; 636 u_int16_t resval, stat; 637 bus_space_tag_t iot; 638 bus_space_handle_t ioh; 639 640 #ifdef IYDEBUG 641 printf("iystart called\n"); 642 #endif 643 sc = ifp->if_softc; 644 645 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 646 return; 647 648 iy_intr_tx(sc); 649 650 iot = sc->sc_iot; 651 ioh = sc->sc_ioh; 652 653 for (;;) { 654 IFQ_POLL(&ifp->if_snd, m0); 655 if (m0 == NULL) 656 break; 657 #ifdef IYDEBUG 658 printf("%s: trying to write another packet to the hardware\n", 659 device_xname(sc->sc_dev)); 660 #endif 661 662 /* We need to use m->m_pkthdr.len, so require the header */ 663 if ((m0->m_flags & M_PKTHDR) == 0) 664 panic("iystart: no header mbuf"); 665 666 len = m0->m_pkthdr.len; 667 pad = len & 1; 668 669 #ifdef IYDEBUG 670 printf("%s: length is %d.\n", device_xname(sc->sc_dev), len); 671 #endif 672 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) { 673 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 674 } 675 676 if (len + pad > ETHER_MAX_LEN) { 677 /* packet is obviously too large: toss it */ 678 ++ifp->if_oerrors; 679 IFQ_DEQUEUE(&ifp->if_snd, m0); 680 m_freem(m0); 681 continue; 682 } 683 684 bpf_mtap(ifp, m0); 685 686 avail = sc->tx_start - sc->tx_end; 687 if (avail <= 0) 688 avail += sc->tx_size; 689 690 #ifdef IYDEBUG 691 printf("%s: avail is %d.\n", device_xname(sc->sc_dev), avail); 692 #endif 693 /* 694 * we MUST RUN at splnet here --- 695 * XXX todo: or even turn off the boards ints ??? hm... 696 */ 697 698 /* See if there is room to put another packet in the buffer. */ 699 700 if ((len+pad+2*I595_XMT_HDRLEN) > avail) { 701 #ifdef IYDEBUG 702 printf("%s: len = %d, avail = %d, setting OACTIVE\n", 703 device_xname(sc->sc_dev), len, avail); 704 #endif 705 /* mark interface as full ... */ 706 ifp->if_flags |= IFF_OACTIVE; 707 708 /* and wait for any transmission result */ 709 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 710 711 temp = bus_space_read_1(iot, ioh, REG1); 712 bus_space_write_1(iot, ioh, REG1, 713 temp & ~XMT_CHAIN_INT); 714 715 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 716 717 return; 718 } 719 720 /* we know it fits in the hardware now, so dequeue it */ 721 IFQ_DEQUEUE(&ifp->if_snd, m0); 722 723 last = sc->tx_end; 724 end = last + pad + len + I595_XMT_HDRLEN; 725 726 if (end >= sc->sram) { 727 if ((sc->sram - last) <= I595_XMT_HDRLEN) { 728 /* keep header in one piece */ 729 last = sc->rx_size; 730 end = last + pad + len + I595_XMT_HDRLEN; 731 } else 732 end -= sc->tx_size; 733 } 734 735 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 736 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 737 htole16(XMT_CMD)); 738 739 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 740 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 741 742 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 743 htole16(len + pad)); 744 745 residual = resval = 0; 746 747 while ((m = m0)!=0) { 748 data = mtod(m, void *); 749 llen = m->m_len; 750 if (residual) { 751 #ifdef IYDEBUG 752 printf("%s: merging residual with next mbuf.\n", 753 device_xname(sc->sc_dev)); 754 #endif 755 resval |= *data << 8; 756 bus_space_write_stream_2(iot, ioh, 757 MEM_PORT_REG, resval); 758 --llen; 759 ++data; 760 } 761 /* 762 * XXX ALIGNMENT LOSSAGE HERE. 763 */ 764 if (llen > 1) 765 bus_space_write_multi_stream_2(iot, ioh, 766 MEM_PORT_REG, (u_int16_t *) data, 767 llen>>1); 768 residual = llen & 1; 769 if (residual) { 770 resval = *(data + llen - 1); 771 #ifdef IYDEBUG 772 printf("%s: got odd mbuf to send.\n", 773 device_xname(sc->sc_dev)); 774 #endif 775 } 776 777 m0 = m_free(m); 778 } 779 780 if (residual) 781 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 782 resval); 783 784 pad >>= 1; 785 while (pad-- > 0) 786 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 0); 787 788 #ifdef IYDEBUG 789 printf("%s: new last = 0x%x, end = 0x%x.\n", 790 device_xname(sc->sc_dev), last, end); 791 printf("%s: old start = 0x%x, end = 0x%x, last = 0x%x\n", 792 device_xname(sc->sc_dev), sc->tx_start, sc->tx_end, 793 sc->tx_last); 794 #endif 795 796 if (sc->tx_start != sc->tx_end) { 797 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 798 sc->tx_last + XMT_COUNT); 799 800 /* 801 * XXX We keep stat in le order, to potentially save 802 * a byte swap. 803 */ 804 stat = bus_space_read_stream_2(iot, ioh, MEM_PORT_REG); 805 806 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 807 sc->tx_last + XMT_CHAIN); 808 809 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 810 htole16(last)); 811 812 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, 813 stat | htole16(CHAIN)); 814 #ifdef IYDEBUG 815 printf("%s: setting 0x%x to 0x%x\n", 816 device_xname(sc->sc_dev), sc->tx_last + XMT_COUNT, 817 le16toh(stat) | CHAIN); 818 #endif 819 } 820 stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 821 822 /* XXX todo: enable ints here if disabled */ 823 824 ++ifp->if_opackets; 825 826 if (sc->tx_start == sc->tx_end) { 827 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 828 bus_space_write_1(iot, ioh, 0, XMT_CMD); 829 sc->tx_start = last; 830 #ifdef IYDEBUG 831 printf("%s: writing 0x%x to XAR and giving XCMD\n", 832 device_xname(sc->sc_dev), last); 833 #endif 834 } else { 835 bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD); 836 #ifdef IYDEBUG 837 printf("%s: giving RESUME_XCMD\n", 838 device_xname(sc->sc_dev)); 839 #endif 840 } 841 sc->tx_last = last; 842 sc->tx_end = end; 843 } 844 /* and wait only for end of transmission chain */ 845 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 846 847 temp = bus_space_read_1(iot, ioh, REG1); 848 bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT); 849 850 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 851 } 852 853 854 static inline void 855 eepromwritebit(bus_space_tag_t iot, bus_space_handle_t ioh, int what) 856 { 857 bus_space_write_1(iot, ioh, EEPROM_REG, what); 858 delay(1); 859 bus_space_write_1(iot, ioh, EEPROM_REG, what|EESK); 860 delay(1); 861 bus_space_write_1(iot, ioh, EEPROM_REG, what); 862 delay(1); 863 } 864 865 static inline int 866 eepromreadbit(bus_space_tag_t iot, bus_space_handle_t ioh) 867 { 868 int b; 869 870 bus_space_write_1(iot, ioh, EEPROM_REG, EECS|EESK); 871 delay(1); 872 b = bus_space_read_1(iot, ioh, EEPROM_REG); 873 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); 874 delay(1); 875 876 return ((b & EEDO) != 0); 877 } 878 879 static u_int16_t 880 eepromread(bus_space_tag_t iot, bus_space_handle_t ioh, int offset) 881 { 882 volatile int i; 883 volatile int j; 884 volatile u_int16_t readval; 885 886 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 887 delay(1); 888 bus_space_write_1(iot, ioh, EEPROM_REG, EECS); /* XXXX??? */ 889 delay(1); 890 891 eepromwritebit(iot, ioh, EECS|EEDI); 892 eepromwritebit(iot, ioh, EECS|EEDI); 893 eepromwritebit(iot, ioh, EECS); 894 895 for (j=5; j>=0; --j) { 896 if ((offset>>j) & 1) 897 eepromwritebit(iot, ioh, EECS|EEDI); 898 else 899 eepromwritebit(iot, ioh, EECS); 900 } 901 902 for (readval=0, i=0; i<16; ++i) { 903 readval<<=1; 904 readval |= eepromreadbit(iot, ioh); 905 } 906 907 bus_space_write_1(iot, ioh, EEPROM_REG, 0|EESK); 908 delay(1); 909 bus_space_write_1(iot, ioh, EEPROM_REG, 0); 910 911 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 912 913 return readval; 914 } 915 916 /* 917 * Device timeout/watchdog routine. Entered if the device neglects to generate 918 * an interrupt after a transmit has been started on it. 919 */ 920 void 921 iywatchdog(struct ifnet *ifp) 922 { 923 struct iy_softc *sc = ifp->if_softc; 924 925 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 926 ++sc->sc_ethercom.ec_if.if_oerrors; 927 iyreset(sc); 928 } 929 930 /* 931 * What to do upon receipt of an interrupt. 932 */ 933 int 934 iyintr(void *arg) 935 { 936 struct iy_softc *sc; 937 struct ifnet *ifp; 938 bus_space_tag_t iot; 939 bus_space_handle_t ioh; 940 941 u_short status; 942 943 sc = arg; 944 iot = sc->sc_iot; 945 ioh = sc->sc_ioh; 946 947 ifp = &sc->sc_ethercom.ec_if; 948 949 status = bus_space_read_1(iot, ioh, STATUS_REG); 950 #ifdef IYDEBUG 951 if (status & ALL_INTS) { 952 char sbuf[128]; 953 954 snprintb(sbuf, sizeof(sbuf), "\020\1RX_STP\2RX\3TX\4EXEC", 955 status); 956 printf("%s: got interrupt %s", device_xname(sc->sc_dev), sbuf); 957 958 if (status & EXEC_INT) { 959 snprintb(sbuf, sizeof(sbuf), 960 "\020\6ABORT", bus_space_read_1(iot, ioh, 0)); 961 printf(" event %s\n", sbuf); 962 } else 963 printf("\n"); 964 } 965 #endif 966 if ((status & (RX_INT | TX_INT)) == 0) 967 return 0; 968 969 if (status & RX_INT) { 970 iy_intr_rx(sc); 971 bus_space_write_1(iot, ioh, STATUS_REG, RX_INT); 972 } 973 if (status & TX_INT) { 974 /* Tell feeders we may be able to accept more data... */ 975 ifp->if_flags &= ~IFF_OACTIVE; 976 /* and get more data. */ 977 iystart(ifp); 978 bus_space_write_1(iot, ioh, STATUS_REG, TX_INT); 979 } 980 981 rnd_add_uint32(&sc->rnd_source, status); 982 983 return 1; 984 } 985 986 void 987 iyget(struct iy_softc *sc, bus_space_tag_t iot, bus_space_handle_t ioh, 988 int rxlen) 989 { 990 struct mbuf *m, *top, **mp; 991 struct ifnet *ifp; 992 int len; 993 994 ifp = &sc->sc_ethercom.ec_if; 995 996 MGETHDR(m, M_DONTWAIT, MT_DATA); 997 if (m == 0) 998 goto dropped; 999 m_set_rcvif(m, ifp); 1000 m->m_pkthdr.len = rxlen; 1001 len = MHLEN; 1002 top = 0; 1003 mp = ⊤ 1004 1005 while (rxlen > 0) { 1006 if (top) { 1007 MGET(m, M_DONTWAIT, MT_DATA); 1008 if (m == 0) { 1009 m_freem(top); 1010 goto dropped; 1011 } 1012 len = MLEN; 1013 } 1014 if (rxlen >= MINCLSIZE) { 1015 MCLGET(m, M_DONTWAIT); 1016 if ((m->m_flags & M_EXT) == 0) { 1017 m_free(m); 1018 m_freem(top); 1019 goto dropped; 1020 } 1021 len = MCLBYTES; 1022 } 1023 len = min(rxlen, len); 1024 /* 1025 * XXX ALIGNMENT LOSSAGE HERE. 1026 */ 1027 if (len > 1) { 1028 len &= ~1; 1029 1030 bus_space_read_multi_stream_2(iot, ioh, MEM_PORT_REG, 1031 mtod(m, u_int16_t *), len/2); 1032 } else { 1033 #ifdef IYDEBUG 1034 printf("%s: received odd mbuf\n", 1035 device_xname(sc->sc_dev)); 1036 #endif 1037 *(mtod(m, char *)) = bus_space_read_stream_2(iot, ioh, 1038 MEM_PORT_REG); 1039 } 1040 m->m_len = len; 1041 rxlen -= len; 1042 *mp = m; 1043 mp = &m->m_next; 1044 } 1045 1046 if (top == NULL) 1047 return; 1048 1049 if_percpuq_enqueue(ifp->if_percpuq, top); 1050 return; 1051 1052 dropped: 1053 ++ifp->if_ierrors; 1054 return; 1055 } 1056 1057 void 1058 iy_intr_rx(struct iy_softc *sc) 1059 { 1060 bus_space_tag_t iot; 1061 bus_space_handle_t ioh; 1062 1063 u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen; 1064 1065 iot = sc->sc_iot; 1066 ioh = sc->sc_ioh; 1067 1068 rxadrs = sc->rx_start; 1069 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs); 1070 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, MEM_PORT_REG)); 1071 rxnext = 0; 1072 1073 while (rxevnt == RCV_DONE) { 1074 rxstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1075 MEM_PORT_REG)); 1076 rxnext = le16toh(bus_space_read_stream_2(iot, ioh, 1077 MEM_PORT_REG)); 1078 rxlen = le16toh(bus_space_read_stream_2(iot, ioh, 1079 MEM_PORT_REG)); 1080 #ifdef IYDEBUG 1081 { 1082 char sbuf[128]; 1083 1084 snprintb(sbuf, sizeof(sbuf), 1085 "\020\1RCLD\2IA_MCH\010SHORT\011OVRN\013ALGERR" 1086 "\014CRCERR\015LENERR\016RCVOK\020TYP", rxstatus); 1087 1088 printf("%s: pck at 0x%04x stat %s next 0x%x len 0x%x\n", 1089 device_xname(sc->sc_dev), rxadrs, sbuf, rxnext, 1090 rxlen); 1091 } 1092 #else 1093 __USE(rxstatus); 1094 #endif 1095 iyget(sc, iot, ioh, rxlen); 1096 1097 /* move stop address */ 1098 bus_space_write_2(iot, ioh, RCV_STOP_LOW, 1099 rxnext == 0 ? sc->rx_size - 2 : rxnext - 2); 1100 1101 bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext); 1102 rxadrs = rxnext; 1103 rxevnt = le16toh(bus_space_read_stream_2(iot, ioh, 1104 MEM_PORT_REG)); 1105 } 1106 sc->rx_start = rxnext; 1107 } 1108 1109 void 1110 iy_intr_tx(struct iy_softc *sc) 1111 { 1112 bus_space_tag_t iot; 1113 bus_space_handle_t ioh; 1114 struct ifnet *ifp; 1115 u_int txstatus, txstat2, txlen, txnext; 1116 1117 ifp = &sc->sc_ethercom.ec_if; 1118 iot = sc->sc_iot; 1119 ioh = sc->sc_ioh; 1120 1121 while (sc->tx_start != sc->tx_end) { 1122 bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start); 1123 txstatus = le16toh(bus_space_read_stream_2(iot, ioh, 1124 MEM_PORT_REG)); 1125 1126 if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD)) 1127 break; 1128 1129 txstat2 = le16toh(bus_space_read_stream_2(iot, ioh, 1130 MEM_PORT_REG)); 1131 txnext = le16toh(bus_space_read_stream_2(iot, ioh, 1132 MEM_PORT_REG)); 1133 txlen = le16toh(bus_space_read_stream_2(iot, ioh, 1134 MEM_PORT_REG)); 1135 #ifdef IYDEBUG 1136 { 1137 char sbuf[128]; 1138 1139 snprintb(sbuf, sizeof(sbuf), 1140 "\020\6MAX_COL\7HRT_BEAT\010TX_DEF" 1141 "\011UND_RUN\012JERR\013LST_CRS" 1142 "\014LTCOL\016TX_OK\020COLL", txstat2); 1143 1144 printf("txstat 0x%x stat2 0x%s next 0x%x len 0x%x\n", 1145 txstatus, sbuf, txnext, txlen); 1146 } 1147 #endif 1148 if (txlen & CHAIN) 1149 sc->tx_start = txnext; 1150 else 1151 sc->tx_start = sc->tx_end; 1152 ifp->if_flags &= ~IFF_OACTIVE; 1153 1154 if (txstat2 & 0x0020) 1155 ifp->if_collisions += 16; 1156 else 1157 ifp->if_collisions += txstat2 & 0x000f; 1158 1159 if ((txstat2 & 0x2000) == 0) 1160 ++ifp->if_oerrors; 1161 } 1162 } 1163 1164 int 1165 iyioctl(struct ifnet *ifp, u_long cmd, void *data) 1166 { 1167 struct iy_softc *sc; 1168 struct ifaddr *ifa; 1169 struct ifreq *ifr; 1170 int s, error = 0; 1171 1172 sc = ifp->if_softc; 1173 ifa = (struct ifaddr *)data; 1174 ifr = (struct ifreq *)data; 1175 1176 #ifdef IYDEBUG 1177 printf("iyioctl called with ifp %p (%s) cmd 0x%lx data %p\n", 1178 ifp, ifp->if_xname, cmd, data); 1179 #endif 1180 1181 s = splnet(); 1182 1183 switch (cmd) { 1184 1185 case SIOCINITIFADDR: 1186 ifp->if_flags |= IFF_UP; 1187 1188 iyinit(sc); 1189 switch (ifa->ifa_addr->sa_family) { 1190 #ifdef INET 1191 case AF_INET: 1192 arp_ifinit(ifp, ifa); 1193 break; 1194 #endif 1195 default: 1196 break; 1197 } 1198 break; 1199 1200 case SIOCSIFFLAGS: 1201 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1202 break; 1203 sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI); 1204 /* XXX re-use ether_ioctl() */ 1205 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1206 case IFF_RUNNING: 1207 /* 1208 * If interface is marked down and it is running, then 1209 * stop it. 1210 */ 1211 iystop(sc); 1212 ifp->if_flags &= ~IFF_RUNNING; 1213 break; 1214 case IFF_UP: 1215 /* 1216 * If interface is marked up and it is stopped, then 1217 * start it. 1218 */ 1219 iyinit(sc); 1220 break; 1221 default: 1222 /* 1223 * Reset the interface to pick up changes in any other 1224 * flags that affect hardware registers. 1225 */ 1226 iystop(sc); 1227 iyinit(sc); 1228 break; 1229 } 1230 #ifdef IYDEBUGX 1231 if (ifp->if_flags & IFF_DEBUG) 1232 sc->sc_debug = IFY_ALL; 1233 else 1234 sc->sc_debug = 0; 1235 #endif 1236 break; 1237 1238 case SIOCADDMULTI: 1239 case SIOCDELMULTI: 1240 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1241 /* 1242 * Multicast list has changed; set the hardware filter 1243 * accordingly. 1244 */ 1245 if (ifp->if_flags & IFF_RUNNING) { 1246 /* XXX can't make it work otherwise */ 1247 iyreset(sc); 1248 iy_mc_reset(sc); 1249 } 1250 error = 0; 1251 } 1252 break; 1253 1254 case SIOCSIFMEDIA: 1255 case SIOCGIFMEDIA: 1256 error = ifmedia_ioctl(ifp, ifr, &sc->iy_ifmedia, cmd); 1257 break; 1258 default: 1259 error = ether_ioctl(ifp, cmd, data); 1260 } 1261 splx(s); 1262 return error; 1263 } 1264 1265 int 1266 iy_mediachange(struct ifnet *ifp) 1267 { 1268 struct iy_softc *sc = ifp->if_softc; 1269 1270 if (IFM_TYPE(sc->iy_ifmedia.ifm_media) != IFM_ETHER) 1271 return EINVAL; 1272 switch(IFM_SUBTYPE(sc->iy_ifmedia.ifm_media)) { 1273 case IFM_10_5: 1274 case IFM_10_2: 1275 case IFM_10_T: 1276 case IFM_AUTO: 1277 iystop(sc); 1278 iyinit(sc); 1279 return 0; 1280 default: 1281 return EINVAL; 1282 } 1283 } 1284 1285 void 1286 iy_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 1287 { 1288 struct iy_softc *sc = ifp->if_softc; 1289 1290 ifmr->ifm_active = sc->iy_media; 1291 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; 1292 } 1293 1294 1295 static void 1296 iy_mc_setup(struct iy_softc *sc) 1297 { 1298 struct ether_multi *enm; 1299 struct ether_multistep step; 1300 struct ethercom *ecp; 1301 struct ifnet *ifp; 1302 bus_space_tag_t iot; 1303 bus_space_handle_t ioh; 1304 int avail, last /*, end*/ , len; 1305 int timeout; 1306 volatile u_int16_t dum; 1307 u_int8_t temp; 1308 1309 1310 ecp = &sc->sc_ethercom; 1311 ifp = &ecp->ec_if; 1312 1313 iot = sc->sc_iot; 1314 ioh = sc->sc_ioh; 1315 1316 len = 6 * ecp->ec_multicnt; 1317 1318 avail = sc->tx_start - sc->tx_end; 1319 if (avail <= 0) 1320 avail += sc->tx_size; 1321 if (ifp->if_flags & IFF_DEBUG) 1322 printf("%s: iy_mc_setup called, %d addresses, " 1323 "%d/%d bytes needed/avail\n", ifp->if_xname, 1324 ecp->ec_multicnt, len + I595_XMT_HDRLEN, avail); 1325 1326 last = sc->rx_size; 1327 1328 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1329 bus_space_write_1(iot, ioh, RECV_MODES_REG, MATCH_BRDCST); 1330 /* XXX VOODOO */ 1331 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1332 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1333 /* XXX END OF VOODOO */ 1334 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1335 bus_space_write_2(iot, ioh, HOST_ADDR_REG, last); 1336 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(MC_SETUP_CMD)); 1337 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1338 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1339 bus_space_write_stream_2(iot, ioh, MEM_PORT_REG, htole16(len)); 1340 1341 ETHER_FIRST_MULTI(step, ecp, enm); 1342 while(enm) { 1343 /* 1344 * XXX ALIGNMENT LOSSAGE HERE? 1345 */ 1346 bus_space_write_multi_stream_2(iot, ioh, MEM_PORT_REG, 1347 (u_int16_t *) enm->enm_addrlo, 3); 1348 1349 ETHER_NEXT_MULTI(step, enm); 1350 } 1351 dum = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */ 1352 __USE(dum); 1353 bus_space_write_2(iot, ioh, XMT_ADDR_REG, last); 1354 bus_space_write_1(iot, ioh, 0, MC_SETUP_CMD); 1355 1356 1357 sc->tx_start = sc->rx_size; 1358 sc->tx_end = sc->rx_size + I595_XMT_HDRLEN + len; 1359 1360 for (timeout=0; timeout<100; timeout++) { 1361 DELAY(2); 1362 if ((bus_space_read_1(iot, ioh, STATUS_REG) & EXEC_INT) == 0) 1363 continue; 1364 1365 temp = bus_space_read_1(iot, ioh, 0); 1366 bus_space_write_1(iot, ioh, STATUS_REG, EXEC_INT); 1367 #ifdef DIAGNOSTIC 1368 if (temp & 0x20) { 1369 aprint_error_dev(sc->sc_dev, 1370 "mc setup failed, %d usec\n", timeout * 2); 1371 } else if (((temp & 0x0f) == 0x03) && 1372 (ifp->if_flags & IFF_DEBUG)) { 1373 printf("%s: mc setup done, %d usec\n", 1374 device_xname(sc->sc_dev), timeout * 2); 1375 } 1376 #endif 1377 break; 1378 } 1379 sc->tx_start = sc->tx_end; 1380 ifp->if_flags &= ~IFF_OACTIVE; 1381 1382 } 1383 1384 static void 1385 iy_mc_reset(struct iy_softc *sc) 1386 { 1387 struct ether_multi *enm; 1388 struct ether_multistep step; 1389 struct ethercom *ecp; 1390 struct ifnet *ifp; 1391 bus_space_tag_t iot; 1392 bus_space_handle_t ioh; 1393 u_int16_t temp; 1394 1395 ecp = &sc->sc_ethercom; 1396 ifp = &ecp->ec_if; 1397 1398 iot = sc->sc_iot; 1399 ioh = sc->sc_ioh; 1400 1401 if (ecp->ec_multicnt > 63) { 1402 ifp->if_flags |= IFF_ALLMULTI; 1403 1404 } else if (ecp->ec_multicnt > 0) { 1405 /* 1406 * Step through the list of addresses. 1407 */ 1408 ETHER_FIRST_MULTI(step, ecp, enm); 1409 while(enm) { 1410 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { 1411 ifp->if_flags |= IFF_ALLMULTI; 1412 goto setupmulti; 1413 } 1414 ETHER_NEXT_MULTI(step, enm); 1415 } 1416 /* OK, we really need to do it now: */ 1417 #if 0 1418 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) 1419 != IFF_RUNNING) { 1420 ifp->if_flags |= IFF_OACTIVE; 1421 sc->want_mc_setup = 1; 1422 return; 1423 } 1424 #endif 1425 iy_mc_setup(sc); 1426 } else { 1427 ifp->if_flags &= ~IFF_ALLMULTI; 1428 } 1429 1430 setupmulti: 1431 bus_space_write_1(iot, ioh, 0, BANK_SEL(2)); 1432 if (ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) { 1433 temp = MATCH_ALL; 1434 } else 1435 temp = MATCH_BRDCST; 1436 1437 bus_space_write_1(iot, ioh, RECV_MODES_REG, temp); 1438 /* XXX VOODOO */ 1439 temp = bus_space_read_1(iot, ioh, MEDIA_SELECT); 1440 bus_space_write_1(iot, ioh, MEDIA_SELECT, temp); 1441 /* XXX END OF VOODOO */ 1442 1443 /* XXX TBD: setup hardware for all multicasts */ 1444 bus_space_write_1(iot, ioh, 0, BANK_SEL(0)); 1445 return; 1446 } 1447 1448 #ifdef IYDEBUGX 1449 void 1450 print_rbd(volatile struct ie_recv_buf_desc *rbd) 1451 { 1452 printf("RBD at %08lx:\nactual %04x, next %04x, buffer %08x\n" 1453 "length %04x, mbz %04x\n", (u_long)rbd, rbd->ie_rbd_actual, 1454 rbd->ie_rbd_next, rbd->ie_rbd_buffer, rbd->ie_rbd_length, 1455 rbd->mbz); 1456 } 1457 #endif 1458 1459 void 1460 iyprobemem(struct iy_softc *sc) 1461 { 1462 bus_space_tag_t iot; 1463 bus_space_handle_t ioh; 1464 int testing; 1465 1466 iot = sc->sc_iot; 1467 ioh = sc->sc_ioh; 1468 1469 bus_space_write_1(iot, ioh, COMMAND_REG, BANK_SEL(0)); 1470 delay(1); 1471 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2); 1472 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1473 1474 for (testing=65536; testing >= 4096; testing >>= 1) { 1475 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1476 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead); 1477 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1478 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) { 1479 #ifdef IYMEMDEBUG 1480 printf("%s: Didn't keep 0xdead at 0x%x\n", 1481 device_xname(sc->sc_dev), testing-2); 1482 #endif 1483 continue; 1484 } 1485 1486 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1487 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef); 1488 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2); 1489 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) { 1490 #ifdef IYMEMDEBUG 1491 printf("%s: Didn't keep 0xbeef at 0x%x\n", 1492 device_xname(sc->sc_dev), testing-2); 1493 #endif 1494 continue; 1495 } 1496 1497 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1498 bus_space_write_2(iot, ioh, MEM_PORT_REG, 0); 1499 bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1); 1500 bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1); 1501 bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0); 1502 if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) { 1503 #ifdef IYMEMDEBUG 1504 printf("%s: 0x%x alias of 0x0\n", 1505 device_xname(sc->sc_dev), testing >> 1); 1506 #endif 1507 continue; 1508 } 1509 1510 break; 1511 } 1512 1513 sc->sram = testing; 1514 1515 switch(testing) { 1516 case 65536: 1517 /* 4 NFS packets + overhead RX, 2 NFS + overhead TX */ 1518 sc->rx_size = 44*1024; 1519 break; 1520 1521 case 32768: 1522 /* 2 NFS packets + overhead RX, 1 NFS + overhead TX */ 1523 sc->rx_size = 22*1024; 1524 break; 1525 1526 case 16384: 1527 /* 1 NFS packet + overhead RX, 4 big packets TX */ 1528 sc->rx_size = 10*1024; 1529 break; 1530 default: 1531 sc->rx_size = testing/2; 1532 break; 1533 } 1534 sc->tx_size = testing - sc->rx_size; 1535 } 1536 1537 static int 1538 eepromreadall(bus_space_tag_t iot, bus_space_handle_t ioh, u_int16_t *wordp, 1539 int maxi) 1540 { 1541 int i; 1542 u_int16_t checksum, tmp; 1543 1544 checksum = 0; 1545 1546 for (i=0; i<EEPP_LENGTH; ++i) { 1547 tmp = eepromread(iot, ioh, i); 1548 checksum += tmp; 1549 if (i<maxi) 1550 wordp[i] = tmp; 1551 } 1552 1553 if (checksum != EEPP_CHKSUM) { 1554 #ifdef IYDEBUG 1555 printf("wrong EEPROM checksum 0x%x should be 0x%x\n", 1556 checksum, EEPP_CHKSUM); 1557 #endif 1558 return 1; 1559 } 1560 return 0; 1561 } 1562