xref: /netbsd-src/sys/dev/isa/if_ix.c (revision 4472dbe5e3bd91ef2540bada7a7ca7384627ff9b)
1 /*	$NetBSD: if_ix.c,v 1.6 1999/01/08 19:22:36 augustss Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Rafal K. Boni.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the NetBSD
21  *	Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/mbuf.h>
42 #include <sys/errno.h>
43 #include <sys/device.h>
44 #include <sys/protosw.h>
45 #include <sys/socket.h>
46 
47 #include <net/if.h>
48 #include <net/if_dl.h>
49 #include <net/if_types.h>
50 #include <net/if_media.h>
51 #include <net/if_ether.h>
52 
53 #include <vm/vm.h>
54 
55 #include <machine/cpu.h>
56 #include <machine/bus.h>
57 #include <machine/intr.h>
58 
59 #include <dev/isa/isareg.h>
60 #include <dev/isa/isavar.h>
61 
62 #include <dev/ic/i82586reg.h>
63 #include <dev/ic/i82586var.h>
64 #include <dev/isa/if_ixreg.h>
65 
66 #ifdef IX_DEBUG
67 #define DPRINTF(x)	printf x
68 #else
69 #define DPRINTF(x)
70 #endif
71 
72 int ix_media[] = {
73 	IFM_ETHER | IFM_10_5,
74 	IFM_ETHER | IFM_10_2,
75 	IFM_ETHER | IFM_10_T,
76 };
77 #define NIX_MEDIA       (sizeof(ix_media) / sizeof(ix_media[0]))
78 
79 struct ix_softc {
80 	struct ie_softc sc_ie;
81 
82 	bus_space_tag_t sc_regt;	/* space tag for registers */
83 	bus_space_handle_t sc_regh;	/* space handle for registers */
84 
85 	u_int16_t	irq_encoded;	/* encoded IRQ */
86 	void		*sc_ih;		/* interrupt handle */
87 };
88 
89 static void 	ix_reset __P((struct ie_softc *, int));
90 static void 	ix_atten __P((struct ie_softc *));
91 static int 	ix_intrhook __P((struct ie_softc *, int));
92 
93 static void     ix_copyin __P((struct ie_softc *, void *, int, size_t));
94 static void     ix_copyout __P((struct ie_softc *, const void *, int, size_t));
95 
96 static u_int16_t ix_read_16 __P((struct ie_softc *, int));
97 static void	ix_write_16 __P((struct ie_softc *, int, u_int16_t));
98 static void	ix_write_24 __P((struct ie_softc *, int, int));
99 
100 static void	ix_mediastatus __P((struct ie_softc *, struct ifmediareq *));
101 
102 static u_int16_t ix_read_eeprom __P((bus_space_tag_t, bus_space_handle_t, int));
103 static void	ix_eeprom_outbits __P((bus_space_tag_t, bus_space_handle_t, int, int));
104 static int	ix_eeprom_inbits  __P((bus_space_tag_t, bus_space_handle_t));
105 static void	ix_eeprom_clock   __P((bus_space_tag_t, bus_space_handle_t, int));
106 
107 int ix_match __P((struct device *, struct cfdata *, void *));
108 void ix_attach __P((struct device *, struct device *, void *));
109 
110 /*
111  * EtherExpress/16 support routines
112  */
113 static void
114 ix_reset(sc, why)
115 	struct ie_softc *sc;
116 	int why;
117 {
118 	struct ix_softc* isc = (struct ix_softc *) sc;
119 
120 	switch (why) {
121 	case CHIP_PROBE:
122 		bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL,
123 				  IX_RESET_586);
124 		delay(100);
125 		bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ECTRL, 0);
126 		delay(100);
127 		break;
128 
129 	case CARD_RESET:
130 		break;
131     }
132 }
133 
134 static void
135 ix_atten(sc)
136 	struct ie_softc *sc;
137 {
138 	struct ix_softc* isc = (struct ix_softc *) sc;
139 	bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_ATTN, 0);
140 }
141 
142 static u_int16_t
143 ix_read_eeprom(iot, ioh, location)
144 	bus_space_tag_t iot;
145 	bus_space_handle_t ioh;
146 	int location;
147 {
148 	int ectrl, edata;
149 
150 	ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
151 	ectrl &= IX_ECTRL_MASK;
152 	ectrl |= IX_ECTRL_EECS;
153 	bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
154 
155 	ix_eeprom_outbits(iot, ioh, IX_EEPROM_READ, IX_EEPROM_OPSIZE1);
156 	ix_eeprom_outbits(iot, ioh, location, IX_EEPROM_ADDR_SIZE);
157 	edata = ix_eeprom_inbits(iot, ioh);
158 	ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
159 	ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EEDI | IX_ECTRL_EECS);
160 	bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
161 	ix_eeprom_clock(iot, ioh, 1);
162 	ix_eeprom_clock(iot, ioh, 0);
163 	return (edata);
164 }
165 
166 static void
167 ix_eeprom_outbits(iot, ioh, edata, count)
168 	bus_space_tag_t iot;
169 	bus_space_handle_t ioh;
170 	int edata, count;
171 {
172 	int ectrl, i;
173 
174 	ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
175 	ectrl &= ~IX_RESET_ASIC;
176 	for (i = count - 1; i >= 0; i--) {
177 		ectrl &= ~IX_ECTRL_EEDI;
178 		if (edata & (1 << i)) {
179 			ectrl |= IX_ECTRL_EEDI;
180 		}
181 		bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
182 		delay(1);	/* eeprom data must be setup for 0.4 uSec */
183 		ix_eeprom_clock(iot, ioh, 1);
184 		ix_eeprom_clock(iot, ioh, 0);
185 	}
186 	ectrl &= ~IX_ECTRL_EEDI;
187 	bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
188 	delay(1);		/* eeprom data must be held for 0.4 uSec */
189 }
190 
191 static int
192 ix_eeprom_inbits(iot, ioh)
193 	bus_space_tag_t iot;
194 	bus_space_handle_t ioh;
195 {
196 	int ectrl, edata, i;
197 
198 	ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
199 	ectrl &= ~IX_RESET_ASIC;
200 	for (edata = 0, i = 0; i < 16; i++) {
201 		edata = edata << 1;
202 		ix_eeprom_clock(iot, ioh, 1);
203 		ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
204 		if (ectrl & IX_ECTRL_EEDO) {
205 			edata |= 1;
206 		}
207 		ix_eeprom_clock(iot, ioh, 0);
208 	}
209 	return (edata);
210 }
211 
212 static void
213 ix_eeprom_clock(iot, ioh, state)
214 	bus_space_tag_t iot;
215 	bus_space_handle_t ioh;
216 	int state;
217 {
218 	int ectrl;
219 
220 	ectrl = bus_space_read_1(iot, ioh, IX_ECTRL);
221 	ectrl &= ~(IX_RESET_ASIC | IX_ECTRL_EESK);
222 	if (state) {
223 		ectrl |= IX_ECTRL_EESK;
224 	}
225 	bus_space_write_1(iot, ioh, IX_ECTRL, ectrl);
226 	delay(9);		/* EESK must be stable for 8.38 uSec */
227 }
228 
229 static int
230 ix_intrhook(sc, where)
231 	struct ie_softc *sc;
232 	int where;
233 {
234 	struct ix_softc* isc = (struct ix_softc *) sc;
235 
236 	switch (where) {
237 	case INTR_ENTER:
238 		/* entering ISR: disable card interrupts */
239 		bus_space_write_1(isc->sc_regt, isc->sc_regh,
240 				  IX_IRQ, isc->irq_encoded);
241 		break;
242 
243 	case INTR_EXIT:
244 		/* exiting ISR: re-enable card interrupts */
245 		bus_space_write_1(isc->sc_regt, isc->sc_regh, IX_IRQ,
246     				  isc->irq_encoded | IX_IRQ_ENABLE);
247 	break;
248     }
249 
250     return 1;
251 }
252 
253 
254 static void
255 ix_copyin (sc, dst, offset, size)
256         struct ie_softc *sc;
257         void *dst;
258         int offset;
259         size_t size;
260 {
261 	int dribble;
262 	u_int8_t* bptr = dst;
263 
264 	bus_space_barrier(sc->bt, sc->bh, offset, size,
265 			  BUS_SPACE_BARRIER_READ);
266 
267 	if (offset % 2) {
268 		*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
269 		offset++; bptr++; size--;
270 	}
271 
272 	dribble = size % 2;
273 	bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
274 				size >> 1);
275 
276 	if (dribble) {
277 		bptr += size - 1;
278 		offset += size - 1;
279 		*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
280 	}
281 }
282 
283 static void
284 ix_copyout (sc, src, offset, size)
285         struct ie_softc *sc;
286         const void *src;
287         int offset;
288         size_t size;
289 {
290 	int dribble;
291 	int osize = size;
292 	int ooffset = offset;
293 	const u_int8_t* bptr = src;
294 
295 	if (offset % 2) {
296 		bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
297 		offset++; bptr++; size--;
298 	}
299 
300 	dribble = size % 2;
301 	bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr,
302 				 size >> 1);
303 	if (dribble) {
304 		bptr += size - 1;
305 		offset += size - 1;
306 		bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
307 	}
308 
309 	bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
310 			  BUS_SPACE_BARRIER_WRITE);
311 }
312 
313 static u_int16_t
314 ix_read_16 (sc, offset)
315         struct ie_softc *sc;
316         int offset;
317 {
318 	bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
319         return bus_space_read_2(sc->bt, sc->bh, offset);
320 }
321 
322 static void
323 ix_write_16 (sc, offset, value)
324         struct ie_softc *sc;
325         int offset;
326         u_int16_t value;
327 {
328         bus_space_write_2(sc->bt, sc->bh, offset, value);
329 	bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
330 }
331 
332 static void
333 ix_write_24 (sc, offset, addr)
334         struct ie_softc *sc;
335         int offset, addr;
336 {
337         bus_space_write_4(sc->bt, sc->bh, offset, addr +
338 			  (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
339 	bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
340 }
341 
342 static void
343 ix_mediastatus(sc, ifmr)
344         struct ie_softc *sc;
345         struct ifmediareq *ifmr;
346 {
347         struct ifmedia *ifm = &sc->sc_media;
348 
349         /*
350          * The currently selected media is always the active media.
351          */
352         ifmr->ifm_active = ifm->ifm_cur->ifm_media;
353 }
354 
355 int
356 ix_match(parent, cf, aux)
357 	struct device *parent;
358 	struct cfdata *cf;
359 	void *aux;
360 {
361 	int i;
362 	int rv = 0;
363 	bus_addr_t maddr;
364 	bus_size_t msize;
365 	u_short checksum = 0;
366 	bus_space_handle_t ioh;
367 	bus_space_tag_t iot;
368 	u_int8_t val, bart_config;
369 	u_short pg, adjust, decode, edecode;
370 	u_short board_id, id_var1, id_var2, irq, irq_encoded;
371 	struct isa_attach_args * const ia = aux;
372 	short irq_translate[] = {0, 0x09, 0x03, 0x04, 0x05, 0x0a, 0x0b, 0};
373 
374 	iot = ia->ia_iot;
375 
376 	if (bus_space_map(iot, ia->ia_iobase,
377 			  IX_IOSIZE, 0, &ioh) != 0) {
378 		DPRINTF(("Can't map io space at 0x%x\n", ia->ia_iobase));
379 		return (0);
380 	}
381 
382 	/* XXX: reset any ee16 at the current iobase */
383 	bus_space_write_1(iot, ioh, IX_ECTRL, IX_RESET_ASIC);
384 	bus_space_write_1(iot, ioh, IX_ECTRL, 0);
385 	delay(240);
386 
387 	/* now look for ee16. */
388 	board_id = id_var1 = id_var2 = 0;
389 	for (i = 0; i < 4 ; i++) {
390 		id_var1 = bus_space_read_1(iot, ioh, IX_ID_PORT);
391 		id_var2 = ((id_var1 & 0x03) << 2);
392 		board_id |= (( id_var1 >> 4)  << id_var2);
393 	}
394 
395 	if (board_id != IX_ID) {
396 		DPRINTF(("BART ID mismatch (got 0x%04x, expected 0x%04x)\n",
397 			board_id, IX_ID));
398 		goto out;
399 	}
400 
401 	/*
402 	 * The shared RAM size and location of the EE16 is encoded into
403 	 * EEPROM location 6.  The location of the first set bit tells us
404 	 * the memory address (0xc0000 + (0x4000 * FSB)), where FSB is the
405 	 * number of the first set bit.  The zeroes are then shifted out,
406 	 * and the results is the memory size (1 = 16k, 3 = 32k, 7 = 48k,
407 	 * 0x0f = 64k).
408 	 *
409 	 * Examples:
410 	 *   0x3c -> 64k@0xc8000, 0x70 -> 48k@0xd0000, 0xc0 -> 32k@0xd8000
411 	 *   0x80 -> 16k@0xdc000.
412 	 *
413 	 * Side note: this comes from reading the old driver rather than
414 	 * from a more definitive source, so it could be out-of-whack
415 	 * with what the card can do...
416 	 */
417 
418 	val = ix_read_eeprom(iot, ioh, 6) & 0xff;
419 	DPRINTF(("memory config: 0x%02x\n", val));
420 
421 	for(i = 0; i < 8; i++) {
422 		if (val & 1)
423 			break;
424 		val = val >> 1;
425 	}
426 
427 	if (i == 8) {
428 		DPRINTF(("Invalid or unsupported memory config\n"));
429 		goto out;
430 	}
431 
432 	maddr = 0xc0000 + (i * 0x4000);
433 
434 	switch (val) {
435 	case 0x01:
436 		msize = 16 * 1024;
437 		break;
438 
439 	case 0x03:
440 		msize = 32 * 1024;
441 		break;
442 
443 	case 0x07:
444 		msize = 48 * 1024;
445 		break;
446 
447 	case 0x0f:
448 		msize = 64 * 1024;
449 		break;
450 
451 	default:
452 		DPRINTF(("invalid memory size %02x\n", val));
453 		goto out;
454 	}
455 
456 	if (ia->ia_maddr == ISACF_IOMEM_DEFAULT)
457 		ia->ia_maddr = maddr;
458 	else if (ia->ia_maddr != maddr) {
459 		DPRINTF((
460 		  "ix_match: memaddr of board @ 0x%x doesn't match config\n",
461 		  ia->ia_iobase));
462 		goto out;
463 	}
464 
465 	if (ia->ia_msize == ISACF_IOSIZ_DEFAULT)
466 		ia->ia_msize = msize;
467 	else if (ia->ia_msize != msize) {
468 		DPRINTF((
469 		   "ix_match: memsize of board @ 0x%x doesn't match config\n",
470 		   ia->ia_iobase));
471 		goto out;
472 	}
473 
474 	DPRINTF(("found %d byte memory region at %x\n",
475 		ia->ia_msize, ia->ia_maddr));
476 
477 	/* need to put the 586 in RESET, and leave it */
478 	bus_space_write_1(iot, ioh, IX_ECTRL, IX_RESET_586);
479 
480 	/* read the eeprom and checksum it, should == IX_ID */
481 	for(i = 0; i < 0x40; i++)
482 		checksum += ix_read_eeprom(iot, ioh, i);
483 
484 	if (checksum != IX_ID) {
485 		DPRINTF(("checksum mismatch (got 0x%04x, expected 0x%04x\n",
486 			checksum, IX_ID));
487 		goto out;
488 	}
489 
490 	/*
491 	 * Size and test the memory on the board.  The size of the memory
492 	 * can be one of 16k, 32k, 48k or 64k.  It can be located in the
493 	 * address range 0xC0000 to 0xEFFFF on 16k boundaries.
494 	 */
495 	pg = (ia->ia_maddr & 0x3C000) >> 14;
496 	adjust = IX_MCTRL_FMCS16 | (pg & 0x3) << 2;
497 	decode = ((1 << (ia->ia_msize / 16384)) - 1) << pg;
498 	edecode = ((~decode >> 4) & 0xF0) | (decode >> 8);
499 
500 	/* ZZZ This should be checked against eeprom location 6, low byte */
501 	bus_space_write_1(iot, ioh, IX_MEMDEC, decode & 0xFF);
502 
503 	/* ZZZ This should be checked against eeprom location 1, low byte */
504 	bus_space_write_1(iot, ioh, IX_MCTRL, adjust);
505 
506 	/* ZZZ Now if I could find this one I would have it made */
507 	bus_space_write_1(iot, ioh, IX_MPCTRL, (~decode & 0xFF));
508 
509 	/* ZZZ I think this is location 6, high byte */
510 	bus_space_write_1(iot, ioh, IX_MECTRL, edecode); /*XXX disable Exxx */
511 
512 	/*
513 	 * Get the encoded interrupt number from the EEPROM, check it
514 	 * against the passed in IRQ.  Issue a warning if they do not
515 	 * match, and fail the probe.  If irq is 'IRQUNK' then we
516 	 * use the EEPROM irq, and continue.
517 	 */
518 	irq_encoded = ix_read_eeprom(iot, ioh, IX_EEPROM_CONFIG1);
519 	irq_encoded = (irq_encoded & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT;
520 	irq = irq_translate[irq_encoded];
521 	if (ia->ia_irq == ISACF_IRQ_DEFAULT)
522 		ia->ia_irq = irq;
523 	else if (irq != ia->ia_irq) {
524 		DPRINTF(("board IRQ %d does not match config\n", irq));
525 		goto out;
526 	}
527 
528 	/* disable the board interrupts */
529 	bus_space_write_1(iot, ioh, IX_IRQ, irq_encoded);
530 
531 	bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
532 	bart_config |= IX_BART_LOOPBACK;
533 	bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */
534 	bus_space_write_1(iot, ioh, IX_CONFIG, bart_config);
535 	bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
536 
537 	bus_space_write_1(iot, ioh, IX_ECTRL, 0);
538 	delay(100);
539 
540 	rv = 1;
541 	ia->ia_iosize = IX_IOSIZE;
542 	DPRINTF(("ix_match: found board @ 0x%x\n", ia->ia_iobase));
543 
544 out:
545 	bus_space_unmap(iot, ioh, IX_IOSIZE);
546 	return (rv);
547 }
548 
549 void
550 ix_attach(parent, self, aux)
551 	struct device *parent;
552 	struct device *self;
553 	void   *aux;
554 {
555 	struct ix_softc *isc = (void *)self;
556 	struct ie_softc *sc = &isc->sc_ie;
557 	struct isa_attach_args *ia = aux;
558 
559 	int media;
560 	u_short eaddrtemp;
561 	u_int8_t bart_config;
562 	bus_space_tag_t iot;
563 	bus_space_handle_t ioh, memh;
564 	u_short irq_encoded;
565 	u_int8_t ethaddr[ETHER_ADDR_LEN];
566 
567 	iot = ia->ia_iot;
568 
569 	if (bus_space_map(iot, ia->ia_iobase,
570 			  ia->ia_iosize, 0, &ioh) != 0) {
571 
572 		DPRINTF(("\n%s: can't map i/o space 0x%x-0x%x\n",
573 			  sc->sc_dev.dv_xname, ia->ia_iobase,
574 			  ia->ia_iobase + ia->ia_iosize - 1));
575 		return;
576 	}
577 
578 	if (bus_space_map(ia->ia_memt, ia->ia_maddr,
579 			  ia->ia_msize, 0, &memh) != 0) {
580 
581 		DPRINTF(("\n%s: can't map iomem space 0x%x-0x%x\n",
582 			sc->sc_dev.dv_xname, ia->ia_maddr,
583 			ia->ia_maddr + ia->ia_msize - 1));
584 		bus_space_unmap(iot, ioh, ia->ia_iosize);
585 		return;
586 	}
587 
588 	isc->sc_regt = iot;
589 	isc->sc_regh = ioh;
590 
591 	/*
592 	 * Get the hardware ethernet address from the EEPROM and
593 	 * save it in the softc for use by the 586 setup code.
594 	 */
595 	eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_HIGH);
596 	ethaddr[1] = eaddrtemp & 0xFF;
597 	ethaddr[0] = eaddrtemp >> 8;
598 	eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_MID);
599 	ethaddr[3] = eaddrtemp & 0xFF;
600 	ethaddr[2] = eaddrtemp >> 8;
601 	eaddrtemp = ix_read_eeprom(iot, ioh, IX_EEPROM_ENET_LOW);
602 	ethaddr[5] = eaddrtemp & 0xFF;
603 	ethaddr[4] = eaddrtemp >> 8;
604 
605 	sc->hwinit = NULL;
606 	sc->hwreset = ix_reset;
607 	sc->chan_attn = ix_atten;
608 	sc->intrhook = ix_intrhook;
609 
610 	sc->memcopyin = ix_copyin;
611 	sc->memcopyout = ix_copyout;
612 	sc->ie_bus_read16 = ix_read_16;
613 	sc->ie_bus_write16 = ix_write_16;
614 	sc->ie_bus_write24 = ix_write_24;
615 
616 	sc->do_xmitnopchain = 0;
617 
618 	sc->sc_mediachange = NULL;
619 	sc->sc_mediastatus = ix_mediastatus;
620 
621 	sc->bt = ia->ia_memt;
622 	sc->bh = memh;
623 
624 	/* Map i/o space. */
625 	sc->sc_msize = ia->ia_msize;
626 	sc->sc_maddr = (void *)memh;
627 	sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
628 
629 	/* set up pointers to important on-card control structures */
630 	sc->iscp = 0;
631 	sc->scb = IE_ISCP_SZ;
632 	sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
633 
634 	sc->buf_area = sc->scb + IE_SCB_SZ;
635 	sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
636 
637 	/* zero card memory */
638 	bus_space_set_region_1(sc->bt, sc->bh, 0, 0, 32);
639 	bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
640 
641 	/* set card to 16-bit bus mode */
642 	bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0);
643 
644 	/* set up pointers to key structures */
645 	ix_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
646 	ix_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
647 	ix_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
648 
649 	/* flush setup of pointers, check if chip answers */
650 	bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
651 			  BUS_SPACE_BARRIER_WRITE);
652 	if (!i82586_proberam(sc)) {
653 		DPRINTF(("\n%s: Can't talk to i82586!\n",
654 			sc->sc_dev.dv_xname));
655 		bus_space_unmap(iot, ioh, ia->ia_iosize);
656 		bus_space_unmap(ia->ia_memt, memh, ia->ia_msize);
657 		return;
658 	}
659 
660 	/* Figure out which media is being used... */
661 	if (ix_read_eeprom(iot, ioh, IX_EEPROM_CONFIG1) &
662 				IX_EEPROM_MEDIA_EXT) {
663 		if (ix_read_eeprom(iot, ioh, IX_EEPROM_MEDIA) &
664 				IX_EEPROM_MEDIA_TP)
665 			media = IFM_ETHER | IFM_10_T;
666 		else
667 			media = IFM_ETHER | IFM_10_2;
668 	} else
669 		media = IFM_ETHER | IFM_10_5;
670 
671 	/* Take the card out of lookback */
672 	bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
673 	bart_config &= ~IX_BART_LOOPBACK;
674 	bart_config |= IX_BART_MCS16_TEST; /* inb doesn't get bit! */
675 	bus_space_write_1(iot, ioh, IX_CONFIG, bart_config);
676 	bart_config = bus_space_read_1(iot, ioh, IX_CONFIG);
677 
678 	irq_encoded = ix_read_eeprom(iot, ioh,
679 				     IX_EEPROM_CONFIG1);
680 	irq_encoded = (irq_encoded & IX_EEPROM_IRQ) >> IX_EEPROM_IRQ_SHIFT;
681 
682 	/* Enable interrupts */
683 	bus_space_write_1(iot, ioh, IX_IRQ,
684 			  irq_encoded | IX_IRQ_ENABLE);
685 
686 	isc->irq_encoded = irq_encoded;
687 
688 	i82586_attach(sc, "EtherExpress/16", ethaddr,
689 		      ix_media, NIX_MEDIA, media);
690 
691 	isc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
692 					IPL_NET, i82586_intr, sc);
693 	if (isc->sc_ih == NULL)
694 		DPRINTF(("\n%s: can't establish interrupt\n",
695 			sc->sc_dev.dv_xname));
696 }
697 
698 struct cfattach ix_ca = {
699 	sizeof(struct ix_softc), ix_match, ix_attach
700 };
701