1 /* 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 */ 22 23 /* 24 * Portions copyright (C) 1993, David Greenman. This software may be used, 25 * modified, copied, distributed, and sold, in both source and binary form 26 * provided that the above copyright and these terms are retained. Under no 27 * circumstances is the author responsible for the proper functioning of this 28 * software, nor does the author assume any responsibility for damages 29 * incurred with its use. 30 */ 31 32 #define FE_VERSION "if_fe.c ver. 0.8" 33 34 /* 35 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards. 36 * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp> 37 * 38 * This version is intended to be a generic template for various 39 * MB86960A/MB86965A based Ethernet cards. It currently supports 40 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied- 41 * Telesis AT1700 series and RE2000 series. There are some 42 * unnecessary hooks embedded, which are primarily intended to support 43 * other types of Ethernet cards, but the author is not sure whether 44 * they are useful. 45 */ 46 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/errno.h> 52 #include <sys/ioctl.h> 53 #include <sys/mbuf.h> 54 #include <sys/socket.h> 55 #include <sys/syslog.h> 56 #include <sys/device.h> 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/netisr.h> 62 63 #ifdef INET 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_ether.h> 69 #endif 70 71 #ifdef NS 72 #include <netns/ns.h> 73 #include <netns/ns_if.h> 74 #endif 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #include <net/bpfdesc.h> 79 #endif 80 81 #include <machine/cpu.h> 82 #include <machine/pio.h> 83 84 #include <dev/isa/isareg.h> 85 #include <dev/isa/isavar.h> 86 #include <dev/ic/mb86960reg.h> 87 #include <dev/isa/if_fereg.h> 88 89 /* 90 * Default settings for fe driver specific options. 91 * They can be set in config file by "options" statements. 92 */ 93 94 /* 95 * Debug control. 96 * 0: No debug at all. All debug specific codes are stripped off. 97 * 1: Silent. No debug messages are logged except emergent ones. 98 * 2: Brief. Lair events and/or important information are logged. 99 * 3: Detailed. Logs all information which *may* be useful for debugging. 100 * 4: Trace. All actions in the driver is logged. Super verbose. 101 */ 102 #ifndef FE_DEBUG 103 #define FE_DEBUG 1 104 #endif 105 106 /* 107 * Delay padding of short transmission packets to minimum Ethernet size. 108 * This may or may not gain performance. An EXPERIMENTAL option. 109 */ 110 #ifndef FE_DELAYED_PADDING 111 #define FE_DELAYED_PADDING 0 112 #endif 113 114 /* 115 * Transmit just one packet per a "send" command to 86960. 116 * This option is intended for performance test. An EXPERIMENTAL option. 117 */ 118 #ifndef FE_SINGLE_TRANSMISSION 119 #define FE_SINGLE_TRANSMISSION 0 120 #endif 121 122 /* 123 * Device configuration flags. 124 */ 125 126 /* DLCR6 settings. */ 127 #define FE_FLAGS_DLCR6_VALUE 0x007F 128 129 /* Force DLCR6 override. */ 130 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080 131 132 /* A cludge for PCMCIA support. */ 133 #define FE_FLAGS_PCMCIA 0x8000 134 135 /* Identification of the driver version. */ 136 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION; 137 138 /* 139 * Supported hardware (Ethernet card) types 140 * This information is currently used only for debugging 141 */ 142 enum fe_type { 143 /* For cards which are successfully probed but not identified. */ 144 FE_TYPE_UNKNOWN, 145 146 /* Fujitsu FMV-180 series. */ 147 FE_TYPE_FMV181, 148 FE_TYPE_FMV182, 149 150 /* Allied-Telesis AT1700 series and RE2000 series. */ 151 FE_TYPE_AT1700T, 152 FE_TYPE_AT1700BT, 153 FE_TYPE_AT1700FT, 154 FE_TYPE_AT1700AT, 155 FE_TYPE_RE2000, 156 157 /* PCMCIA by Fujitsu. */ 158 FE_TYPE_MBH10302, 159 FE_TYPE_MBH10304, 160 }; 161 162 /* 163 * fe_softc: per line info and status 164 */ 165 struct fe_softc { 166 struct device sc_dev; 167 void *sc_ih; 168 169 struct arpcom sc_arpcom; /* ethernet common */ 170 171 /* Set by probe() and not modified in later phases. */ 172 enum fe_type type; /* interface type code */ 173 char *typestr; /* printable name of the interface. */ 174 int sc_iobase; /* MB86960A I/O base address */ 175 176 u_char proto_dlcr4; /* DLCR4 prototype. */ 177 u_char proto_dlcr5; /* DLCR5 prototype. */ 178 u_char proto_dlcr6; /* DLCR6 prototype. */ 179 u_char proto_dlcr7; /* DLCR7 prototype. */ 180 u_char proto_bmpr13; /* BMPR13 prototype. */ 181 182 /* Vendor specific hooks. */ 183 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */ 184 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */ 185 186 /* Transmission buffer management. */ 187 u_short txb_size; /* total bytes in TX buffer */ 188 u_short txb_free; /* free bytes in TX buffer */ 189 u_char txb_count; /* number of packets in TX buffer */ 190 u_char txb_sched; /* number of scheduled packets */ 191 u_char txb_padding; /* number of delayed padding bytes */ 192 193 /* Multicast address filter management. */ 194 u_char filter_change; /* MARs must be changed ASAP. */ 195 u_char filter[FE_FILTER_LEN]; /* new filter value. */ 196 }; 197 198 /* Frequently accessed members in arpcom. */ 199 #define sc_enaddr sc_arpcom.ac_enaddr 200 201 /* Standard driver entry points. These can be static. */ 202 int feprobe __P((struct device *, void *, void *)); 203 void feattach __P((struct device *, struct device *, void *)); 204 int feintr __P((void *)); 205 void fe_init __P((struct fe_softc *)); 206 int fe_ioctl __P((struct ifnet *, u_long, caddr_t)); 207 void fe_start __P((struct ifnet *)); 208 void fe_reset __P((struct fe_softc *)); 209 void fe_watchdog __P((int)); 210 211 /* Local functions. Order of declaration is confused. FIXME. */ 212 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *)); 213 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *)); 214 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *)); 215 void fe_init_mbh __P((struct fe_softc *)); 216 int fe_get_packet __P((struct fe_softc *, int)); 217 void fe_stop __P((struct fe_softc *)); 218 void fe_tint __P((/*struct fe_softc *, u_char*/)); 219 void fe_rint __P((/*struct fe_softc *, u_char*/)); 220 static inline 221 void fe_xmit __P((struct fe_softc *)); 222 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *)); 223 void fe_getmcaf __P((struct arpcom *, u_char *)); 224 void fe_setmode __P((struct fe_softc *)); 225 void fe_loadmar __P((struct fe_softc *)); 226 #if FE_DEBUG >= 1 227 void fe_dump __P((int, struct fe_softc *)); 228 #endif 229 230 struct cfdriver fecd = { 231 NULL, "fe", feprobe, feattach, DV_IFNET, sizeof(struct fe_softc) 232 }; 233 234 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */ 235 #define ETHER_MIN_LEN 60 /* with header, without CRC. */ 236 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */ 237 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */ 238 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */ 239 240 /* 241 * Fe driver specific constants which relate to 86960/86965. 242 */ 243 244 /* Interrupt masks. */ 245 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE) 246 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \ 247 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY) 248 249 /* Maximum number of iterrations for a receive interrupt. */ 250 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64) 251 /* Maximum size of SRAM is 65536, 252 * minimum size of transmission buffer in fe is 2x2KB, 253 * and minimum amount of received packet including headers 254 * added by the chip is 64 bytes. 255 * Hence FE_MAX_RECV_COUNT is the upper limit for number 256 * of packets in the receive buffer. */ 257 258 /* 259 * Convenient routines to access contiguous I/O ports. 260 */ 261 262 static inline void 263 inblk (int addr, u_char * mem, int len) 264 { 265 while (--len >= 0) { 266 *mem++ = inb(addr++); 267 } 268 } 269 270 static inline void 271 outblk (int addr, u_char const * mem, int len) 272 { 273 while (--len >= 0) { 274 outb(addr++, *mem++); 275 } 276 } 277 278 /* 279 * Hardware probe routines. 280 */ 281 282 /* 283 * Determine if the device is present. 284 */ 285 int 286 feprobe(parent, match, aux) 287 struct device *parent; 288 void *match, *aux; 289 { 290 struct fe_softc *sc = match; 291 struct isa_attach_args *ia = aux; 292 293 #if FE_DEBUG >= 2 294 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version); 295 #endif 296 297 /* Probe an address. */ 298 sc->sc_iobase = ia->ia_iobase; 299 300 if (fe_probe_fmv(sc, ia)) 301 return (1); 302 if (fe_probe_ati(sc, ia)) 303 return (1); 304 if (fe_probe_mbh(sc, ia)) 305 return (1); 306 return (0); 307 } 308 309 /* 310 * Check for specific bits in specific registers have specific values. 311 */ 312 struct fe_simple_probe_struct { 313 u_char port; /* Offset from the base I/O address. */ 314 u_char mask; /* Bits to be checked. */ 315 u_char bits; /* Values to be compared against. */ 316 }; 317 318 static inline int 319 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp) 320 { 321 struct fe_simple_probe_struct const * p; 322 323 for (p = sp; p->mask != 0; p++) { 324 if ((inb(addr + p->port) & p->mask) != p->bits) { 325 return (0); 326 } 327 } 328 return (1); 329 } 330 331 /* 332 * Routines to read all bytes from the config EEPROM through MB86965A. 333 * I'm not sure what exactly I'm doing here... I was told just to follow 334 * the steps, and it worked. Could someone tell me why the following 335 * code works? (Or, why all similar codes I tried previously doesn't 336 * work.) FIXME. 337 */ 338 339 static inline void 340 strobe (int bmpr16) 341 { 342 /* 343 * Output same value twice. To speed-down execution? 344 */ 345 outb(bmpr16, FE_B16_SELECT); 346 outb(bmpr16, FE_B16_SELECT); 347 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 348 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 349 outb(bmpr16, FE_B16_SELECT); 350 outb(bmpr16, FE_B16_SELECT); 351 } 352 353 void 354 fe_read_eeprom(sc, data) 355 struct fe_softc *sc; 356 u_char *data; 357 { 358 int iobase = sc->sc_iobase; 359 int bmpr16 = iobase + FE_BMPR16; 360 int bmpr17 = iobase + FE_BMPR17; 361 u_char n, val, bit; 362 363 /* Read bytes from EEPROM; two bytes per an iterration. */ 364 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) { 365 /* Reset the EEPROM interface. */ 366 outb(bmpr16, 0x00); 367 outb(bmpr17, 0x00); 368 outb(bmpr16, FE_B16_SELECT); 369 370 /* Start EEPROM access. */ 371 outb(bmpr17, FE_B17_DATA); 372 strobe(bmpr16); 373 374 /* Pass the iterration count to the chip. */ 375 val = 0x80 | n; 376 for (bit = 0x80; bit != 0x00; bit >>= 1) { 377 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0); 378 strobe(bmpr16); 379 } 380 outb(bmpr17, 0x00); 381 382 /* Read a byte. */ 383 val = 0; 384 for (bit = 0x80; bit != 0x00; bit >>= 1) { 385 strobe(bmpr16); 386 if (inb(bmpr17) & FE_B17_DATA) 387 val |= bit; 388 } 389 *data++ = val; 390 391 /* Read one more byte. */ 392 val = 0; 393 for (bit = 0x80; bit != 0x00; bit >>= 1) { 394 strobe(bmpr16); 395 if (inb(bmpr17) & FE_B17_DATA) 396 val |= bit; 397 } 398 *data++ = val; 399 } 400 401 #if FE_DEBUG >= 3 402 /* Report what we got. */ 403 data -= FE_EEPROM_SIZE; 404 log(LOG_INFO, "%s: EEPROM at %04x:" 405 " %02x%02x%02x%02x %02x%02x%02x%02x -" 406 " %02x%02x%02x%02x %02x%02x%02x%02x -" 407 " %02x%02x%02x%02x %02x%02x%02x%02x -" 408 " %02x%02x%02x%02x %02x%02x%02x%02x\n", 409 sc->sc_dev.dv_xname, iobase, 410 data[ 0], data[ 1], data[ 2], data[ 3], 411 data[ 4], data[ 5], data[ 6], data[ 7], 412 data[ 8], data[ 9], data[10], data[11], 413 data[12], data[13], data[14], data[15], 414 data[16], data[17], data[18], data[19], 415 data[20], data[21], data[22], data[23], 416 data[24], data[25], data[26], data[27], 417 data[28], data[29], data[30], data[31]); 418 #endif 419 } 420 421 /* 422 * Hardware (vendor) specific probe routines. 423 */ 424 425 /* 426 * Probe and initialization for Fujitsu FMV-180 series boards 427 */ 428 int 429 fe_probe_fmv(sc, ia) 430 struct fe_softc *sc; 431 struct isa_attach_args *ia; 432 { 433 int i, n; 434 int iobase = sc->sc_iobase; 435 int irq; 436 437 static int const iomap[8] = 438 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 }; 439 static int const irqmap[4] = 440 { 3, 7, 10, 15 }; 441 442 static struct fe_simple_probe_struct const probe_table[] = { 443 { FE_DLCR2, 0x70, 0x00 }, 444 { FE_DLCR4, 0x08, 0x00 }, 445 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */ 446 447 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE }, 448 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID }, 449 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE }, 450 #if 1 451 /* 452 * Test *vendor* part of the station address for Fujitsu. 453 * The test will gain reliability of probe process, but 454 * it rejects FMV-180 clone boards manufactured by other vendors. 455 * We have to turn the test off when such cards are made available. 456 */ 457 { FE_FMV4, 0xFF, 0x00 }, 458 { FE_FMV5, 0xFF, 0x00 }, 459 { FE_FMV6, 0xFF, 0x0E }, 460 #else 461 /* 462 * We can always verify the *first* 2 bits (in Ehternet 463 * bit order) are "no multicast" and "no local" even for 464 * unknown vendors. 465 */ 466 { FE_FMV4, 0x03, 0x00 }, 467 #endif 468 { 0 } 469 }; 470 471 #if 0 472 /* 473 * Dont probe at all if the config says we are PCMCIA... 474 */ 475 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0) 476 return (0); 477 #endif 478 479 /* 480 * See if the sepcified address is possible for FMV-180 series. 481 */ 482 for (i = 0; i < 8; i++) { 483 if (iomap[i] == iobase) 484 break; 485 } 486 if (i == 8) 487 return (0); 488 489 /* Simple probe. */ 490 if (!fe_simple_probe(iobase, probe_table)) 491 return (0); 492 493 /* Check if our I/O address matches config info on EEPROM. */ 494 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT; 495 if (iomap[n] != iobase) 496 return (0); 497 498 /* Determine the card type. */ 499 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) { 500 case FE_FMV0_MODEL_FMV181: 501 sc->type = FE_TYPE_FMV181; 502 sc->typestr = "FMV-181"; 503 break; 504 case FE_FMV0_MODEL_FMV182: 505 sc->type = FE_TYPE_FMV182; 506 sc->typestr = "FMV-182"; 507 break; 508 default: 509 /* Unknown card type: maybe a new model, but... */ 510 return (0); 511 } 512 513 /* 514 * An FMV-180 has successfully been proved. 515 * Determine which IRQ to be used. 516 * 517 * In this version, we always get an IRQ assignment from the 518 * FMV-180's configuration EEPROM, ignoring that specified in 519 * config file. 520 */ 521 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT; 522 irq = irqmap[n]; 523 524 if (ia->ia_irq != IRQUNK) { 525 if (ia->ia_irq != irq) { 526 printf("%s: irq mismatch; kernel configured %d != board configured %d\n", 527 sc->sc_dev.dv_xname, ia->ia_irq, irq); 528 return (0); 529 } 530 } else 531 ia->ia_irq = irq; 532 533 /* 534 * Initialize constants in the per-line structure. 535 */ 536 537 /* Get our station address from EEPROM. */ 538 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN); 539 540 /* Make sure we got a valid station address. */ 541 if ((sc->sc_enaddr[0] & 0x03) != 0x00 542 || (sc->sc_enaddr[0] == 0x00 543 && sc->sc_enaddr[1] == 0x00 544 && sc->sc_enaddr[2] == 0x00)) 545 return (0); 546 547 /* Register values which depend on board design. */ 548 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 549 sc->proto_dlcr5 = 0; 550 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC; 551 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 552 553 /* 554 * Program the 86960 as follows: 555 * SRAM: 32KB, 100ns, byte-wide access. 556 * Transmission buffer: 4KB x 2. 557 * System bus interface: 16 bits. 558 * We cannot change these values but TXBSIZE, because they 559 * are hard-wired on the board. Modifying TXBSIZE will affect 560 * the driver performance. 561 */ 562 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 563 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 564 565 /* 566 * Minimum initialization of the hardware. 567 * We write into registers; hope I/O ports have no 568 * overlap with other boards. 569 */ 570 571 /* Initialize ASIC. */ 572 outb(iobase + FE_FMV3, 0); 573 outb(iobase + FE_FMV10, 0); 574 575 /* Wait for a while. I'm not sure this is necessary. FIXME. */ 576 delay(200); 577 578 /* Initialize 86960. */ 579 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 580 delay(200); 581 582 /* Disable all interrupts. */ 583 outb(iobase + FE_DLCR2, 0); 584 outb(iobase + FE_DLCR3, 0); 585 586 /* Turn the "master interrupt control" flag of ASIC on. */ 587 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG); 588 589 /* 590 * That's all. FMV-180 occupies 32 I/O addresses, by the way. 591 */ 592 ia->ia_iosize = 32; 593 ia->ia_msize = 0; 594 return (1); 595 } 596 597 /* 598 * Probe and initialization for Allied-Telesis AT1700/RE2000 series. 599 */ 600 int 601 fe_probe_ati(sc, ia) 602 struct fe_softc *sc; 603 struct isa_attach_args *ia; 604 { 605 int i, n; 606 int iobase = sc->sc_iobase; 607 u_char eeprom[FE_EEPROM_SIZE]; 608 u_char save16, save17; 609 int irq; 610 611 static int const iomap[8] = 612 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 }; 613 static int const irqmap[4][4] = { 614 { 3, 4, 5, 9 }, 615 { 10, 11, 12, 15 }, 616 { 3, 11, 5, 15 }, 617 { 10, 11, 14, 15 }, 618 }; 619 static struct fe_simple_probe_struct const probe_table[] = { 620 { FE_DLCR2, 0x70, 0x00 }, 621 { FE_DLCR4, 0x08, 0x00 }, 622 { FE_DLCR5, 0x80, 0x00 }, 623 #if 0 624 { FE_BMPR16, 0x1B, 0x00 }, 625 { FE_BMPR17, 0x7F, 0x00 }, 626 #endif 627 { 0 } 628 }; 629 630 #if 0 631 /* 632 * Don't probe at all if the config says we are PCMCIA... 633 */ 634 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0) 635 return (0); 636 #endif 637 638 #if FE_DEBUG >= 4 639 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase); 640 fe_dump(LOG_INFO, sc); 641 #endif 642 643 /* 644 * See if the sepcified address is possible for MB86965A JLI mode. 645 */ 646 for (i = 0; i < 8; i++) { 647 if (iomap[i] == iobase) 648 break; 649 } 650 if (i == 8) 651 return (0); 652 653 /* 654 * We should test if MB86965A is on the base address now. 655 * Unfortunately, it is very hard to probe it reliably, since 656 * we have no way to reset the chip under software control. 657 * On cold boot, we could check the "signature" bit patterns 658 * described in the Fujitsu document. On warm boot, however, 659 * we can predict almost nothing about register values. 660 */ 661 if (!fe_simple_probe(iobase, probe_table)) 662 return (0); 663 664 /* Save old values of the registers. */ 665 save16 = inb(iobase + FE_BMPR16); 666 save17 = inb(iobase + FE_BMPR17); 667 668 /* Check if our I/O address matches config info on 86965. */ 669 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT; 670 if (iomap[n] != iobase) 671 goto fail; 672 673 /* 674 * We are now almost sure we have an AT1700 at the given 675 * address. So, read EEPROM through 86965. We have to write 676 * into LSI registers to read from EEPROM. I want to avoid it 677 * at this stage, but I cannot test the presense of the chip 678 * any further without reading EEPROM. FIXME. 679 */ 680 fe_read_eeprom(sc, eeprom); 681 682 /* Make sure the EEPROM is turned off. */ 683 outb(iobase + FE_BMPR16, 0); 684 outb(iobase + FE_BMPR17, 0); 685 686 /* Make sure that config info in EEPROM and 86965 agree. */ 687 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19)) 688 goto fail; 689 690 /* 691 * Determine the card type. 692 */ 693 switch (eeprom[FE_ATI_EEP_MODEL]) { 694 case FE_ATI_MODEL_AT1700T: 695 sc->type = FE_TYPE_AT1700T; 696 sc->typestr = "AT-1700T"; 697 break; 698 case FE_ATI_MODEL_AT1700BT: 699 sc->type = FE_TYPE_AT1700BT; 700 sc->typestr = "AT-1700BT"; 701 break; 702 case FE_ATI_MODEL_AT1700FT: 703 sc->type = FE_TYPE_AT1700FT; 704 sc->typestr = "AT-1700FT"; 705 break; 706 case FE_ATI_MODEL_AT1700AT: 707 sc->type = FE_TYPE_AT1700AT; 708 sc->typestr = "AT-1700AT"; 709 break; 710 default: 711 sc->type = FE_TYPE_RE2000; 712 sc->typestr = "unknown (RE-2000?)"; 713 break; 714 } 715 716 /* 717 * Try to determine IRQ settings. 718 * Different models use different ranges of IRQs. 719 */ 720 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT; 721 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) { 722 case 0x30: 723 irq = irqmap[3][n]; 724 break; 725 case 0x10: 726 case 0x50: 727 irq = irqmap[2][n]; 728 break; 729 case 0x40: 730 case 0x60: 731 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) { 732 irq = irqmap[1][n]; 733 break; 734 } 735 default: 736 irq = irqmap[0][n]; 737 break; 738 } 739 740 if (ia->ia_irq != IRQUNK) { 741 if (ia->ia_irq != irq) { 742 printf("%s: irq mismatch; kernel configured %d != board configured %d\n", 743 sc->sc_dev.dv_xname, ia->ia_irq, irq); 744 return (0); 745 } 746 } else 747 ia->ia_irq = irq; 748 749 /* 750 * Initialize constants in the per-line structure. 751 */ 752 753 /* Get our station address from EEPROM. */ 754 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN); 755 756 /* Make sure we got a valid station address. */ 757 if ((sc->sc_enaddr[0] & 0x03) != 0x00 758 || (sc->sc_enaddr[0] == 0x00 759 && sc->sc_enaddr[1] == 0x00 760 && sc->sc_enaddr[2] == 0x00)) 761 goto fail; 762 763 /* Should find all register prototypes here. FIXME. */ 764 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */ 765 sc->proto_dlcr5 = 0; 766 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC; 767 #if 0 /* XXXX Should we use this? */ 768 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA]; 769 #else 770 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 771 #endif 772 773 /* 774 * Program the 86965 as follows: 775 * SRAM: 32KB, 100ns, byte-wide access. 776 * Transmission buffer: 4KB x 2. 777 * System bus interface: 16 bits. 778 * We cannot change these values but TXBSIZE, because they 779 * are hard-wired on the board. Modifying TXBSIZE will affect 780 * the driver performance. 781 */ 782 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 783 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 784 785 #if FE_DEBUG >= 3 786 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname); 787 fe_dump(LOG_INFO, sc); 788 #endif 789 790 /* Initialize 86965. */ 791 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 792 delay(200); 793 794 /* Disable all interrupts. */ 795 outb(iobase + FE_DLCR2, 0); 796 outb(iobase + FE_DLCR3, 0); 797 798 #if FE_DEBUG >= 3 799 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname); 800 fe_dump(LOG_INFO, sc); 801 #endif 802 803 /* 804 * That's all. AT1700 occupies 32 I/O addresses, by the way. 805 */ 806 ia->ia_iosize = 32; 807 ia->ia_msize = 0; 808 return (1); 809 810 fail: 811 /* Restore register values, in the case we had no 86965. */ 812 outb(iobase + FE_BMPR16, save16); 813 outb(iobase + FE_BMPR17, save17); 814 return (0); 815 } 816 817 /* 818 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface. 819 */ 820 int 821 fe_probe_mbh(sc, ia) 822 struct fe_softc *sc; 823 struct isa_attach_args *ia; 824 { 825 int iobase = sc->sc_iobase; 826 827 static struct fe_simple_probe_struct probe_table[] = { 828 { FE_DLCR2, 0x70, 0x00 }, 829 { FE_DLCR4, 0x08, 0x00 }, 830 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */ 831 #if 0 832 /* 833 * Test *vendor* part of the address for Fujitsu. 834 * The test will gain reliability of probe process, but 835 * it rejects clones by other vendors, or OEM product 836 * supplied by resalers other than Fujitsu. 837 */ 838 { FE_MBH10, 0xFF, 0x00 }, 839 { FE_MBH11, 0xFF, 0x00 }, 840 { FE_MBH12, 0xFF, 0x0E }, 841 #else 842 /* 843 * We can always verify the *first* 2 bits (in Ehternet 844 * bit order) are "global" and "unicast" even for 845 * unknown vendors. 846 */ 847 { FE_MBH10, 0x03, 0x00 }, 848 #endif 849 /* Just a gap? Seems reliable, anyway. */ 850 { 0x12, 0xFF, 0x00 }, 851 { 0x13, 0xFF, 0x00 }, 852 { 0x14, 0xFF, 0x00 }, 853 { 0x15, 0xFF, 0x00 }, 854 { 0x16, 0xFF, 0x00 }, 855 { 0x17, 0xFF, 0x00 }, 856 { 0x18, 0xFF, 0xFF }, 857 { 0x19, 0xFF, 0xFF }, 858 859 { 0 } 860 }; 861 862 #if 0 863 /* 864 * We need a PCMCIA flag. 865 */ 866 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0) 867 return (0); 868 #endif 869 870 /* 871 * We need explicit IRQ and supported address. 872 */ 873 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0) 874 return (0); 875 876 #if FE_DEBUG >= 3 877 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname); 878 fe_dump(LOG_INFO, sc); 879 #endif 880 881 /* 882 * See if MBH10302 is on its address. 883 * I'm not sure the following probe code works. FIXME. 884 */ 885 if (!fe_simple_probe(iobase, probe_table)) 886 return (0); 887 888 /* Determine the card type. */ 889 sc->type = FE_TYPE_MBH10302; 890 sc->typestr = "MBH10302 (PCMCIA)"; 891 892 /* 893 * Initialize constants in the per-line structure. 894 */ 895 896 /* Get our station address from EEPROM. */ 897 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN); 898 899 /* Make sure we got a valid station address. */ 900 if ((sc->sc_enaddr[0] & 0x03) != 0x00 901 || (sc->sc_enaddr[0] == 0x00 902 && sc->sc_enaddr[1] == 0x00 903 && sc->sc_enaddr[2] == 0x00)) 904 return (0); 905 906 /* Should find all register prototypes here. FIXME. */ 907 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 908 sc->proto_dlcr5 = 0; 909 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE; 910 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 911 912 /* 913 * Program the 86960 as follows: 914 * SRAM: 32KB, 100ns, byte-wide access. 915 * Transmission buffer: 4KB x 2. 916 * System bus interface: 16 bits. 917 * We cannot change these values but TXBSIZE, because they 918 * are hard-wired on the board. Modifying TXBSIZE will affect 919 * the driver performance. 920 */ 921 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 922 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 923 924 /* Setup hooks. We need a special initialization procedure. */ 925 sc->init = fe_init_mbh; 926 927 /* 928 * Minimum initialization. 929 */ 930 931 /* Wait for a while. I'm not sure this is necessary. FIXME. */ 932 delay(200); 933 934 /* Minimul initialization of 86960. */ 935 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 936 delay(200); 937 938 /* Disable all interrupts. */ 939 outb(iobase + FE_DLCR2, 0); 940 outb(iobase + FE_DLCR3, 0); 941 942 #if 1 /* FIXME. */ 943 /* Initialize system bus interface and encoder/decoder operation. */ 944 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE); 945 #endif 946 947 /* 948 * That's all. MBH10302 occupies 32 I/O addresses, by the way. 949 */ 950 ia->ia_iosize = 32; 951 ia->ia_msize = 0; 952 return (1); 953 } 954 955 /* MBH specific initialization routine. */ 956 void 957 fe_init_mbh(sc) 958 struct fe_softc *sc; 959 { 960 961 /* Probably required after hot-insertion... */ 962 963 /* Wait for a while. I'm not sure this is necessary. FIXME. */ 964 delay(200); 965 966 /* Minimul initialization of 86960. */ 967 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 968 delay(200); 969 970 /* Disable all interrupts. */ 971 outb(sc->sc_iobase + FE_DLCR2, 0); 972 outb(sc->sc_iobase + FE_DLCR3, 0); 973 974 /* Enable master interrupt flag. */ 975 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE); 976 } 977 978 /* 979 * Install interface into kernel networking data structures 980 */ 981 void 982 feattach(parent, self, aux) 983 struct device *parent, *self; 984 void *aux; 985 { 986 struct fe_softc *sc = (void *)self; 987 struct isa_attach_args *ia = aux; 988 struct cfdata *cf = sc->sc_dev.dv_cfdata; 989 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 990 991 /* Stop the 86960. */ 992 fe_stop(sc); 993 994 /* Initialize ifnet structure. */ 995 ifp->if_unit = sc->sc_dev.dv_unit; 996 ifp->if_name = fecd.cd_name; 997 ifp->if_start = fe_start; 998 ifp->if_ioctl = fe_ioctl; 999 ifp->if_watchdog = fe_watchdog; 1000 ifp->if_flags = 1001 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 1002 1003 /* 1004 * Set maximum size of output queue, if it has not been set. 1005 * It is done here as this driver may be started after the 1006 * system intialization (i.e., the interface is PCMCIA.) 1007 * 1008 * I'm not sure this is really necessary, but, even if it is, 1009 * it should be done somewhere else, e.g., in if_attach(), 1010 * since it must be a common workaround for all network drivers. 1011 * FIXME. 1012 */ 1013 if (ifp->if_snd.ifq_maxlen == 0) { 1014 extern int ifqmaxlen; /* Don't be so shocked... */ 1015 ifp->if_snd.ifq_maxlen = ifqmaxlen; 1016 } 1017 1018 #if FE_DEBUG >= 3 1019 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname); 1020 fe_dump(LOG_INFO, sc); 1021 #endif 1022 1023 #if FE_SINGLE_TRANSMISSION 1024 /* Override txb config to allocate minimum. */ 1025 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ 1026 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 1027 #endif 1028 1029 /* Modify hardware config if it is requested. */ 1030 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0) 1031 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE; 1032 1033 /* Find TX buffer size, based on the hardware dependent proto. */ 1034 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 1035 case FE_D6_TXBSIZ_2x2KB: 1036 sc->txb_size = 2048; 1037 break; 1038 case FE_D6_TXBSIZ_2x4KB: 1039 sc->txb_size = 4096; 1040 break; 1041 case FE_D6_TXBSIZ_2x8KB: 1042 sc->txb_size = 8192; 1043 break; 1044 default: 1045 /* Oops, we can't work with single buffer configuration. */ 1046 #if FE_DEBUG >= 2 1047 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n", 1048 sc->sc_dev.dv_xname); 1049 #endif 1050 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 1051 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 1052 sc->txb_size = 2048; 1053 break; 1054 } 1055 1056 /* Attach the interface. */ 1057 if_attach(ifp); 1058 ether_ifattach(ifp); 1059 1060 /* Print additional info when attached. */ 1061 printf(": address %s, type %s\n", 1062 ether_sprintf(sc->sc_arpcom.ac_enaddr), sc->typestr); 1063 #if FE_DEBUG >= 3 1064 { 1065 int buf, txb, bbw, sbw, ram; 1066 1067 buf = txb = bbw = sbw = ram = -1; 1068 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) { 1069 case FE_D6_BUFSIZ_8KB: 1070 buf = 8; 1071 break; 1072 case FE_D6_BUFSIZ_16KB: 1073 buf = 16; 1074 break; 1075 case FE_D6_BUFSIZ_32KB: 1076 buf = 32; 1077 break; 1078 case FE_D6_BUFSIZ_64KB: 1079 buf = 64; 1080 break; 1081 } 1082 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 1083 case FE_D6_TXBSIZ_2x2KB: 1084 txb = 2; 1085 break; 1086 case FE_D6_TXBSIZ_2x4KB: 1087 txb = 4; 1088 break; 1089 case FE_D6_TXBSIZ_2x8KB: 1090 txb = 8; 1091 break; 1092 } 1093 switch (sc->proto_dlcr6 & FE_D6_BBW) { 1094 case FE_D6_BBW_BYTE: 1095 bbw = 8; 1096 break; 1097 case FE_D6_BBW_WORD: 1098 bbw = 16; 1099 break; 1100 } 1101 switch (sc->proto_dlcr6 & FE_D6_SBW) { 1102 case FE_D6_SBW_BYTE: 1103 sbw = 8; 1104 break; 1105 case FE_D6_SBW_WORD: 1106 sbw = 16; 1107 break; 1108 } 1109 switch (sc->proto_dlcr6 & FE_D6_SRAM) { 1110 case FE_D6_SRAM_100ns: 1111 ram = 100; 1112 break; 1113 case FE_D6_SRAM_150ns: 1114 ram = 150; 1115 break; 1116 } 1117 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 1118 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw); 1119 } 1120 #endif 1121 1122 #if NBPFILTER > 0 1123 /* If BPF is in the kernel, call the attach for it. */ 1124 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 1125 #endif 1126 1127 sc->sc_ih = isa_intr_establish(ia->ia_irq, ISA_IST_EDGE, ISA_IPL_NET, 1128 feintr, sc); 1129 } 1130 1131 /* 1132 * Reset interface. 1133 */ 1134 void 1135 fe_reset(sc) 1136 struct fe_softc *sc; 1137 { 1138 int s; 1139 1140 s = splimp(); 1141 fe_stop(sc); 1142 fe_init(sc); 1143 splx(s); 1144 } 1145 1146 /* 1147 * Stop everything on the interface. 1148 * 1149 * All buffered packets, both transmitting and receiving, 1150 * if any, will be lost by stopping the interface. 1151 */ 1152 void 1153 fe_stop(sc) 1154 struct fe_softc *sc; 1155 { 1156 1157 #if FE_DEBUG >= 3 1158 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname); 1159 fe_dump(LOG_INFO, sc); 1160 #endif 1161 1162 /* Disable interrupts. */ 1163 outb(sc->sc_iobase + FE_DLCR2, 0x00); 1164 outb(sc->sc_iobase + FE_DLCR3, 0x00); 1165 1166 /* Stop interface hardware. */ 1167 delay(200); 1168 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1169 delay(200); 1170 1171 /* Clear all interrupt status. */ 1172 outb(sc->sc_iobase + FE_DLCR0, 0xFF); 1173 outb(sc->sc_iobase + FE_DLCR1, 0xFF); 1174 1175 /* Put the chip in stand-by mode. */ 1176 delay(200); 1177 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN); 1178 delay(200); 1179 1180 /* MAR loading can be delayed. */ 1181 sc->filter_change = 0; 1182 1183 /* Call a hook. */ 1184 if (sc->stop) 1185 sc->stop(sc); 1186 1187 #if DEBUG >= 3 1188 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname); 1189 fe_dump(LOG_INFO, sc); 1190 #endif 1191 } 1192 1193 /* 1194 * Device timeout/watchdog routine. Entered if the device neglects to 1195 * generate an interrupt after a transmit has been started on it. 1196 */ 1197 void 1198 fe_watchdog(unit) 1199 int unit; 1200 { 1201 struct fe_softc *sc = fecd.cd_devs[unit]; 1202 1203 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1204 #if FE_DEBUG >= 3 1205 fe_dump(LOG_INFO, sc); 1206 #endif 1207 1208 /* Record how many packets are lost by this accident. */ 1209 sc->sc_arpcom.ac_if.if_oerrors += sc->txb_sched + sc->txb_count; 1210 1211 fe_reset(sc); 1212 } 1213 1214 /* 1215 * Drop (skip) a packet from receive buffer in 86960 memory. 1216 */ 1217 static inline void 1218 fe_droppacket(sc) 1219 struct fe_softc *sc; 1220 { 1221 1222 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP); 1223 } 1224 1225 /* 1226 * Initialize device. 1227 */ 1228 void 1229 fe_init(sc) 1230 struct fe_softc *sc; 1231 { 1232 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1233 int i; 1234 1235 #if FE_DEBUG >= 3 1236 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname); 1237 fe_dump(LOG_INFO, sc); 1238 #endif 1239 1240 /* Reset transmitter flags. */ 1241 ifp->if_flags &= ~IFF_OACTIVE; 1242 ifp->if_timer = 0; 1243 1244 sc->txb_free = sc->txb_size; 1245 sc->txb_count = 0; 1246 sc->txb_sched = 0; 1247 1248 /* Call a hook. */ 1249 if (sc->init) 1250 sc->init(sc); 1251 1252 #if FE_DEBUG >= 3 1253 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname); 1254 fe_dump(LOG_INFO, sc); 1255 #endif 1256 1257 /* 1258 * Make sure to disable the chip, also. 1259 * This may also help re-programming the chip after 1260 * hot insertion of PCMCIAs. 1261 */ 1262 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1263 1264 /* Power up the chip and select register bank for DLCRs. */ 1265 delay(200); 1266 outb(sc->sc_iobase + FE_DLCR7, 1267 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP); 1268 delay(200); 1269 1270 /* Feed the station address. */ 1271 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN); 1272 1273 /* Select the BMPR bank for runtime register access. */ 1274 outb(sc->sc_iobase + FE_DLCR7, 1275 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 1276 1277 /* Initialize registers. */ 1278 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */ 1279 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */ 1280 outb(sc->sc_iobase + FE_DLCR2, 0x00); 1281 outb(sc->sc_iobase + FE_DLCR3, 0x00); 1282 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4); 1283 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5); 1284 outb(sc->sc_iobase + FE_BMPR10, 0x00); 1285 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP); 1286 outb(sc->sc_iobase + FE_BMPR12, 0x00); 1287 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13); 1288 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER); 1289 outb(sc->sc_iobase + FE_BMPR15, 0x00); 1290 1291 #if FE_DEBUG >= 3 1292 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname); 1293 fe_dump(LOG_INFO, sc); 1294 #endif 1295 1296 /* Enable interrupts. */ 1297 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK); 1298 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK); 1299 1300 /* Enable transmitter and receiver. */ 1301 delay(200); 1302 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 1303 delay(200); 1304 1305 #if FE_DEBUG >= 3 1306 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname); 1307 fe_dump(LOG_INFO, sc); 1308 #endif 1309 1310 /* 1311 * Make sure to empty the receive buffer. 1312 * 1313 * This may be redundant, but *if* the receive buffer were full 1314 * at this point, the driver would hang. I have experienced 1315 * some strange hangups just after UP. I hope the following 1316 * code solve the problem. 1317 * 1318 * I have changed the order of hardware initialization. 1319 * I think the receive buffer cannot have any packets at this 1320 * point in this version. The following code *must* be 1321 * redundant now. FIXME. 1322 */ 1323 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 1324 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP) 1325 break; 1326 fe_droppacket(sc); 1327 } 1328 #if FE_DEBUG >= 1 1329 if (i >= FE_MAX_RECV_COUNT) { 1330 log(LOG_ERR, "%s: cannot empty receive buffer\n", 1331 sc->sc_dev.dv_xname); 1332 } 1333 #endif 1334 #if FE_DEBUG >= 3 1335 if (i < FE_MAX_RECV_COUNT) { 1336 log(LOG_INFO, "%s: receive buffer emptied (%d)\n", 1337 sc->sc_dev.dv_xname, i); 1338 } 1339 #endif 1340 1341 #if FE_DEBUG >= 3 1342 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname); 1343 fe_dump(LOG_INFO, sc); 1344 #endif 1345 1346 /* Do we need this here? */ 1347 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */ 1348 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */ 1349 1350 #if FE_DEBUG >= 3 1351 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname); 1352 fe_dump(LOG_INFO, sc); 1353 #endif 1354 1355 /* Set 'running' flag. */ 1356 ifp->if_flags |= IFF_RUNNING; 1357 1358 /* 1359 * At this point, the interface is runnung properly, 1360 * except that it receives *no* packets. we then call 1361 * fe_setmode() to tell the chip what packets to be 1362 * received, based on the if_flags and multicast group 1363 * list. It completes the initialization process. 1364 */ 1365 fe_setmode(sc); 1366 1367 #if FE_DEBUG >= 3 1368 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname); 1369 fe_dump(LOG_INFO, sc); 1370 #endif 1371 1372 /* ...and attempt to start output. */ 1373 fe_start(ifp); 1374 1375 #if FE_DEBUG >= 3 1376 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname); 1377 fe_dump(LOG_INFO, sc); 1378 #endif 1379 } 1380 1381 /* 1382 * This routine actually starts the transmission on the interface 1383 */ 1384 static inline void 1385 fe_xmit(sc) 1386 struct fe_softc *sc; 1387 { 1388 1389 /* 1390 * Set a timer just in case we never hear from the board again. 1391 * We use longer timeout for multiple packet transmission. 1392 * I'm not sure this timer value is appropriate. FIXME. 1393 */ 1394 sc->sc_arpcom.ac_if.if_timer = 1 + sc->txb_count; 1395 1396 /* Update txb variables. */ 1397 sc->txb_sched = sc->txb_count; 1398 sc->txb_count = 0; 1399 sc->txb_free = sc->txb_size; 1400 1401 #if FE_DELAYED_PADDING 1402 /* Omit the postponed padding process. */ 1403 sc->txb_padding = 0; 1404 #endif 1405 1406 /* Start transmitter, passing packets in TX buffer. */ 1407 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START); 1408 } 1409 1410 /* 1411 * Start output on interface. 1412 * We make two assumptions here: 1413 * 1) that the current priority is set to splimp _before_ this code 1414 * is called *and* is returned to the appropriate priority after 1415 * return 1416 * 2) that the IFF_OACTIVE flag is checked before this code is called 1417 * (i.e. that the output part of the interface is idle) 1418 */ 1419 void 1420 fe_start(ifp) 1421 struct ifnet *ifp; 1422 { 1423 struct fe_softc *sc = fecd.cd_devs[ifp->if_unit]; 1424 struct mbuf *m; 1425 1426 #if FE_DEBUG >= 1 1427 /* Just a sanity check. */ 1428 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) { 1429 /* 1430 * Txb_count and txb_free co-works to manage the 1431 * transmission buffer. Txb_count keeps track of the 1432 * used potion of the buffer, while txb_free does unused 1433 * potion. So, as long as the driver runs properly, 1434 * txb_count is zero if and only if txb_free is same 1435 * as txb_size (which represents whole buffer.) 1436 */ 1437 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n", 1438 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free); 1439 /* 1440 * So, what should I do, then? 1441 * 1442 * We now know txb_count and txb_free contradicts. We 1443 * cannot, however, tell which is wrong. More 1444 * over, we cannot peek 86960 transmission buffer or 1445 * reset the transmission buffer. (In fact, we can 1446 * reset the entire interface. I don't want to do it.) 1447 * 1448 * If txb_count is incorrect, leaving it as is will cause 1449 * sending of gabages after next interrupt. We have to 1450 * avoid it. Hence, we reset the txb_count here. If 1451 * txb_free was incorrect, resetting txb_count just loose 1452 * some packets. We can live with it. 1453 */ 1454 sc->txb_count = 0; 1455 } 1456 #endif 1457 1458 #if FE_DEBUG >= 1 1459 /* 1460 * First, see if there are buffered packets and an idle 1461 * transmitter - should never happen at this point. 1462 */ 1463 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) { 1464 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n", 1465 sc->sc_dev.dv_xname, sc->txb_count); 1466 fe_xmit(sc); 1467 } 1468 #endif 1469 1470 /* 1471 * Stop accepting more transmission packets temporarily, when 1472 * a filter change request is delayed. Updating the MARs on 1473 * 86960 flushes the transmisstion buffer, so it is delayed 1474 * until all buffered transmission packets have been sent 1475 * out. 1476 */ 1477 if (sc->filter_change) { 1478 /* 1479 * Filter change requst is delayed only when the DLC is 1480 * working. DLC soon raise an interrupt after finishing 1481 * the work. 1482 */ 1483 goto indicate_active; 1484 } 1485 1486 for (;;) { 1487 /* 1488 * See if there is room to put another packet in the buffer. 1489 * We *could* do better job by peeking the send queue to 1490 * know the length of the next packet. Current version just 1491 * tests against the worst case (i.e., longest packet). FIXME. 1492 * 1493 * When adding the packet-peek feature, don't forget adding a 1494 * test on txb_count against QUEUEING_MAX. 1495 * There is a little chance the packet count exceeds 1496 * the limit. Assume transmission buffer is 8KB (2x8KB 1497 * configuration) and an application sends a bunch of small 1498 * (i.e., minimum packet sized) packets rapidly. An 8KB 1499 * buffer can hold 130 blocks of 62 bytes long... 1500 */ 1501 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) { 1502 /* No room. */ 1503 goto indicate_active; 1504 } 1505 1506 #if FE_SINGLE_TRANSMISSION 1507 if (sc->txb_count > 0) { 1508 /* Just one packet per a transmission buffer. */ 1509 goto indicate_active; 1510 } 1511 #endif 1512 1513 /* 1514 * Get the next mbuf chain for a packet to send. 1515 */ 1516 IF_DEQUEUE(&ifp->if_snd, m); 1517 if (m == 0) { 1518 /* No more packets to send. */ 1519 goto indicate_inactive; 1520 } 1521 1522 #if NBPFILTER > 0 1523 /* Tap off here if there is a BPF listener. */ 1524 if (ifp->if_bpf) 1525 bpf_mtap(ifp->if_bpf, m); 1526 #endif 1527 1528 /* 1529 * Copy the mbuf chain into the transmission buffer. 1530 * txb_* variables are updated as necessary. 1531 */ 1532 fe_write_mbufs(sc, m); 1533 1534 m_freem(m); 1535 1536 /* Start transmitter if it's idle. */ 1537 if (sc->txb_sched == 0) 1538 fe_xmit(sc); 1539 } 1540 1541 indicate_inactive: 1542 /* 1543 * We are using the !OACTIVE flag to indicate to 1544 * the outside world that we can accept an 1545 * additional packet rather than that the 1546 * transmitter is _actually_ active. Indeed, the 1547 * transmitter may be active, but if we haven't 1548 * filled all the buffers with data then we still 1549 * want to accept more. 1550 */ 1551 ifp->if_flags &= ~IFF_OACTIVE; 1552 return; 1553 1554 indicate_active: 1555 /* 1556 * The transmitter is active, and there are no room for 1557 * more outgoing packets in the transmission buffer. 1558 */ 1559 ifp->if_flags |= IFF_OACTIVE; 1560 return; 1561 } 1562 1563 /* 1564 * Transmission interrupt handler 1565 * The control flow of this function looks silly. FIXME. 1566 */ 1567 void 1568 fe_tint(sc, tstat) 1569 struct fe_softc *sc; 1570 u_char tstat; 1571 { 1572 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1573 int left; 1574 int col; 1575 1576 /* 1577 * Handle "excessive collision" interrupt. 1578 */ 1579 if (tstat & FE_D0_COLL16) { 1580 /* 1581 * Find how many packets (including this collided one) 1582 * are left unsent in transmission buffer. 1583 */ 1584 left = inb(sc->sc_iobase + FE_BMPR10); 1585 1586 #if FE_DEBUG >= 2 1587 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n", 1588 sc->sc_dev.dv_xname, left, sc->txb_sched); 1589 #endif 1590 #if FE_DEBUG >= 3 1591 fe_dump(LOG_INFO, sc); 1592 #endif 1593 1594 /* 1595 * Update statistics. 1596 */ 1597 ifp->if_collisions += 16; 1598 ifp->if_oerrors++; 1599 ifp->if_opackets += sc->txb_sched - left; 1600 1601 /* 1602 * Collision statistics has been updated. 1603 * Clear the collision flag on 86960 now to avoid confusion. 1604 */ 1605 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID); 1606 1607 /* 1608 * Restart transmitter, skipping the 1609 * collided packet. 1610 * 1611 * We *must* skip the packet to keep network running 1612 * properly. Excessive collision error is an 1613 * indication of the network overload. If we 1614 * tried sending the same packet after excessive 1615 * collision, the network would be filled with 1616 * out-of-time packets. Packets belonging 1617 * to reliable transport (such as TCP) are resent 1618 * by some upper layer. 1619 */ 1620 outb(sc->sc_iobase + FE_BMPR11, 1621 FE_B11_CTRL_SKIP | FE_B11_MODE1); 1622 sc->txb_sched = left - 1; 1623 } 1624 1625 /* 1626 * Handle "transmission complete" interrupt. 1627 */ 1628 if (tstat & FE_D0_TXDONE) { 1629 /* 1630 * Add in total number of collisions on last 1631 * transmission. We also clear "collision occurred" flag 1632 * here. 1633 * 1634 * 86960 has a design flow on collision count on multiple 1635 * packet transmission. When we send two or more packets 1636 * with one start command (that's what we do when the 1637 * transmission queue is clauded), 86960 informs us number 1638 * of collisions occured on the last packet on the 1639 * transmission only. Number of collisions on previous 1640 * packets are lost. I have told that the fact is clearly 1641 * stated in the Fujitsu document. 1642 * 1643 * I considered not to mind it seriously. Collision 1644 * count is not so important, anyway. Any comments? FIXME. 1645 */ 1646 1647 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) { 1648 /* Clear collision flag. */ 1649 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID); 1650 1651 /* Extract collision count from 86960. */ 1652 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL; 1653 if (col == 0) { 1654 /* 1655 * Status register indicates collisions, 1656 * while the collision count is zero. 1657 * This can happen after multiple packet 1658 * transmission, indicating that one or more 1659 * previous packet(s) had been collided. 1660 * 1661 * Since the accurate number of collisions 1662 * has been lost, we just guess it as 1; 1663 * Am I too optimistic? FIXME. 1664 */ 1665 col = 1; 1666 } else 1667 col >>= FE_D4_COL_SHIFT; 1668 ifp->if_collisions += col; 1669 #if FE_DEBUG >= 4 1670 log(LOG_WARNING, "%s: %d collision%s (%d)\n", 1671 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s", 1672 sc->txb_sched); 1673 #endif 1674 } 1675 1676 /* 1677 * Update total number of successfully 1678 * transmitted packets. 1679 */ 1680 ifp->if_opackets += sc->txb_sched; 1681 sc->txb_sched = 0; 1682 1683 /* 1684 * The transmitter is no more active. 1685 * Reset output active flag and watchdog timer. 1686 */ 1687 ifp->if_flags &= ~IFF_OACTIVE; 1688 ifp->if_timer = 0; 1689 1690 /* 1691 * If more data is ready to transmit in the buffer, start 1692 * transmitting them. Otherwise keep transmitter idle, 1693 * even if more data is queued. This gives receive 1694 * process a slight priority. 1695 */ 1696 if (sc->txb_count > 0) 1697 fe_xmit(sc); 1698 } 1699 } 1700 1701 /* 1702 * Ethernet interface receiver interrupt. 1703 */ 1704 void 1705 fe_rint(sc, rstat) 1706 struct fe_softc *sc; 1707 u_char rstat; 1708 { 1709 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1710 int len; 1711 u_char status; 1712 int i; 1713 1714 /* 1715 * Update statistics if this interrupt is caused by an error. 1716 */ 1717 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | 1718 FE_D1_ALGERR | FE_D1_SRTPKT)) { 1719 #if FE_DEBUG >= 3 1720 log(LOG_WARNING, "%s: receive error: %b\n", 1721 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS); 1722 #endif 1723 ifp->if_ierrors++; 1724 } 1725 1726 /* 1727 * MB86960 has a flag indicating "receive queue empty." 1728 * We just loop cheking the flag to pull out all received 1729 * packets. 1730 * 1731 * We limit the number of iterrations to avoid infinite loop. 1732 * It can be caused by a very slow CPU (some broken 1733 * peripheral may insert incredible number of wait cycles) 1734 * or, worse, by a broken MB86960 chip. 1735 */ 1736 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 1737 /* Stop the iterration if 86960 indicates no packets. */ 1738 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP) 1739 break; 1740 1741 /* 1742 * Extract A receive status byte. 1743 * As our 86960 is in 16 bit bus access mode, we have to 1744 * use inw() to get the status byte. The significant 1745 * value is returned in lower 8 bits. 1746 */ 1747 status = (u_char)inw(sc->sc_iobase + FE_BMPR8); 1748 #if FE_DEBUG >= 4 1749 log(LOG_INFO, "%s: receive status = %02x\n", 1750 sc->sc_dev.dv_xname, status); 1751 #endif 1752 1753 /* 1754 * If there was an error, update statistics and drop 1755 * the packet, unless the interface is in promiscuous 1756 * mode. 1757 */ 1758 if ((status & 0xF0) != 0x20) { /* XXXX ? */ 1759 if ((ifp->if_flags & IFF_PROMISC) == 0) { 1760 ifp->if_ierrors++; 1761 fe_droppacket(sc); 1762 continue; 1763 } 1764 } 1765 1766 /* 1767 * Extract the packet length. 1768 * It is a sum of a header (14 bytes) and a payload. 1769 * CRC has been stripped off by the 86960. 1770 */ 1771 len = inw(sc->sc_iobase + FE_BMPR8); 1772 1773 /* 1774 * MB86965 checks the packet length and drop big packet 1775 * before passing it to us. There are no chance we can 1776 * get [crufty] packets. Hence, if the length exceeds 1777 * the specified limit, it means some serious failure, 1778 * such as out-of-sync on receive buffer management. 1779 * 1780 * Is this statement true? FIXME. 1781 */ 1782 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) { 1783 #if FE_DEBUG >= 2 1784 log(LOG_WARNING, 1785 "%s: received a %s packet? (%u bytes)\n", 1786 sc->sc_dev.dv_xname, 1787 len < ETHER_HDR_SIZE ? "partial" : "big", len); 1788 #endif 1789 ifp->if_ierrors++; 1790 fe_droppacket(sc); 1791 continue; 1792 } 1793 1794 /* 1795 * Check for a short (RUNT) packet. We *do* check 1796 * but do nothing other than print a message. 1797 * Short packets are illegal, but does nothing bad 1798 * if it carries data for upper layer. 1799 */ 1800 #if FE_DEBUG >= 2 1801 if (len < ETHER_MIN_LEN) { 1802 log(LOG_WARNING, 1803 "%s: received a short packet? (%u bytes)\n", 1804 sc->sc_dev.dv_xname, len); 1805 } 1806 #endif 1807 1808 /* 1809 * Go get a packet. 1810 */ 1811 if (!fe_get_packet(sc, len)) { 1812 /* Skip a packet, updating statistics. */ 1813 #if FE_DEBUG >= 2 1814 log(LOG_WARNING, 1815 "%s: out of mbufs; dropping packet (%u bytes)\n", 1816 sc->sc_dev.dv_xname, len); 1817 #endif 1818 ifp->if_ierrors++; 1819 fe_droppacket(sc); 1820 1821 /* 1822 * We stop receiving packets, even if there are 1823 * more in the buffer. We hope we can get more 1824 * mbufs next time. 1825 */ 1826 return; 1827 } 1828 1829 /* Successfully received a packet. Update stat. */ 1830 ifp->if_ipackets++; 1831 } 1832 } 1833 1834 /* 1835 * Ethernet interface interrupt processor 1836 */ 1837 int 1838 feintr(arg) 1839 void *arg; 1840 { 1841 struct fe_softc *sc = arg; 1842 u_char tstat, rstat; 1843 1844 #if FE_DEBUG >= 4 1845 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname); 1846 fe_dump(LOG_INFO, sc); 1847 #endif 1848 1849 /* 1850 * Get interrupt conditions, masking unneeded flags. 1851 */ 1852 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK; 1853 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK; 1854 if (tstat == 0 && rstat == 0) 1855 return (0); 1856 1857 /* 1858 * Loop until there are no more new interrupt conditions. 1859 */ 1860 for (;;) { 1861 /* 1862 * Reset the conditions we are acknowledging. 1863 */ 1864 outb(sc->sc_iobase + FE_DLCR0, tstat); 1865 outb(sc->sc_iobase + FE_DLCR1, rstat); 1866 1867 /* 1868 * Handle transmitter interrupts. Handle these first because 1869 * the receiver will reset the board under some conditions. 1870 */ 1871 if (tstat != 0) 1872 fe_tint(sc, tstat); 1873 1874 /* 1875 * Handle receiver interrupts. 1876 */ 1877 if (rstat != 0) 1878 fe_rint(sc, rstat); 1879 1880 /* 1881 * Update the multicast address filter if it is 1882 * needed and possible. We do it now, because 1883 * we can make sure the transmission buffer is empty, 1884 * and there is a good chance that the receive queue 1885 * is empty. It will minimize the possibility of 1886 * packet lossage. 1887 */ 1888 if (sc->filter_change && 1889 sc->txb_count == 0 && sc->txb_sched == 0) { 1890 fe_loadmar(sc); 1891 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 1892 } 1893 1894 /* 1895 * If it looks like the transmitter can take more data, 1896 * attempt to start output on the interface. This is done 1897 * after handling the receiver interrupt to give the 1898 * receive operation priority. 1899 */ 1900 if ((sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) 1901 fe_start(&sc->sc_arpcom.ac_if); 1902 1903 /* 1904 * Get interrupt conditions, masking unneeded flags. 1905 */ 1906 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK; 1907 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK; 1908 if (tstat == 0 && rstat == 0) 1909 return (1); 1910 } 1911 } 1912 1913 /* 1914 * Process an ioctl request. This code needs some work - it looks pretty ugly. 1915 */ 1916 int 1917 fe_ioctl(ifp, command, data) 1918 register struct ifnet *ifp; 1919 u_long command; 1920 caddr_t data; 1921 { 1922 struct fe_softc *sc = fecd.cd_devs[ifp->if_unit]; 1923 register struct ifaddr *ifa = (struct ifaddr *)data; 1924 struct ifreq *ifr = (struct ifreq *)data; 1925 int s, error = 0; 1926 1927 #if FE_DEBUG >= 3 1928 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command); 1929 #endif 1930 1931 s = splimp(); 1932 1933 switch (command) { 1934 1935 case SIOCSIFADDR: 1936 ifp->if_flags |= IFF_UP; 1937 1938 switch (ifa->ifa_addr->sa_family) { 1939 #ifdef INET 1940 case AF_INET: 1941 fe_init(sc); 1942 arp_ifinit(&sc->sc_arpcom, ifa); 1943 break; 1944 #endif 1945 #ifdef NS 1946 case AF_NS: 1947 { 1948 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1949 1950 if (ns_nullhost(*ina)) 1951 ina->x_host = 1952 *(union ns_host *)(sc->sc_arpcom.ac_enaddr); 1953 else 1954 bcopy(ina->x_host.c_host, 1955 sc->sc_arpcom.ac_enaddr, 1956 sizeof(sc->sc_arpcom.ac_enaddr)); 1957 /* Set new address. */ 1958 fe_init(sc); 1959 break; 1960 } 1961 #endif 1962 default: 1963 fe_init(sc); 1964 break; 1965 } 1966 break; 1967 1968 case SIOCSIFFLAGS: 1969 if ((ifp->if_flags & IFF_UP) == 0 && 1970 (ifp->if_flags & IFF_RUNNING) != 0) { 1971 /* 1972 * If interface is marked down and it is running, then 1973 * stop it. 1974 */ 1975 fe_stop(sc); 1976 ifp->if_flags &= ~IFF_RUNNING; 1977 } else if ((ifp->if_flags & IFF_UP) != 0 && 1978 (ifp->if_flags & IFF_RUNNING) == 0) { 1979 /* 1980 * If interface is marked up and it is stopped, then 1981 * start it. 1982 */ 1983 fe_init(sc); 1984 } else { 1985 /* 1986 * Reset the interface to pick up changes in any other 1987 * flags that affect hardware registers. 1988 */ 1989 fe_setmode(sc); 1990 } 1991 #if DEBUG >= 1 1992 /* "ifconfig fe0 debug" to print register dump. */ 1993 if (ifp->if_flags & IFF_DEBUG) { 1994 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname); 1995 fe_dump(LOG_DEBUG, sc); 1996 } 1997 #endif 1998 break; 1999 2000 case SIOCADDMULTI: 2001 case SIOCDELMULTI: 2002 /* Update our multicast list. */ 2003 error = (command == SIOCADDMULTI) ? 2004 ether_addmulti(ifr, &sc->sc_arpcom) : 2005 ether_delmulti(ifr, &sc->sc_arpcom); 2006 2007 if (error == ENETRESET) { 2008 /* 2009 * Multicast list has changed; set the hardware filter 2010 * accordingly. 2011 */ 2012 fe_setmode(sc); 2013 error = 0; 2014 } 2015 break; 2016 2017 default: 2018 error = EINVAL; 2019 } 2020 2021 splx(s); 2022 return (error); 2023 } 2024 2025 /* 2026 * Retreive packet from receive buffer and send to the next level up via 2027 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 2028 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 2029 */ 2030 int 2031 fe_get_packet(sc, len) 2032 struct fe_softc *sc; 2033 int len; 2034 { 2035 struct ether_header *eh; 2036 struct mbuf *m; 2037 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 2038 2039 /* Allocate a header mbuf. */ 2040 MGETHDR(m, M_DONTWAIT, MT_DATA); 2041 if (m == 0) 2042 return (0); 2043 m->m_pkthdr.rcvif = ifp; 2044 m->m_pkthdr.len = len; 2045 2046 /* The following silliness is to make NFS happy. */ 2047 #define EROUND ((sizeof(struct ether_header) + 3) & ~3) 2048 #define EOFF (EROUND - sizeof(struct ether_header)) 2049 2050 /* 2051 * Our strategy has one more problem. There is a policy on 2052 * mbuf cluster allocation. It says that we must have at 2053 * least MINCLSIZE (208 bytes) to allocate a cluster. For a 2054 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2), 2055 * our code violates the rule... 2056 * On the other hand, the current code is short, simle, 2057 * and fast, however. It does no harmful thing, just waists 2058 * some memory. Any comments? FIXME. 2059 */ 2060 2061 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 2062 if (len > MHLEN - EOFF) { 2063 MCLGET(m, M_DONTWAIT); 2064 if ((m->m_flags & M_EXT) == 0) { 2065 m_freem(m); 2066 return (0); 2067 } 2068 } 2069 2070 /* 2071 * The following assumes there is room for the ether header in the 2072 * header mbuf. 2073 */ 2074 m->m_data += EOFF; 2075 eh = mtod(m, struct ether_header *); 2076 2077 /* Set the length of this packet. */ 2078 m->m_len = len; 2079 2080 /* Get a packet. */ 2081 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1); 2082 2083 #if NBPFILTER > 0 2084 /* 2085 * Check if there's a BPF listener on this interface. If so, hand off 2086 * the raw packet to bpf. 2087 */ 2088 if (ifp->if_bpf) { 2089 bpf_mtap(ifp->if_bpf, m); 2090 2091 /* 2092 * Note that the interface cannot be in promiscuous mode if 2093 * there are no BPF listeners. And if we are in promiscuous 2094 * mode, we have to check if this packet is really ours. 2095 */ 2096 if ((ifp->if_flags & IFF_PROMISC) != 0 && 2097 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 2098 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr, 2099 sizeof(eh->ether_dhost)) != 0) { 2100 m_freem(m); 2101 return (1); 2102 } 2103 } 2104 #endif 2105 2106 /* Fix up data start offset in mbuf to point past ether header. */ 2107 m_adj(m, sizeof(struct ether_header)); 2108 ether_input(ifp, eh, m); 2109 return (1); 2110 } 2111 2112 /* 2113 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 2114 * Returns number of bytes actually written, including length word. 2115 * 2116 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 2117 * Packets shorter than Ethernet minimum are legal, and we pad them 2118 * before sending out. An exception is "partial" packets which are 2119 * shorter than mandatory Ethernet header. 2120 * 2121 * I wrote a code for an experimental "delayed padding" technique. 2122 * When employed, it postpones the padding process for short packets. 2123 * If xmit() occured at the moment, the padding process is omitted, and 2124 * garbages are sent as pad data. If next packet is stored in the 2125 * transmission buffer before xmit(), write_mbuf() pads the previous 2126 * packet before transmitting new packet. This *may* gain the 2127 * system performance (slightly). 2128 */ 2129 void 2130 fe_write_mbufs(sc, m) 2131 struct fe_softc *sc; 2132 struct mbuf *m; 2133 { 2134 int bmpr8 = sc->sc_iobase + FE_BMPR8; 2135 struct mbuf *mp; 2136 u_char *data; 2137 u_short savebyte; /* WARNING: Architecture dependent! */ 2138 int totlen, len, wantbyte; 2139 2140 #if FE_DELAYED_PADDING 2141 /* Do the "delayed padding." */ 2142 len = sc->txb_padding >> 1; 2143 if (len > 0) { 2144 while (--len >= 0) 2145 outw(bmpr8, 0); 2146 sc->txb_padding = 0; 2147 } 2148 #endif 2149 2150 /* We need to use m->m_pkthdr.len, so require the header */ 2151 if ((m->m_flags & M_PKTHDR) == 0) 2152 panic("fe_write_mbufs: no header mbuf"); 2153 2154 #if FE_DEBUG >= 2 2155 /* First, count up the total number of bytes to copy. */ 2156 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next) 2157 totlen += mp->m_len; 2158 /* Check if this matches the one in the packet header. */ 2159 if (totlen != m->m_pkthdr.len) 2160 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n", 2161 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len); 2162 #else 2163 /* Just use the length value in the packet header. */ 2164 totlen = m->m_pkthdr.len; 2165 #endif 2166 2167 #if FE_DEBUG >= 1 2168 /* 2169 * Should never send big packets. If such a packet is passed, 2170 * it should be a bug of upper layer. We just ignore it. 2171 * ... Partial (too short) packets, neither. 2172 */ 2173 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) { 2174 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n", 2175 sc->sc_dev.dv_xname, 2176 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen); 2177 sc->sc_arpcom.ac_if.if_oerrors++; 2178 return; 2179 } 2180 #endif 2181 2182 /* 2183 * Put the length word for this frame. 2184 * Does 86960 accept odd length? -- Yes. 2185 * Do we need to pad the length to minimum size by ourselves? 2186 * -- Generally yes. But for (or will be) the last 2187 * packet in the transmission buffer, we can skip the 2188 * padding process. It may gain performance slightly. FIXME. 2189 */ 2190 outw(bmpr8, max(totlen, ETHER_MIN_LEN)); 2191 2192 /* 2193 * Update buffer status now. 2194 * Truncate the length up to an even number, since we use outw(). 2195 */ 2196 totlen = (totlen + 1) & ~1; 2197 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN); 2198 sc->txb_count++; 2199 2200 #if FE_DELAYED_PADDING 2201 /* Postpone the packet padding if necessary. */ 2202 if (totlen < ETHER_MIN_LEN) 2203 sc->txb_padding = ETHER_MIN_LEN - totlen; 2204 #endif 2205 2206 /* 2207 * Transfer the data from mbuf chain to the transmission buffer. 2208 * MB86960 seems to require that data be transferred as words, and 2209 * only words. So that we require some extra code to patch 2210 * over odd-length mbufs. 2211 */ 2212 wantbyte = 0; 2213 for (; m != 0; m = m->m_next) { 2214 /* Ignore empty mbuf. */ 2215 len = m->m_len; 2216 if (len == 0) 2217 continue; 2218 2219 /* Find the actual data to send. */ 2220 data = mtod(m, caddr_t); 2221 2222 /* Finish the last byte. */ 2223 if (wantbyte) { 2224 outw(bmpr8, savebyte | (*data << 8)); 2225 data++; 2226 len--; 2227 wantbyte = 0; 2228 } 2229 2230 /* Output contiguous words. */ 2231 if (len > 1) 2232 outsw(bmpr8, data, len >> 1); 2233 2234 /* Save remaining byte, if there is one. */ 2235 if (len & 1) { 2236 data += len & ~1; 2237 savebyte = *data; 2238 wantbyte = 1; 2239 } 2240 } 2241 2242 /* Spit the last byte, if the length is odd. */ 2243 if (wantbyte) 2244 outw(bmpr8, savebyte); 2245 2246 #if ! FE_DELAYED_PADDING 2247 /* 2248 * Pad the packet to the minimum length if necessary. 2249 */ 2250 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1); 2251 while (--len >= 0) 2252 outw(bmpr8, 0); 2253 #endif 2254 } 2255 2256 /* 2257 * Compute the multicast address filter from the 2258 * list of multicast addresses we need to listen to. 2259 */ 2260 void 2261 fe_getmcaf(ac, af) 2262 struct arpcom *ac; 2263 u_char *af; 2264 { 2265 struct ifnet *ifp = &ac->ac_if; 2266 struct ether_multi *enm; 2267 register u_char *cp, c; 2268 register u_long crc; 2269 register int i, len; 2270 struct ether_multistep step; 2271 2272 /* 2273 * Set up multicast address filter by passing all multicast addresses 2274 * through a crc generator, and then using the high order 6 bits as an 2275 * index into the 64 bit logical address filter. The high order bit 2276 * selects the word, while the rest of the bits select the bit within 2277 * the word. 2278 */ 2279 2280 if ((ifp->if_flags & IFF_PROMISC) != 0) 2281 goto allmulti; 2282 2283 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00; 2284 ETHER_FIRST_MULTI(step, ac, enm); 2285 while (enm != NULL) { 2286 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 2287 sizeof(enm->enm_addrlo)) != 0) { 2288 /* 2289 * We must listen to a range of multicast addresses. 2290 * For now, just accept all multicasts, rather than 2291 * trying to set only those filter bits needed to match 2292 * the range. (At this time, the only use of address 2293 * ranges is for IP multicast routing, for which the 2294 * range is big enough to require all bits set.) 2295 */ 2296 goto allmulti; 2297 } 2298 2299 cp = enm->enm_addrlo; 2300 crc = 0xffffffff; 2301 for (len = sizeof(enm->enm_addrlo); --len >= 0;) { 2302 c = *cp++; 2303 for (i = 8; --i >= 0;) { 2304 if ((crc & 0x01) ^ (c & 0x01)) { 2305 crc >>= 1; 2306 crc ^= 0xedb88320; 2307 } else 2308 crc >>= 1; 2309 c >>= 1; 2310 } 2311 } 2312 /* Just want the 6 most significant bits. */ 2313 crc >>= 26; 2314 2315 /* Turn on the corresponding bit in the filter. */ 2316 af[crc >> 3] |= 1 << (crc & 7); 2317 2318 ETHER_NEXT_MULTI(step, enm); 2319 } 2320 ifp->if_flags &= ~IFF_ALLMULTI; 2321 return; 2322 2323 allmulti: 2324 ifp->if_flags |= IFF_ALLMULTI; 2325 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff; 2326 } 2327 2328 /* 2329 * Calculate a new "multicast packet filter" and put the 86960 2330 * receiver in appropriate mode. 2331 */ 2332 void 2333 fe_setmode(sc) 2334 struct fe_softc *sc; 2335 { 2336 int flags = sc->sc_arpcom.ac_if.if_flags; 2337 2338 /* 2339 * If the interface is not running, we postpone the update 2340 * process for receive modes and multicast address filter 2341 * until the interface is restarted. It reduces some 2342 * complicated job on maintaining chip states. (Earlier versions 2343 * of this driver had a bug on that point...) 2344 * 2345 * To complete the trick, fe_init() calls fe_setmode() after 2346 * restarting the interface. 2347 */ 2348 if ((flags & IFF_RUNNING) == 0) 2349 return; 2350 2351 /* 2352 * Promiscuous mode is handled separately. 2353 */ 2354 if ((flags & IFF_PROMISC) != 0) { 2355 /* 2356 * Program 86960 to receive all packets on the segment 2357 * including those directed to other stations. 2358 * Multicast filter stored in MARs are ignored 2359 * under this setting, so we don't need to update it. 2360 * 2361 * Promiscuous mode is used solely by BPF, and BPF only 2362 * listens to valid (no error) packets. So, we ignore 2363 * errornous ones even in this mode. 2364 */ 2365 outb(sc->sc_iobase + FE_DLCR5, 2366 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1); 2367 sc->filter_change = 0; 2368 2369 #if FE_DEBUG >= 3 2370 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname); 2371 #endif 2372 return; 2373 } 2374 2375 /* 2376 * Turn the chip to the normal (non-promiscuous) mode. 2377 */ 2378 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1); 2379 2380 /* 2381 * Find the new multicast filter value. 2382 */ 2383 fe_getmcaf(&sc->sc_arpcom, sc->filter); 2384 sc->filter_change = 1; 2385 2386 #if FE_DEBUG >= 3 2387 log(LOG_INFO, 2388 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n", 2389 sc->sc_dev.dv_xname, 2390 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3], 2391 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]); 2392 #endif 2393 2394 /* 2395 * We have to update the multicast filter in the 86960, A.S.A.P. 2396 * 2397 * Note that the DLC (Data Linc Control unit, i.e. transmitter 2398 * and receiver) must be stopped when feeding the filter, and 2399 * DLC trushes all packets in both transmission and receive 2400 * buffers when stopped. 2401 * 2402 * ... Are the above sentenses correct? I have to check the 2403 * manual of the MB86960A. FIXME. 2404 * 2405 * To reduce the packet lossage, we delay the filter update 2406 * process until buffers are empty. 2407 */ 2408 if (sc->txb_sched == 0 && sc->txb_count == 0 && 2409 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) { 2410 /* 2411 * Buffers are (apparently) empty. Load 2412 * the new filter value into MARs now. 2413 */ 2414 fe_loadmar(sc); 2415 } else { 2416 /* 2417 * Buffers are not empty. Mark that we have to update 2418 * the MARs. The new filter will be loaded by feintr() 2419 * later. 2420 */ 2421 #if FE_DEBUG >= 4 2422 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname); 2423 #endif 2424 } 2425 } 2426 2427 /* 2428 * Load a new multicast address filter into MARs. 2429 * 2430 * The caller must have splimp'ed befor fe_loadmar. 2431 * This function starts the DLC upon return. So it can be called only 2432 * when the chip is working, i.e., from the driver's point of view, when 2433 * a device is RUNNING. (I mistook the point in previous versions.) 2434 */ 2435 void 2436 fe_loadmar(sc) 2437 struct fe_softc *sc; 2438 { 2439 2440 /* Stop the DLC (transmitter and receiver). */ 2441 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 2442 2443 /* Select register bank 1 for MARs. */ 2444 outb(sc->sc_iobase + FE_DLCR7, 2445 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 2446 2447 /* Copy filter value into the registers. */ 2448 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN); 2449 2450 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 2451 outb(sc->sc_iobase + FE_DLCR7, 2452 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 2453 2454 /* Restart the DLC. */ 2455 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 2456 2457 /* We have just updated the filter. */ 2458 sc->filter_change = 0; 2459 2460 #if FE_DEBUG >= 3 2461 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname); 2462 #endif 2463 } 2464 2465 #if FE_DEBUG >= 1 2466 void 2467 fe_dump(level, sc) 2468 int level; 2469 struct fe_softc *sc; 2470 { 2471 int iobase = sc->sc_iobase; 2472 u_char save_dlcr7; 2473 2474 save_dlcr7 = inb(iobase + FE_DLCR7); 2475 2476 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x", 2477 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1), 2478 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3), 2479 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5), 2480 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7)); 2481 2482 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR); 2483 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,", 2484 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9), 2485 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11), 2486 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13), 2487 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15)); 2488 2489 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR); 2490 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,", 2491 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9), 2492 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11), 2493 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13), 2494 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15)); 2495 2496 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR); 2497 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.", 2498 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11), 2499 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13), 2500 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15), 2501 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17), 2502 inb(iobase + FE_BMPR19)); 2503 2504 outb(iobase + FE_DLCR7, save_dlcr7); 2505 } 2506 #endif 2507