1 /* 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 */ 22 23 /* 24 * Portions copyright (C) 1993, David Greenman. This software may be used, 25 * modified, copied, distributed, and sold, in both source and binary form 26 * provided that the above copyright and these terms are retained. Under no 27 * circumstances is the author responsible for the proper functioning of this 28 * software, nor does the author assume any responsibility for damages 29 * incurred with its use. 30 */ 31 32 #define FE_VERSION "if_fe.c ver. 0.8" 33 34 /* 35 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards. 36 * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp> 37 * 38 * This version is intended to be a generic template for various 39 * MB86960A/MB86965A based Ethernet cards. It currently supports 40 * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied- 41 * Telesis AT1700 series and RE2000 series. There are some 42 * unnecessary hooks embedded, which are primarily intended to support 43 * other types of Ethernet cards, but the author is not sure whether 44 * they are useful. 45 */ 46 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/errno.h> 52 #include <sys/ioctl.h> 53 #include <sys/mbuf.h> 54 #include <sys/socket.h> 55 #include <sys/syslog.h> 56 #include <sys/device.h> 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/netisr.h> 62 63 #ifdef INET 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_ether.h> 69 #endif 70 71 #ifdef NS 72 #include <netns/ns.h> 73 #include <netns/ns_if.h> 74 #endif 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #include <net/bpfdesc.h> 79 #endif 80 81 #include <machine/cpu.h> 82 #include <machine/intr.h> 83 #include <machine/pio.h> 84 85 #include <dev/isa/isareg.h> 86 #include <dev/isa/isavar.h> 87 #include <dev/ic/mb86960reg.h> 88 #include <dev/isa/if_fereg.h> 89 90 /* 91 * Default settings for fe driver specific options. 92 * They can be set in config file by "options" statements. 93 */ 94 95 /* 96 * Debug control. 97 * 0: No debug at all. All debug specific codes are stripped off. 98 * 1: Silent. No debug messages are logged except emergent ones. 99 * 2: Brief. Lair events and/or important information are logged. 100 * 3: Detailed. Logs all information which *may* be useful for debugging. 101 * 4: Trace. All actions in the driver is logged. Super verbose. 102 */ 103 #ifndef FE_DEBUG 104 #define FE_DEBUG 1 105 #endif 106 107 /* 108 * Delay padding of short transmission packets to minimum Ethernet size. 109 * This may or may not gain performance. An EXPERIMENTAL option. 110 */ 111 #ifndef FE_DELAYED_PADDING 112 #define FE_DELAYED_PADDING 0 113 #endif 114 115 /* 116 * Transmit just one packet per a "send" command to 86960. 117 * This option is intended for performance test. An EXPERIMENTAL option. 118 */ 119 #ifndef FE_SINGLE_TRANSMISSION 120 #define FE_SINGLE_TRANSMISSION 0 121 #endif 122 123 /* 124 * Device configuration flags. 125 */ 126 127 /* DLCR6 settings. */ 128 #define FE_FLAGS_DLCR6_VALUE 0x007F 129 130 /* Force DLCR6 override. */ 131 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080 132 133 /* A cludge for PCMCIA support. */ 134 #define FE_FLAGS_PCMCIA 0x8000 135 136 /* Identification of the driver version. */ 137 static char const fe_version[] = FE_VERSION " / " FE_REG_VERSION; 138 139 /* 140 * Supported hardware (Ethernet card) types 141 * This information is currently used only for debugging 142 */ 143 enum fe_type { 144 /* For cards which are successfully probed but not identified. */ 145 FE_TYPE_UNKNOWN, 146 147 /* Fujitsu FMV-180 series. */ 148 FE_TYPE_FMV181, 149 FE_TYPE_FMV182, 150 151 /* Allied-Telesis AT1700 series and RE2000 series. */ 152 FE_TYPE_AT1700T, 153 FE_TYPE_AT1700BT, 154 FE_TYPE_AT1700FT, 155 FE_TYPE_AT1700AT, 156 FE_TYPE_RE2000, 157 158 /* PCMCIA by Fujitsu. */ 159 FE_TYPE_MBH10302, 160 FE_TYPE_MBH10304, 161 }; 162 163 /* 164 * fe_softc: per line info and status 165 */ 166 struct fe_softc { 167 struct device sc_dev; 168 void *sc_ih; 169 170 struct arpcom sc_arpcom; /* ethernet common */ 171 172 /* Set by probe() and not modified in later phases. */ 173 enum fe_type type; /* interface type code */ 174 char *typestr; /* printable name of the interface. */ 175 int sc_iobase; /* MB86960A I/O base address */ 176 177 u_char proto_dlcr4; /* DLCR4 prototype. */ 178 u_char proto_dlcr5; /* DLCR5 prototype. */ 179 u_char proto_dlcr6; /* DLCR6 prototype. */ 180 u_char proto_dlcr7; /* DLCR7 prototype. */ 181 u_char proto_bmpr13; /* BMPR13 prototype. */ 182 183 /* Vendor specific hooks. */ 184 void (*init) __P((struct fe_softc *)); /* Just before fe_init(). */ 185 void (*stop) __P((struct fe_softc *)); /* Just after fe_stop(). */ 186 187 /* Transmission buffer management. */ 188 u_short txb_size; /* total bytes in TX buffer */ 189 u_short txb_free; /* free bytes in TX buffer */ 190 u_char txb_count; /* number of packets in TX buffer */ 191 u_char txb_sched; /* number of scheduled packets */ 192 u_char txb_padding; /* number of delayed padding bytes */ 193 194 /* Multicast address filter management. */ 195 u_char filter_change; /* MARs must be changed ASAP. */ 196 u_char filter[FE_FILTER_LEN]; /* new filter value. */ 197 }; 198 199 /* Frequently accessed members in arpcom. */ 200 #define sc_enaddr sc_arpcom.ac_enaddr 201 202 /* Standard driver entry points. These can be static. */ 203 int feprobe __P((struct device *, void *, void *)); 204 void feattach __P((struct device *, struct device *, void *)); 205 int feintr __P((void *)); 206 void fe_init __P((struct fe_softc *)); 207 int fe_ioctl __P((struct ifnet *, u_long, caddr_t)); 208 void fe_start __P((struct ifnet *)); 209 void fe_reset __P((struct fe_softc *)); 210 void fe_watchdog __P((struct ifnet *)); 211 212 /* Local functions. Order of declaration is confused. FIXME. */ 213 int fe_probe_fmv __P((struct fe_softc *, struct isa_attach_args *)); 214 int fe_probe_ati __P((struct fe_softc *, struct isa_attach_args *)); 215 int fe_probe_mbh __P((struct fe_softc *, struct isa_attach_args *)); 216 void fe_init_mbh __P((struct fe_softc *)); 217 int fe_get_packet __P((struct fe_softc *, int)); 218 void fe_stop __P((struct fe_softc *)); 219 void fe_tint __P((/*struct fe_softc *, u_char*/)); 220 void fe_rint __P((/*struct fe_softc *, u_char*/)); 221 static inline 222 void fe_xmit __P((struct fe_softc *)); 223 void fe_write_mbufs __P((struct fe_softc *, struct mbuf *)); 224 void fe_getmcaf __P((struct arpcom *, u_char *)); 225 void fe_setmode __P((struct fe_softc *)); 226 void fe_loadmar __P((struct fe_softc *)); 227 #if FE_DEBUG >= 1 228 void fe_dump __P((int, struct fe_softc *)); 229 #endif 230 231 struct cfattach fe_ca = { 232 sizeof(struct fe_softc), feprobe, feattach 233 }; 234 235 struct cfdriver fe_cd = { 236 NULL, "fe", DV_IFNET 237 }; 238 239 /* Ethernet constants. To be defined in if_ehter.h? FIXME. */ 240 #define ETHER_MIN_LEN 60 /* with header, without CRC. */ 241 #define ETHER_MAX_LEN 1514 /* with header, without CRC. */ 242 #define ETHER_ADDR_LEN 6 /* number of bytes in an address. */ 243 #define ETHER_HDR_SIZE 14 /* src addr, dst addr, and data type. */ 244 245 /* 246 * Fe driver specific constants which relate to 86960/86965. 247 */ 248 249 /* Interrupt masks. */ 250 #define FE_TMASK (FE_D2_COLL16 | FE_D2_TXDONE) 251 #define FE_RMASK (FE_D3_OVRFLO | FE_D3_CRCERR | \ 252 FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY) 253 254 /* Maximum number of iterrations for a receive interrupt. */ 255 #define FE_MAX_RECV_COUNT ((65536 - 2048 * 2) / 64) 256 /* Maximum size of SRAM is 65536, 257 * minimum size of transmission buffer in fe is 2x2KB, 258 * and minimum amount of received packet including headers 259 * added by the chip is 64 bytes. 260 * Hence FE_MAX_RECV_COUNT is the upper limit for number 261 * of packets in the receive buffer. */ 262 263 /* 264 * Convenient routines to access contiguous I/O ports. 265 */ 266 267 static inline void 268 inblk (int addr, u_char * mem, int len) 269 { 270 while (--len >= 0) { 271 *mem++ = inb(addr++); 272 } 273 } 274 275 static inline void 276 outblk (int addr, u_char const * mem, int len) 277 { 278 while (--len >= 0) { 279 outb(addr++, *mem++); 280 } 281 } 282 283 /* 284 * Hardware probe routines. 285 */ 286 287 /* 288 * Determine if the device is present. 289 */ 290 int 291 feprobe(parent, match, aux) 292 struct device *parent; 293 void *match, *aux; 294 { 295 struct fe_softc *sc = match; 296 struct isa_attach_args *ia = aux; 297 298 #if FE_DEBUG >= 2 299 log(LOG_INFO, "%s: %s\n", sc->sc_dev.dv_xname, fe_version); 300 #endif 301 302 /* Probe an address. */ 303 sc->sc_iobase = ia->ia_iobase; 304 305 if (fe_probe_fmv(sc, ia)) 306 return (1); 307 if (fe_probe_ati(sc, ia)) 308 return (1); 309 if (fe_probe_mbh(sc, ia)) 310 return (1); 311 return (0); 312 } 313 314 /* 315 * Check for specific bits in specific registers have specific values. 316 */ 317 struct fe_simple_probe_struct { 318 u_char port; /* Offset from the base I/O address. */ 319 u_char mask; /* Bits to be checked. */ 320 u_char bits; /* Values to be compared against. */ 321 }; 322 323 static inline int 324 fe_simple_probe (int addr, struct fe_simple_probe_struct const * sp) 325 { 326 struct fe_simple_probe_struct const * p; 327 328 for (p = sp; p->mask != 0; p++) { 329 if ((inb(addr + p->port) & p->mask) != p->bits) { 330 return (0); 331 } 332 } 333 return (1); 334 } 335 336 /* 337 * Routines to read all bytes from the config EEPROM through MB86965A. 338 * I'm not sure what exactly I'm doing here... I was told just to follow 339 * the steps, and it worked. Could someone tell me why the following 340 * code works? (Or, why all similar codes I tried previously doesn't 341 * work.) FIXME. 342 */ 343 344 static inline void 345 strobe (int bmpr16) 346 { 347 /* 348 * Output same value twice. To speed-down execution? 349 */ 350 outb(bmpr16, FE_B16_SELECT); 351 outb(bmpr16, FE_B16_SELECT); 352 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 353 outb(bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 354 outb(bmpr16, FE_B16_SELECT); 355 outb(bmpr16, FE_B16_SELECT); 356 } 357 358 void 359 fe_read_eeprom(sc, data) 360 struct fe_softc *sc; 361 u_char *data; 362 { 363 int iobase = sc->sc_iobase; 364 int bmpr16 = iobase + FE_BMPR16; 365 int bmpr17 = iobase + FE_BMPR17; 366 u_char n, val, bit; 367 368 /* Read bytes from EEPROM; two bytes per an iterration. */ 369 for (n = 0; n < FE_EEPROM_SIZE / 2; n++) { 370 /* Reset the EEPROM interface. */ 371 outb(bmpr16, 0x00); 372 outb(bmpr17, 0x00); 373 outb(bmpr16, FE_B16_SELECT); 374 375 /* Start EEPROM access. */ 376 outb(bmpr17, FE_B17_DATA); 377 strobe(bmpr16); 378 379 /* Pass the iterration count to the chip. */ 380 val = 0x80 | n; 381 for (bit = 0x80; bit != 0x00; bit >>= 1) { 382 outb(bmpr17, (val & bit) ? FE_B17_DATA : 0); 383 strobe(bmpr16); 384 } 385 outb(bmpr17, 0x00); 386 387 /* Read a byte. */ 388 val = 0; 389 for (bit = 0x80; bit != 0x00; bit >>= 1) { 390 strobe(bmpr16); 391 if (inb(bmpr17) & FE_B17_DATA) 392 val |= bit; 393 } 394 *data++ = val; 395 396 /* Read one more byte. */ 397 val = 0; 398 for (bit = 0x80; bit != 0x00; bit >>= 1) { 399 strobe(bmpr16); 400 if (inb(bmpr17) & FE_B17_DATA) 401 val |= bit; 402 } 403 *data++ = val; 404 } 405 406 #if FE_DEBUG >= 3 407 /* Report what we got. */ 408 data -= FE_EEPROM_SIZE; 409 log(LOG_INFO, "%s: EEPROM at %04x:" 410 " %02x%02x%02x%02x %02x%02x%02x%02x -" 411 " %02x%02x%02x%02x %02x%02x%02x%02x -" 412 " %02x%02x%02x%02x %02x%02x%02x%02x -" 413 " %02x%02x%02x%02x %02x%02x%02x%02x\n", 414 sc->sc_dev.dv_xname, iobase, 415 data[ 0], data[ 1], data[ 2], data[ 3], 416 data[ 4], data[ 5], data[ 6], data[ 7], 417 data[ 8], data[ 9], data[10], data[11], 418 data[12], data[13], data[14], data[15], 419 data[16], data[17], data[18], data[19], 420 data[20], data[21], data[22], data[23], 421 data[24], data[25], data[26], data[27], 422 data[28], data[29], data[30], data[31]); 423 #endif 424 } 425 426 /* 427 * Hardware (vendor) specific probe routines. 428 */ 429 430 /* 431 * Probe and initialization for Fujitsu FMV-180 series boards 432 */ 433 int 434 fe_probe_fmv(sc, ia) 435 struct fe_softc *sc; 436 struct isa_attach_args *ia; 437 { 438 int i, n; 439 int iobase = sc->sc_iobase; 440 int irq; 441 442 static int const iomap[8] = 443 { 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x300, 0x340 }; 444 static int const irqmap[4] = 445 { 3, 7, 10, 15 }; 446 447 static struct fe_simple_probe_struct const probe_table[] = { 448 { FE_DLCR2, 0x70, 0x00 }, 449 { FE_DLCR4, 0x08, 0x00 }, 450 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */ 451 452 { FE_FMV0, FE_FMV0_MAGIC_MASK, FE_FMV0_MAGIC_VALUE }, 453 { FE_FMV1, FE_FMV1_CARDID_MASK, FE_FMV1_CARDID_ID }, 454 { FE_FMV3, FE_FMV3_EXTRA_MASK, FE_FMV3_EXTRA_VALUE }, 455 #if 1 456 /* 457 * Test *vendor* part of the station address for Fujitsu. 458 * The test will gain reliability of probe process, but 459 * it rejects FMV-180 clone boards manufactured by other vendors. 460 * We have to turn the test off when such cards are made available. 461 */ 462 { FE_FMV4, 0xFF, 0x00 }, 463 { FE_FMV5, 0xFF, 0x00 }, 464 { FE_FMV6, 0xFF, 0x0E }, 465 #else 466 /* 467 * We can always verify the *first* 2 bits (in Ehternet 468 * bit order) are "no multicast" and "no local" even for 469 * unknown vendors. 470 */ 471 { FE_FMV4, 0x03, 0x00 }, 472 #endif 473 { 0 } 474 }; 475 476 #if 0 477 /* 478 * Dont probe at all if the config says we are PCMCIA... 479 */ 480 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0) 481 return (0); 482 #endif 483 484 /* 485 * See if the sepcified address is possible for FMV-180 series. 486 */ 487 for (i = 0; i < 8; i++) { 488 if (iomap[i] == iobase) 489 break; 490 } 491 if (i == 8) 492 return (0); 493 494 /* Simple probe. */ 495 if (!fe_simple_probe(iobase, probe_table)) 496 return (0); 497 498 /* Check if our I/O address matches config info on EEPROM. */ 499 n = (inb(iobase + FE_FMV2) & FE_FMV2_ADDR) >> FE_FMV2_ADDR_SHIFT; 500 if (iomap[n] != iobase) 501 return (0); 502 503 /* Determine the card type. */ 504 switch (inb(iobase + FE_FMV0) & FE_FMV0_MODEL) { 505 case FE_FMV0_MODEL_FMV181: 506 sc->type = FE_TYPE_FMV181; 507 sc->typestr = "FMV-181"; 508 break; 509 case FE_FMV0_MODEL_FMV182: 510 sc->type = FE_TYPE_FMV182; 511 sc->typestr = "FMV-182"; 512 break; 513 default: 514 /* Unknown card type: maybe a new model, but... */ 515 return (0); 516 } 517 518 /* 519 * An FMV-180 has successfully been proved. 520 * Determine which IRQ to be used. 521 * 522 * In this version, we always get an IRQ assignment from the 523 * FMV-180's configuration EEPROM, ignoring that specified in 524 * config file. 525 */ 526 n = (inb(iobase + FE_FMV2) & FE_FMV2_IRQ) >> FE_FMV2_IRQ_SHIFT; 527 irq = irqmap[n]; 528 529 if (ia->ia_irq != IRQUNK) { 530 if (ia->ia_irq != irq) { 531 printf("%s: irq mismatch; kernel configured %d != board configured %d\n", 532 sc->sc_dev.dv_xname, ia->ia_irq, irq); 533 return (0); 534 } 535 } else 536 ia->ia_irq = irq; 537 538 /* 539 * Initialize constants in the per-line structure. 540 */ 541 542 /* Get our station address from EEPROM. */ 543 inblk(iobase + FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN); 544 545 /* Make sure we got a valid station address. */ 546 if ((sc->sc_enaddr[0] & 0x03) != 0x00 547 || (sc->sc_enaddr[0] == 0x00 548 && sc->sc_enaddr[1] == 0x00 549 && sc->sc_enaddr[2] == 0x00)) 550 return (0); 551 552 /* Register values which depend on board design. */ 553 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 554 sc->proto_dlcr5 = 0; 555 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC; 556 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 557 558 /* 559 * Program the 86960 as follows: 560 * SRAM: 32KB, 100ns, byte-wide access. 561 * Transmission buffer: 4KB x 2. 562 * System bus interface: 16 bits. 563 * We cannot change these values but TXBSIZE, because they 564 * are hard-wired on the board. Modifying TXBSIZE will affect 565 * the driver performance. 566 */ 567 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 568 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 569 570 /* 571 * Minimum initialization of the hardware. 572 * We write into registers; hope I/O ports have no 573 * overlap with other boards. 574 */ 575 576 /* Initialize ASIC. */ 577 outb(iobase + FE_FMV3, 0); 578 outb(iobase + FE_FMV10, 0); 579 580 /* Wait for a while. I'm not sure this is necessary. FIXME. */ 581 delay(200); 582 583 /* Initialize 86960. */ 584 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 585 delay(200); 586 587 /* Disable all interrupts. */ 588 outb(iobase + FE_DLCR2, 0); 589 outb(iobase + FE_DLCR3, 0); 590 591 /* Turn the "master interrupt control" flag of ASIC on. */ 592 outb(iobase + FE_FMV3, FE_FMV3_ENABLE_FLAG); 593 594 /* 595 * That's all. FMV-180 occupies 32 I/O addresses, by the way. 596 */ 597 ia->ia_iosize = 32; 598 ia->ia_msize = 0; 599 return (1); 600 } 601 602 /* 603 * Probe and initialization for Allied-Telesis AT1700/RE2000 series. 604 */ 605 int 606 fe_probe_ati(sc, ia) 607 struct fe_softc *sc; 608 struct isa_attach_args *ia; 609 { 610 int i, n; 611 int iobase = sc->sc_iobase; 612 u_char eeprom[FE_EEPROM_SIZE]; 613 u_char save16, save17; 614 int irq; 615 616 static int const iomap[8] = 617 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 }; 618 static int const irqmap[4][4] = { 619 { 3, 4, 5, 9 }, 620 { 10, 11, 12, 15 }, 621 { 3, 11, 5, 15 }, 622 { 10, 11, 14, 15 }, 623 }; 624 static struct fe_simple_probe_struct const probe_table[] = { 625 { FE_DLCR2, 0x70, 0x00 }, 626 { FE_DLCR4, 0x08, 0x00 }, 627 { FE_DLCR5, 0x80, 0x00 }, 628 #if 0 629 { FE_BMPR16, 0x1B, 0x00 }, 630 { FE_BMPR17, 0x7F, 0x00 }, 631 #endif 632 { 0 } 633 }; 634 635 #if 0 636 /* 637 * Don't probe at all if the config says we are PCMCIA... 638 */ 639 if ((cf->cf_flags & FE_FLAGS_PCMCIA) != 0) 640 return (0); 641 #endif 642 643 #if FE_DEBUG >= 4 644 log(LOG_INFO, "%s: probe (0x%x) for ATI\n", sc->sc_dev.dv_xname, iobase); 645 fe_dump(LOG_INFO, sc); 646 #endif 647 648 /* 649 * See if the sepcified address is possible for MB86965A JLI mode. 650 */ 651 for (i = 0; i < 8; i++) { 652 if (iomap[i] == iobase) 653 break; 654 } 655 if (i == 8) 656 return (0); 657 658 /* 659 * We should test if MB86965A is on the base address now. 660 * Unfortunately, it is very hard to probe it reliably, since 661 * we have no way to reset the chip under software control. 662 * On cold boot, we could check the "signature" bit patterns 663 * described in the Fujitsu document. On warm boot, however, 664 * we can predict almost nothing about register values. 665 */ 666 if (!fe_simple_probe(iobase, probe_table)) 667 return (0); 668 669 /* Save old values of the registers. */ 670 save16 = inb(iobase + FE_BMPR16); 671 save17 = inb(iobase + FE_BMPR17); 672 673 /* Check if our I/O address matches config info on 86965. */ 674 n = (inb(iobase + FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT; 675 if (iomap[n] != iobase) 676 goto fail; 677 678 /* 679 * We are now almost sure we have an AT1700 at the given 680 * address. So, read EEPROM through 86965. We have to write 681 * into LSI registers to read from EEPROM. I want to avoid it 682 * at this stage, but I cannot test the presense of the chip 683 * any further without reading EEPROM. FIXME. 684 */ 685 fe_read_eeprom(sc, eeprom); 686 687 /* Make sure the EEPROM is turned off. */ 688 outb(iobase + FE_BMPR16, 0); 689 outb(iobase + FE_BMPR17, 0); 690 691 /* Make sure that config info in EEPROM and 86965 agree. */ 692 if (eeprom[FE_EEPROM_CONF] != inb(iobase + FE_BMPR19)) 693 goto fail; 694 695 /* 696 * Determine the card type. 697 */ 698 switch (eeprom[FE_ATI_EEP_MODEL]) { 699 case FE_ATI_MODEL_AT1700T: 700 sc->type = FE_TYPE_AT1700T; 701 sc->typestr = "AT-1700T"; 702 break; 703 case FE_ATI_MODEL_AT1700BT: 704 sc->type = FE_TYPE_AT1700BT; 705 sc->typestr = "AT-1700BT"; 706 break; 707 case FE_ATI_MODEL_AT1700FT: 708 sc->type = FE_TYPE_AT1700FT; 709 sc->typestr = "AT-1700FT"; 710 break; 711 case FE_ATI_MODEL_AT1700AT: 712 sc->type = FE_TYPE_AT1700AT; 713 sc->typestr = "AT-1700AT"; 714 break; 715 default: 716 sc->type = FE_TYPE_RE2000; 717 sc->typestr = "unknown (RE-2000?)"; 718 break; 719 } 720 721 /* 722 * Try to determine IRQ settings. 723 * Different models use different ranges of IRQs. 724 */ 725 n = (inb(iobase + FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT; 726 switch (eeprom[FE_ATI_EEP_REVISION] & 0xf0) { 727 case 0x30: 728 irq = irqmap[3][n]; 729 break; 730 case 0x10: 731 case 0x50: 732 irq = irqmap[2][n]; 733 break; 734 case 0x40: 735 case 0x60: 736 if (eeprom[FE_ATI_EEP_MAGIC] & 0x04) { 737 irq = irqmap[1][n]; 738 break; 739 } 740 default: 741 irq = irqmap[0][n]; 742 break; 743 } 744 745 if (ia->ia_irq != IRQUNK) { 746 if (ia->ia_irq != irq) { 747 printf("%s: irq mismatch; kernel configured %d != board configured %d\n", 748 sc->sc_dev.dv_xname, ia->ia_irq, irq); 749 return (0); 750 } 751 } else 752 ia->ia_irq = irq; 753 754 /* 755 * Initialize constants in the per-line structure. 756 */ 757 758 /* Get our station address from EEPROM. */ 759 bcopy(eeprom + FE_ATI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN); 760 761 /* Make sure we got a valid station address. */ 762 if ((sc->sc_enaddr[0] & 0x03) != 0x00 763 || (sc->sc_enaddr[0] == 0x00 764 && sc->sc_enaddr[1] == 0x00 765 && sc->sc_enaddr[2] == 0x00)) 766 goto fail; 767 768 /* Should find all register prototypes here. FIXME. */ 769 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; /* FIXME */ 770 sc->proto_dlcr5 = 0; 771 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_EC; 772 #if 0 /* XXXX Should we use this? */ 773 sc->proto_bmpr13 = eeprom[FE_ATI_EEP_MEDIA]; 774 #else 775 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 776 #endif 777 778 /* 779 * Program the 86965 as follows: 780 * SRAM: 32KB, 100ns, byte-wide access. 781 * Transmission buffer: 4KB x 2. 782 * System bus interface: 16 bits. 783 * We cannot change these values but TXBSIZE, because they 784 * are hard-wired on the board. Modifying TXBSIZE will affect 785 * the driver performance. 786 */ 787 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 788 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 789 790 #if FE_DEBUG >= 3 791 log(LOG_INFO, "%s: ATI found\n", sc->sc_dev.dv_xname); 792 fe_dump(LOG_INFO, sc); 793 #endif 794 795 /* Initialize 86965. */ 796 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 797 delay(200); 798 799 /* Disable all interrupts. */ 800 outb(iobase + FE_DLCR2, 0); 801 outb(iobase + FE_DLCR3, 0); 802 803 #if FE_DEBUG >= 3 804 log(LOG_INFO, "%s: end of fe_probe_ati()\n", sc->sc_dev.dv_xname); 805 fe_dump(LOG_INFO, sc); 806 #endif 807 808 /* 809 * That's all. AT1700 occupies 32 I/O addresses, by the way. 810 */ 811 ia->ia_iosize = 32; 812 ia->ia_msize = 0; 813 return (1); 814 815 fail: 816 /* Restore register values, in the case we had no 86965. */ 817 outb(iobase + FE_BMPR16, save16); 818 outb(iobase + FE_BMPR17, save17); 819 return (0); 820 } 821 822 /* 823 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface. 824 */ 825 int 826 fe_probe_mbh(sc, ia) 827 struct fe_softc *sc; 828 struct isa_attach_args *ia; 829 { 830 int iobase = sc->sc_iobase; 831 832 static struct fe_simple_probe_struct probe_table[] = { 833 { FE_DLCR2, 0x70, 0x00 }, 834 { FE_DLCR4, 0x08, 0x00 }, 835 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */ 836 #if 0 837 /* 838 * Test *vendor* part of the address for Fujitsu. 839 * The test will gain reliability of probe process, but 840 * it rejects clones by other vendors, or OEM product 841 * supplied by resalers other than Fujitsu. 842 */ 843 { FE_MBH10, 0xFF, 0x00 }, 844 { FE_MBH11, 0xFF, 0x00 }, 845 { FE_MBH12, 0xFF, 0x0E }, 846 #else 847 /* 848 * We can always verify the *first* 2 bits (in Ehternet 849 * bit order) are "global" and "unicast" even for 850 * unknown vendors. 851 */ 852 { FE_MBH10, 0x03, 0x00 }, 853 #endif 854 /* Just a gap? Seems reliable, anyway. */ 855 { 0x12, 0xFF, 0x00 }, 856 { 0x13, 0xFF, 0x00 }, 857 { 0x14, 0xFF, 0x00 }, 858 { 0x15, 0xFF, 0x00 }, 859 { 0x16, 0xFF, 0x00 }, 860 { 0x17, 0xFF, 0x00 }, 861 { 0x18, 0xFF, 0xFF }, 862 { 0x19, 0xFF, 0xFF }, 863 864 { 0 } 865 }; 866 867 #if 0 868 /* 869 * We need a PCMCIA flag. 870 */ 871 if ((cf->cf_flags & FE_FLAGS_PCMCIA) == 0) 872 return (0); 873 #endif 874 875 /* 876 * We need explicit IRQ and supported address. 877 */ 878 if (ia->ia_irq == IRQUNK || (iobase & ~0x3E0) != 0) 879 return (0); 880 881 #if FE_DEBUG >= 3 882 log(LOG_INFO, "%s: top of fe_probe_mbh()\n", sc->sc_dev.dv_xname); 883 fe_dump(LOG_INFO, sc); 884 #endif 885 886 /* 887 * See if MBH10302 is on its address. 888 * I'm not sure the following probe code works. FIXME. 889 */ 890 if (!fe_simple_probe(iobase, probe_table)) 891 return (0); 892 893 /* Determine the card type. */ 894 sc->type = FE_TYPE_MBH10302; 895 sc->typestr = "MBH10302 (PCMCIA)"; 896 897 /* 898 * Initialize constants in the per-line structure. 899 */ 900 901 /* Get our station address from EEPROM. */ 902 inblk(iobase + FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN); 903 904 /* Make sure we got a valid station address. */ 905 if ((sc->sc_enaddr[0] & 0x03) != 0x00 906 || (sc->sc_enaddr[0] == 0x00 907 && sc->sc_enaddr[1] == 0x00 908 && sc->sc_enaddr[2] == 0x00)) 909 return (0); 910 911 /* Should find all register prototypes here. FIXME. */ 912 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 913 sc->proto_dlcr5 = 0; 914 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE; 915 sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO; 916 917 /* 918 * Program the 86960 as follows: 919 * SRAM: 32KB, 100ns, byte-wide access. 920 * Transmission buffer: 4KB x 2. 921 * System bus interface: 16 bits. 922 * We cannot change these values but TXBSIZE, because they 923 * are hard-wired on the board. Modifying TXBSIZE will affect 924 * the driver performance. 925 */ 926 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 927 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 928 929 /* Setup hooks. We need a special initialization procedure. */ 930 sc->init = fe_init_mbh; 931 932 /* 933 * Minimum initialization. 934 */ 935 936 /* Wait for a while. I'm not sure this is necessary. FIXME. */ 937 delay(200); 938 939 /* Minimul initialization of 86960. */ 940 outb(iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 941 delay(200); 942 943 /* Disable all interrupts. */ 944 outb(iobase + FE_DLCR2, 0); 945 outb(iobase + FE_DLCR3, 0); 946 947 #if 1 /* FIXME. */ 948 /* Initialize system bus interface and encoder/decoder operation. */ 949 outb(iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_DISABLE); 950 #endif 951 952 /* 953 * That's all. MBH10302 occupies 32 I/O addresses, by the way. 954 */ 955 ia->ia_iosize = 32; 956 ia->ia_msize = 0; 957 return (1); 958 } 959 960 /* MBH specific initialization routine. */ 961 void 962 fe_init_mbh(sc) 963 struct fe_softc *sc; 964 { 965 966 /* Probably required after hot-insertion... */ 967 968 /* Wait for a while. I'm not sure this is necessary. FIXME. */ 969 delay(200); 970 971 /* Minimul initialization of 86960. */ 972 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 973 delay(200); 974 975 /* Disable all interrupts. */ 976 outb(sc->sc_iobase + FE_DLCR2, 0); 977 outb(sc->sc_iobase + FE_DLCR3, 0); 978 979 /* Enable master interrupt flag. */ 980 outb(sc->sc_iobase + FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE); 981 } 982 983 /* 984 * Install interface into kernel networking data structures 985 */ 986 void 987 feattach(parent, self, aux) 988 struct device *parent, *self; 989 void *aux; 990 { 991 struct fe_softc *sc = (void *)self; 992 struct isa_attach_args *ia = aux; 993 struct cfdata *cf = sc->sc_dev.dv_cfdata; 994 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 995 996 /* Stop the 86960. */ 997 fe_stop(sc); 998 999 /* Initialize ifnet structure. */ 1000 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 1001 ifp->if_softc = sc; 1002 ifp->if_start = fe_start; 1003 ifp->if_ioctl = fe_ioctl; 1004 ifp->if_watchdog = fe_watchdog; 1005 ifp->if_flags = 1006 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 1007 1008 /* 1009 * Set maximum size of output queue, if it has not been set. 1010 * It is done here as this driver may be started after the 1011 * system intialization (i.e., the interface is PCMCIA.) 1012 * 1013 * I'm not sure this is really necessary, but, even if it is, 1014 * it should be done somewhere else, e.g., in if_attach(), 1015 * since it must be a common workaround for all network drivers. 1016 * FIXME. 1017 */ 1018 if (ifp->if_snd.ifq_maxlen == 0) { 1019 extern int ifqmaxlen; /* Don't be so shocked... */ 1020 ifp->if_snd.ifq_maxlen = ifqmaxlen; 1021 } 1022 1023 #if FE_DEBUG >= 3 1024 log(LOG_INFO, "%s: feattach()\n", sc->sc_dev.dv_xname); 1025 fe_dump(LOG_INFO, sc); 1026 #endif 1027 1028 #if FE_SINGLE_TRANSMISSION 1029 /* Override txb config to allocate minimum. */ 1030 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ 1031 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 1032 #endif 1033 1034 /* Modify hardware config if it is requested. */ 1035 if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0) 1036 sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE; 1037 1038 /* Find TX buffer size, based on the hardware dependent proto. */ 1039 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 1040 case FE_D6_TXBSIZ_2x2KB: 1041 sc->txb_size = 2048; 1042 break; 1043 case FE_D6_TXBSIZ_2x4KB: 1044 sc->txb_size = 4096; 1045 break; 1046 case FE_D6_TXBSIZ_2x8KB: 1047 sc->txb_size = 8192; 1048 break; 1049 default: 1050 /* Oops, we can't work with single buffer configuration. */ 1051 #if FE_DEBUG >= 2 1052 log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n", 1053 sc->sc_dev.dv_xname); 1054 #endif 1055 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 1056 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 1057 sc->txb_size = 2048; 1058 break; 1059 } 1060 1061 /* Attach the interface. */ 1062 if_attach(ifp); 1063 ether_ifattach(ifp); 1064 1065 /* Print additional info when attached. */ 1066 printf(": address %s, type %s\n", 1067 ether_sprintf(sc->sc_arpcom.ac_enaddr), sc->typestr); 1068 #if FE_DEBUG >= 3 1069 { 1070 int buf, txb, bbw, sbw, ram; 1071 1072 buf = txb = bbw = sbw = ram = -1; 1073 switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) { 1074 case FE_D6_BUFSIZ_8KB: 1075 buf = 8; 1076 break; 1077 case FE_D6_BUFSIZ_16KB: 1078 buf = 16; 1079 break; 1080 case FE_D6_BUFSIZ_32KB: 1081 buf = 32; 1082 break; 1083 case FE_D6_BUFSIZ_64KB: 1084 buf = 64; 1085 break; 1086 } 1087 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 1088 case FE_D6_TXBSIZ_2x2KB: 1089 txb = 2; 1090 break; 1091 case FE_D6_TXBSIZ_2x4KB: 1092 txb = 4; 1093 break; 1094 case FE_D6_TXBSIZ_2x8KB: 1095 txb = 8; 1096 break; 1097 } 1098 switch (sc->proto_dlcr6 & FE_D6_BBW) { 1099 case FE_D6_BBW_BYTE: 1100 bbw = 8; 1101 break; 1102 case FE_D6_BBW_WORD: 1103 bbw = 16; 1104 break; 1105 } 1106 switch (sc->proto_dlcr6 & FE_D6_SBW) { 1107 case FE_D6_SBW_BYTE: 1108 sbw = 8; 1109 break; 1110 case FE_D6_SBW_WORD: 1111 sbw = 16; 1112 break; 1113 } 1114 switch (sc->proto_dlcr6 & FE_D6_SRAM) { 1115 case FE_D6_SRAM_100ns: 1116 ram = 100; 1117 break; 1118 case FE_D6_SRAM_150ns: 1119 ram = 150; 1120 break; 1121 } 1122 printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 1123 sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw); 1124 } 1125 #endif 1126 1127 #if NBPFILTER > 0 1128 /* If BPF is in the kernel, call the attach for it. */ 1129 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 1130 #endif 1131 1132 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 1133 IPL_NET, feintr, sc); 1134 } 1135 1136 /* 1137 * Reset interface. 1138 */ 1139 void 1140 fe_reset(sc) 1141 struct fe_softc *sc; 1142 { 1143 int s; 1144 1145 s = splnet(); 1146 fe_stop(sc); 1147 fe_init(sc); 1148 splx(s); 1149 } 1150 1151 /* 1152 * Stop everything on the interface. 1153 * 1154 * All buffered packets, both transmitting and receiving, 1155 * if any, will be lost by stopping the interface. 1156 */ 1157 void 1158 fe_stop(sc) 1159 struct fe_softc *sc; 1160 { 1161 1162 #if FE_DEBUG >= 3 1163 log(LOG_INFO, "%s: top of fe_stop()\n", sc->sc_dev.dv_xname); 1164 fe_dump(LOG_INFO, sc); 1165 #endif 1166 1167 /* Disable interrupts. */ 1168 outb(sc->sc_iobase + FE_DLCR2, 0x00); 1169 outb(sc->sc_iobase + FE_DLCR3, 0x00); 1170 1171 /* Stop interface hardware. */ 1172 delay(200); 1173 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1174 delay(200); 1175 1176 /* Clear all interrupt status. */ 1177 outb(sc->sc_iobase + FE_DLCR0, 0xFF); 1178 outb(sc->sc_iobase + FE_DLCR1, 0xFF); 1179 1180 /* Put the chip in stand-by mode. */ 1181 delay(200); 1182 outb(sc->sc_iobase + FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN); 1183 delay(200); 1184 1185 /* MAR loading can be delayed. */ 1186 sc->filter_change = 0; 1187 1188 /* Call a hook. */ 1189 if (sc->stop) 1190 sc->stop(sc); 1191 1192 #if DEBUG >= 3 1193 log(LOG_INFO, "%s: end of fe_stop()\n", sc->sc_dev.dv_xname); 1194 fe_dump(LOG_INFO, sc); 1195 #endif 1196 } 1197 1198 /* 1199 * Device timeout/watchdog routine. Entered if the device neglects to 1200 * generate an interrupt after a transmit has been started on it. 1201 */ 1202 void 1203 fe_watchdog(ifp) 1204 struct ifnet *ifp; 1205 { 1206 struct fe_softc *sc = ifp->if_softc; 1207 1208 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1209 #if FE_DEBUG >= 3 1210 fe_dump(LOG_INFO, sc); 1211 #endif 1212 1213 /* Record how many packets are lost by this accident. */ 1214 sc->sc_arpcom.ac_if.if_oerrors += sc->txb_sched + sc->txb_count; 1215 1216 fe_reset(sc); 1217 } 1218 1219 /* 1220 * Drop (skip) a packet from receive buffer in 86960 memory. 1221 */ 1222 static inline void 1223 fe_droppacket(sc) 1224 struct fe_softc *sc; 1225 { 1226 1227 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP); 1228 } 1229 1230 /* 1231 * Initialize device. 1232 */ 1233 void 1234 fe_init(sc) 1235 struct fe_softc *sc; 1236 { 1237 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1238 int i; 1239 1240 #if FE_DEBUG >= 3 1241 log(LOG_INFO, "%s: top of fe_init()\n", sc->sc_dev.dv_xname); 1242 fe_dump(LOG_INFO, sc); 1243 #endif 1244 1245 /* Reset transmitter flags. */ 1246 ifp->if_flags &= ~IFF_OACTIVE; 1247 ifp->if_timer = 0; 1248 1249 sc->txb_free = sc->txb_size; 1250 sc->txb_count = 0; 1251 sc->txb_sched = 0; 1252 1253 /* Call a hook. */ 1254 if (sc->init) 1255 sc->init(sc); 1256 1257 #if FE_DEBUG >= 3 1258 log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname); 1259 fe_dump(LOG_INFO, sc); 1260 #endif 1261 1262 /* 1263 * Make sure to disable the chip, also. 1264 * This may also help re-programming the chip after 1265 * hot insertion of PCMCIAs. 1266 */ 1267 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1268 1269 /* Power up the chip and select register bank for DLCRs. */ 1270 delay(200); 1271 outb(sc->sc_iobase + FE_DLCR7, 1272 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP); 1273 delay(200); 1274 1275 /* Feed the station address. */ 1276 outblk(sc->sc_iobase + FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN); 1277 1278 /* Select the BMPR bank for runtime register access. */ 1279 outb(sc->sc_iobase + FE_DLCR7, 1280 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 1281 1282 /* Initialize registers. */ 1283 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */ 1284 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */ 1285 outb(sc->sc_iobase + FE_DLCR2, 0x00); 1286 outb(sc->sc_iobase + FE_DLCR3, 0x00); 1287 outb(sc->sc_iobase + FE_DLCR4, sc->proto_dlcr4); 1288 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5); 1289 outb(sc->sc_iobase + FE_BMPR10, 0x00); 1290 outb(sc->sc_iobase + FE_BMPR11, FE_B11_CTRL_SKIP); 1291 outb(sc->sc_iobase + FE_BMPR12, 0x00); 1292 outb(sc->sc_iobase + FE_BMPR13, sc->proto_bmpr13); 1293 outb(sc->sc_iobase + FE_BMPR14, FE_B14_FILTER); 1294 outb(sc->sc_iobase + FE_BMPR15, 0x00); 1295 1296 #if FE_DEBUG >= 3 1297 log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname); 1298 fe_dump(LOG_INFO, sc); 1299 #endif 1300 1301 /* Enable interrupts. */ 1302 outb(sc->sc_iobase + FE_DLCR2, FE_TMASK); 1303 outb(sc->sc_iobase + FE_DLCR3, FE_RMASK); 1304 1305 /* Enable transmitter and receiver. */ 1306 delay(200); 1307 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 1308 delay(200); 1309 1310 #if FE_DEBUG >= 3 1311 log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname); 1312 fe_dump(LOG_INFO, sc); 1313 #endif 1314 1315 /* 1316 * Make sure to empty the receive buffer. 1317 * 1318 * This may be redundant, but *if* the receive buffer were full 1319 * at this point, the driver would hang. I have experienced 1320 * some strange hangups just after UP. I hope the following 1321 * code solve the problem. 1322 * 1323 * I have changed the order of hardware initialization. 1324 * I think the receive buffer cannot have any packets at this 1325 * point in this version. The following code *must* be 1326 * redundant now. FIXME. 1327 */ 1328 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 1329 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP) 1330 break; 1331 fe_droppacket(sc); 1332 } 1333 #if FE_DEBUG >= 1 1334 if (i >= FE_MAX_RECV_COUNT) { 1335 log(LOG_ERR, "%s: cannot empty receive buffer\n", 1336 sc->sc_dev.dv_xname); 1337 } 1338 #endif 1339 #if FE_DEBUG >= 3 1340 if (i < FE_MAX_RECV_COUNT) { 1341 log(LOG_INFO, "%s: receive buffer emptied (%d)\n", 1342 sc->sc_dev.dv_xname, i); 1343 } 1344 #endif 1345 1346 #if FE_DEBUG >= 3 1347 log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname); 1348 fe_dump(LOG_INFO, sc); 1349 #endif 1350 1351 /* Do we need this here? */ 1352 outb(sc->sc_iobase + FE_DLCR0, 0xFF); /* Clear all bits. */ 1353 outb(sc->sc_iobase + FE_DLCR1, 0xFF); /* ditto. */ 1354 1355 #if FE_DEBUG >= 3 1356 log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname); 1357 fe_dump(LOG_INFO, sc); 1358 #endif 1359 1360 /* Set 'running' flag. */ 1361 ifp->if_flags |= IFF_RUNNING; 1362 1363 /* 1364 * At this point, the interface is runnung properly, 1365 * except that it receives *no* packets. we then call 1366 * fe_setmode() to tell the chip what packets to be 1367 * received, based on the if_flags and multicast group 1368 * list. It completes the initialization process. 1369 */ 1370 fe_setmode(sc); 1371 1372 #if FE_DEBUG >= 3 1373 log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname); 1374 fe_dump(LOG_INFO, sc); 1375 #endif 1376 1377 /* ...and attempt to start output. */ 1378 fe_start(ifp); 1379 1380 #if FE_DEBUG >= 3 1381 log(LOG_INFO, "%s: end of fe_init()\n", sc->sc_dev.dv_xname); 1382 fe_dump(LOG_INFO, sc); 1383 #endif 1384 } 1385 1386 /* 1387 * This routine actually starts the transmission on the interface 1388 */ 1389 static inline void 1390 fe_xmit(sc) 1391 struct fe_softc *sc; 1392 { 1393 1394 /* 1395 * Set a timer just in case we never hear from the board again. 1396 * We use longer timeout for multiple packet transmission. 1397 * I'm not sure this timer value is appropriate. FIXME. 1398 */ 1399 sc->sc_arpcom.ac_if.if_timer = 1 + sc->txb_count; 1400 1401 /* Update txb variables. */ 1402 sc->txb_sched = sc->txb_count; 1403 sc->txb_count = 0; 1404 sc->txb_free = sc->txb_size; 1405 1406 #if FE_DELAYED_PADDING 1407 /* Omit the postponed padding process. */ 1408 sc->txb_padding = 0; 1409 #endif 1410 1411 /* Start transmitter, passing packets in TX buffer. */ 1412 outb(sc->sc_iobase + FE_BMPR10, sc->txb_sched | FE_B10_START); 1413 } 1414 1415 /* 1416 * Start output on interface. 1417 * We make two assumptions here: 1418 * 1) that the current priority is set to splnet _before_ this code 1419 * is called *and* is returned to the appropriate priority after 1420 * return 1421 * 2) that the IFF_OACTIVE flag is checked before this code is called 1422 * (i.e. that the output part of the interface is idle) 1423 */ 1424 void 1425 fe_start(ifp) 1426 struct ifnet *ifp; 1427 { 1428 struct fe_softc *sc = ifp->if_softc; 1429 struct mbuf *m; 1430 1431 #if FE_DEBUG >= 1 1432 /* Just a sanity check. */ 1433 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) { 1434 /* 1435 * Txb_count and txb_free co-works to manage the 1436 * transmission buffer. Txb_count keeps track of the 1437 * used potion of the buffer, while txb_free does unused 1438 * potion. So, as long as the driver runs properly, 1439 * txb_count is zero if and only if txb_free is same 1440 * as txb_size (which represents whole buffer.) 1441 */ 1442 log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n", 1443 sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free); 1444 /* 1445 * So, what should I do, then? 1446 * 1447 * We now know txb_count and txb_free contradicts. We 1448 * cannot, however, tell which is wrong. More 1449 * over, we cannot peek 86960 transmission buffer or 1450 * reset the transmission buffer. (In fact, we can 1451 * reset the entire interface. I don't want to do it.) 1452 * 1453 * If txb_count is incorrect, leaving it as is will cause 1454 * sending of gabages after next interrupt. We have to 1455 * avoid it. Hence, we reset the txb_count here. If 1456 * txb_free was incorrect, resetting txb_count just loose 1457 * some packets. We can live with it. 1458 */ 1459 sc->txb_count = 0; 1460 } 1461 #endif 1462 1463 #if FE_DEBUG >= 1 1464 /* 1465 * First, see if there are buffered packets and an idle 1466 * transmitter - should never happen at this point. 1467 */ 1468 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) { 1469 log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n", 1470 sc->sc_dev.dv_xname, sc->txb_count); 1471 fe_xmit(sc); 1472 } 1473 #endif 1474 1475 /* 1476 * Stop accepting more transmission packets temporarily, when 1477 * a filter change request is delayed. Updating the MARs on 1478 * 86960 flushes the transmisstion buffer, so it is delayed 1479 * until all buffered transmission packets have been sent 1480 * out. 1481 */ 1482 if (sc->filter_change) { 1483 /* 1484 * Filter change requst is delayed only when the DLC is 1485 * working. DLC soon raise an interrupt after finishing 1486 * the work. 1487 */ 1488 goto indicate_active; 1489 } 1490 1491 for (;;) { 1492 /* 1493 * See if there is room to put another packet in the buffer. 1494 * We *could* do better job by peeking the send queue to 1495 * know the length of the next packet. Current version just 1496 * tests against the worst case (i.e., longest packet). FIXME. 1497 * 1498 * When adding the packet-peek feature, don't forget adding a 1499 * test on txb_count against QUEUEING_MAX. 1500 * There is a little chance the packet count exceeds 1501 * the limit. Assume transmission buffer is 8KB (2x8KB 1502 * configuration) and an application sends a bunch of small 1503 * (i.e., minimum packet sized) packets rapidly. An 8KB 1504 * buffer can hold 130 blocks of 62 bytes long... 1505 */ 1506 if (sc->txb_free < ETHER_MAX_LEN + FE_DATA_LEN_LEN) { 1507 /* No room. */ 1508 goto indicate_active; 1509 } 1510 1511 #if FE_SINGLE_TRANSMISSION 1512 if (sc->txb_count > 0) { 1513 /* Just one packet per a transmission buffer. */ 1514 goto indicate_active; 1515 } 1516 #endif 1517 1518 /* 1519 * Get the next mbuf chain for a packet to send. 1520 */ 1521 IF_DEQUEUE(&ifp->if_snd, m); 1522 if (m == 0) { 1523 /* No more packets to send. */ 1524 goto indicate_inactive; 1525 } 1526 1527 #if NBPFILTER > 0 1528 /* Tap off here if there is a BPF listener. */ 1529 if (ifp->if_bpf) 1530 bpf_mtap(ifp->if_bpf, m); 1531 #endif 1532 1533 /* 1534 * Copy the mbuf chain into the transmission buffer. 1535 * txb_* variables are updated as necessary. 1536 */ 1537 fe_write_mbufs(sc, m); 1538 1539 m_freem(m); 1540 1541 /* Start transmitter if it's idle. */ 1542 if (sc->txb_sched == 0) 1543 fe_xmit(sc); 1544 } 1545 1546 indicate_inactive: 1547 /* 1548 * We are using the !OACTIVE flag to indicate to 1549 * the outside world that we can accept an 1550 * additional packet rather than that the 1551 * transmitter is _actually_ active. Indeed, the 1552 * transmitter may be active, but if we haven't 1553 * filled all the buffers with data then we still 1554 * want to accept more. 1555 */ 1556 ifp->if_flags &= ~IFF_OACTIVE; 1557 return; 1558 1559 indicate_active: 1560 /* 1561 * The transmitter is active, and there are no room for 1562 * more outgoing packets in the transmission buffer. 1563 */ 1564 ifp->if_flags |= IFF_OACTIVE; 1565 return; 1566 } 1567 1568 /* 1569 * Transmission interrupt handler 1570 * The control flow of this function looks silly. FIXME. 1571 */ 1572 void 1573 fe_tint(sc, tstat) 1574 struct fe_softc *sc; 1575 u_char tstat; 1576 { 1577 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1578 int left; 1579 int col; 1580 1581 /* 1582 * Handle "excessive collision" interrupt. 1583 */ 1584 if (tstat & FE_D0_COLL16) { 1585 /* 1586 * Find how many packets (including this collided one) 1587 * are left unsent in transmission buffer. 1588 */ 1589 left = inb(sc->sc_iobase + FE_BMPR10); 1590 1591 #if FE_DEBUG >= 2 1592 log(LOG_WARNING, "%s: excessive collision (%d/%d)\n", 1593 sc->sc_dev.dv_xname, left, sc->txb_sched); 1594 #endif 1595 #if FE_DEBUG >= 3 1596 fe_dump(LOG_INFO, sc); 1597 #endif 1598 1599 /* 1600 * Update statistics. 1601 */ 1602 ifp->if_collisions += 16; 1603 ifp->if_oerrors++; 1604 ifp->if_opackets += sc->txb_sched - left; 1605 1606 /* 1607 * Collision statistics has been updated. 1608 * Clear the collision flag on 86960 now to avoid confusion. 1609 */ 1610 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID); 1611 1612 /* 1613 * Restart transmitter, skipping the 1614 * collided packet. 1615 * 1616 * We *must* skip the packet to keep network running 1617 * properly. Excessive collision error is an 1618 * indication of the network overload. If we 1619 * tried sending the same packet after excessive 1620 * collision, the network would be filled with 1621 * out-of-time packets. Packets belonging 1622 * to reliable transport (such as TCP) are resent 1623 * by some upper layer. 1624 */ 1625 outb(sc->sc_iobase + FE_BMPR11, 1626 FE_B11_CTRL_SKIP | FE_B11_MODE1); 1627 sc->txb_sched = left - 1; 1628 } 1629 1630 /* 1631 * Handle "transmission complete" interrupt. 1632 */ 1633 if (tstat & FE_D0_TXDONE) { 1634 /* 1635 * Add in total number of collisions on last 1636 * transmission. We also clear "collision occurred" flag 1637 * here. 1638 * 1639 * 86960 has a design flow on collision count on multiple 1640 * packet transmission. When we send two or more packets 1641 * with one start command (that's what we do when the 1642 * transmission queue is clauded), 86960 informs us number 1643 * of collisions occured on the last packet on the 1644 * transmission only. Number of collisions on previous 1645 * packets are lost. I have told that the fact is clearly 1646 * stated in the Fujitsu document. 1647 * 1648 * I considered not to mind it seriously. Collision 1649 * count is not so important, anyway. Any comments? FIXME. 1650 */ 1651 1652 if (inb(sc->sc_iobase + FE_DLCR0) & FE_D0_COLLID) { 1653 /* Clear collision flag. */ 1654 outb(sc->sc_iobase + FE_DLCR0, FE_D0_COLLID); 1655 1656 /* Extract collision count from 86960. */ 1657 col = inb(sc->sc_iobase + FE_DLCR4) & FE_D4_COL; 1658 if (col == 0) { 1659 /* 1660 * Status register indicates collisions, 1661 * while the collision count is zero. 1662 * This can happen after multiple packet 1663 * transmission, indicating that one or more 1664 * previous packet(s) had been collided. 1665 * 1666 * Since the accurate number of collisions 1667 * has been lost, we just guess it as 1; 1668 * Am I too optimistic? FIXME. 1669 */ 1670 col = 1; 1671 } else 1672 col >>= FE_D4_COL_SHIFT; 1673 ifp->if_collisions += col; 1674 #if FE_DEBUG >= 4 1675 log(LOG_WARNING, "%s: %d collision%s (%d)\n", 1676 sc->sc_dev.dv_xname, col, col == 1 ? "" : "s", 1677 sc->txb_sched); 1678 #endif 1679 } 1680 1681 /* 1682 * Update total number of successfully 1683 * transmitted packets. 1684 */ 1685 ifp->if_opackets += sc->txb_sched; 1686 sc->txb_sched = 0; 1687 } 1688 1689 if (sc->txb_sched == 0) { 1690 /* 1691 * The transmitter is no more active. 1692 * Reset output active flag and watchdog timer. 1693 */ 1694 ifp->if_flags &= ~IFF_OACTIVE; 1695 ifp->if_timer = 0; 1696 1697 /* 1698 * If more data is ready to transmit in the buffer, start 1699 * transmitting them. Otherwise keep transmitter idle, 1700 * even if more data is queued. This gives receive 1701 * process a slight priority. 1702 */ 1703 if (sc->txb_count > 0) 1704 fe_xmit(sc); 1705 } 1706 } 1707 1708 /* 1709 * Ethernet interface receiver interrupt. 1710 */ 1711 void 1712 fe_rint(sc, rstat) 1713 struct fe_softc *sc; 1714 u_char rstat; 1715 { 1716 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1717 int len; 1718 u_char status; 1719 int i; 1720 1721 /* 1722 * Update statistics if this interrupt is caused by an error. 1723 */ 1724 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | 1725 FE_D1_ALGERR | FE_D1_SRTPKT)) { 1726 #if FE_DEBUG >= 3 1727 log(LOG_WARNING, "%s: receive error: %b\n", 1728 sc->sc_dev.dv_xname, rstat, FE_D1_ERRBITS); 1729 #endif 1730 ifp->if_ierrors++; 1731 } 1732 1733 /* 1734 * MB86960 has a flag indicating "receive queue empty." 1735 * We just loop cheking the flag to pull out all received 1736 * packets. 1737 * 1738 * We limit the number of iterrations to avoid infinite loop. 1739 * It can be caused by a very slow CPU (some broken 1740 * peripheral may insert incredible number of wait cycles) 1741 * or, worse, by a broken MB86960 chip. 1742 */ 1743 for (i = 0; i < FE_MAX_RECV_COUNT; i++) { 1744 /* Stop the iterration if 86960 indicates no packets. */ 1745 if (inb(sc->sc_iobase + FE_DLCR5) & FE_D5_BUFEMP) 1746 break; 1747 1748 /* 1749 * Extract A receive status byte. 1750 * As our 86960 is in 16 bit bus access mode, we have to 1751 * use inw() to get the status byte. The significant 1752 * value is returned in lower 8 bits. 1753 */ 1754 status = (u_char)inw(sc->sc_iobase + FE_BMPR8); 1755 #if FE_DEBUG >= 4 1756 log(LOG_INFO, "%s: receive status = %02x\n", 1757 sc->sc_dev.dv_xname, status); 1758 #endif 1759 1760 /* 1761 * If there was an error, update statistics and drop 1762 * the packet, unless the interface is in promiscuous 1763 * mode. 1764 */ 1765 if ((status & 0xF0) != 0x20) { /* XXXX ? */ 1766 if ((ifp->if_flags & IFF_PROMISC) == 0) { 1767 ifp->if_ierrors++; 1768 fe_droppacket(sc); 1769 continue; 1770 } 1771 } 1772 1773 /* 1774 * Extract the packet length. 1775 * It is a sum of a header (14 bytes) and a payload. 1776 * CRC has been stripped off by the 86960. 1777 */ 1778 len = inw(sc->sc_iobase + FE_BMPR8); 1779 1780 /* 1781 * MB86965 checks the packet length and drop big packet 1782 * before passing it to us. There are no chance we can 1783 * get [crufty] packets. Hence, if the length exceeds 1784 * the specified limit, it means some serious failure, 1785 * such as out-of-sync on receive buffer management. 1786 * 1787 * Is this statement true? FIXME. 1788 */ 1789 if (len > ETHER_MAX_LEN || len < ETHER_HDR_SIZE) { 1790 #if FE_DEBUG >= 2 1791 log(LOG_WARNING, 1792 "%s: received a %s packet? (%u bytes)\n", 1793 sc->sc_dev.dv_xname, 1794 len < ETHER_HDR_SIZE ? "partial" : "big", len); 1795 #endif 1796 ifp->if_ierrors++; 1797 fe_droppacket(sc); 1798 continue; 1799 } 1800 1801 /* 1802 * Check for a short (RUNT) packet. We *do* check 1803 * but do nothing other than print a message. 1804 * Short packets are illegal, but does nothing bad 1805 * if it carries data for upper layer. 1806 */ 1807 #if FE_DEBUG >= 2 1808 if (len < ETHER_MIN_LEN) { 1809 log(LOG_WARNING, 1810 "%s: received a short packet? (%u bytes)\n", 1811 sc->sc_dev.dv_xname, len); 1812 } 1813 #endif 1814 1815 /* 1816 * Go get a packet. 1817 */ 1818 if (!fe_get_packet(sc, len)) { 1819 /* Skip a packet, updating statistics. */ 1820 #if FE_DEBUG >= 2 1821 log(LOG_WARNING, 1822 "%s: out of mbufs; dropping packet (%u bytes)\n", 1823 sc->sc_dev.dv_xname, len); 1824 #endif 1825 ifp->if_ierrors++; 1826 fe_droppacket(sc); 1827 1828 /* 1829 * We stop receiving packets, even if there are 1830 * more in the buffer. We hope we can get more 1831 * mbufs next time. 1832 */ 1833 return; 1834 } 1835 1836 /* Successfully received a packet. Update stat. */ 1837 ifp->if_ipackets++; 1838 } 1839 } 1840 1841 /* 1842 * Ethernet interface interrupt processor 1843 */ 1844 int 1845 feintr(arg) 1846 void *arg; 1847 { 1848 struct fe_softc *sc = arg; 1849 u_char tstat, rstat; 1850 1851 #if FE_DEBUG >= 4 1852 log(LOG_INFO, "%s: feintr()\n", sc->sc_dev.dv_xname); 1853 fe_dump(LOG_INFO, sc); 1854 #endif 1855 1856 /* 1857 * Get interrupt conditions, masking unneeded flags. 1858 */ 1859 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK; 1860 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK; 1861 if (tstat == 0 && rstat == 0) 1862 return (0); 1863 1864 /* 1865 * Loop until there are no more new interrupt conditions. 1866 */ 1867 for (;;) { 1868 /* 1869 * Reset the conditions we are acknowledging. 1870 */ 1871 outb(sc->sc_iobase + FE_DLCR0, tstat); 1872 outb(sc->sc_iobase + FE_DLCR1, rstat); 1873 1874 /* 1875 * Handle transmitter interrupts. Handle these first because 1876 * the receiver will reset the board under some conditions. 1877 */ 1878 if (tstat != 0) 1879 fe_tint(sc, tstat); 1880 1881 /* 1882 * Handle receiver interrupts. 1883 */ 1884 if (rstat != 0) 1885 fe_rint(sc, rstat); 1886 1887 /* 1888 * Update the multicast address filter if it is 1889 * needed and possible. We do it now, because 1890 * we can make sure the transmission buffer is empty, 1891 * and there is a good chance that the receive queue 1892 * is empty. It will minimize the possibility of 1893 * packet lossage. 1894 */ 1895 if (sc->filter_change && 1896 sc->txb_count == 0 && sc->txb_sched == 0) { 1897 fe_loadmar(sc); 1898 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 1899 } 1900 1901 /* 1902 * If it looks like the transmitter can take more data, 1903 * attempt to start output on the interface. This is done 1904 * after handling the receiver interrupt to give the 1905 * receive operation priority. 1906 */ 1907 if ((sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) 1908 fe_start(&sc->sc_arpcom.ac_if); 1909 1910 /* 1911 * Get interrupt conditions, masking unneeded flags. 1912 */ 1913 tstat = inb(sc->sc_iobase + FE_DLCR0) & FE_TMASK; 1914 rstat = inb(sc->sc_iobase + FE_DLCR1) & FE_RMASK; 1915 if (tstat == 0 && rstat == 0) 1916 return (1); 1917 } 1918 } 1919 1920 /* 1921 * Process an ioctl request. This code needs some work - it looks pretty ugly. 1922 */ 1923 int 1924 fe_ioctl(ifp, command, data) 1925 register struct ifnet *ifp; 1926 u_long command; 1927 caddr_t data; 1928 { 1929 struct fe_softc *sc = ifp->if_softc; 1930 register struct ifaddr *ifa = (struct ifaddr *)data; 1931 struct ifreq *ifr = (struct ifreq *)data; 1932 int s, error = 0; 1933 1934 #if FE_DEBUG >= 3 1935 log(LOG_INFO, "%s: ioctl(%x)\n", sc->sc_dev.dv_xname, command); 1936 #endif 1937 1938 s = splnet(); 1939 1940 switch (command) { 1941 1942 case SIOCSIFADDR: 1943 ifp->if_flags |= IFF_UP; 1944 1945 switch (ifa->ifa_addr->sa_family) { 1946 #ifdef INET 1947 case AF_INET: 1948 fe_init(sc); 1949 arp_ifinit(&sc->sc_arpcom, ifa); 1950 break; 1951 #endif 1952 #ifdef NS 1953 case AF_NS: 1954 { 1955 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1956 1957 if (ns_nullhost(*ina)) 1958 ina->x_host = 1959 *(union ns_host *)(sc->sc_arpcom.ac_enaddr); 1960 else 1961 bcopy(ina->x_host.c_host, 1962 sc->sc_arpcom.ac_enaddr, 1963 sizeof(sc->sc_arpcom.ac_enaddr)); 1964 /* Set new address. */ 1965 fe_init(sc); 1966 break; 1967 } 1968 #endif 1969 default: 1970 fe_init(sc); 1971 break; 1972 } 1973 break; 1974 1975 case SIOCSIFFLAGS: 1976 if ((ifp->if_flags & IFF_UP) == 0 && 1977 (ifp->if_flags & IFF_RUNNING) != 0) { 1978 /* 1979 * If interface is marked down and it is running, then 1980 * stop it. 1981 */ 1982 fe_stop(sc); 1983 ifp->if_flags &= ~IFF_RUNNING; 1984 } else if ((ifp->if_flags & IFF_UP) != 0 && 1985 (ifp->if_flags & IFF_RUNNING) == 0) { 1986 /* 1987 * If interface is marked up and it is stopped, then 1988 * start it. 1989 */ 1990 fe_init(sc); 1991 } else { 1992 /* 1993 * Reset the interface to pick up changes in any other 1994 * flags that affect hardware registers. 1995 */ 1996 fe_setmode(sc); 1997 } 1998 #if DEBUG >= 1 1999 /* "ifconfig fe0 debug" to print register dump. */ 2000 if (ifp->if_flags & IFF_DEBUG) { 2001 log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n", sc->sc_dev.dv_xname); 2002 fe_dump(LOG_DEBUG, sc); 2003 } 2004 #endif 2005 break; 2006 2007 case SIOCADDMULTI: 2008 case SIOCDELMULTI: 2009 /* Update our multicast list. */ 2010 error = (command == SIOCADDMULTI) ? 2011 ether_addmulti(ifr, &sc->sc_arpcom) : 2012 ether_delmulti(ifr, &sc->sc_arpcom); 2013 2014 if (error == ENETRESET) { 2015 /* 2016 * Multicast list has changed; set the hardware filter 2017 * accordingly. 2018 */ 2019 fe_setmode(sc); 2020 error = 0; 2021 } 2022 break; 2023 2024 default: 2025 error = EINVAL; 2026 } 2027 2028 splx(s); 2029 return (error); 2030 } 2031 2032 /* 2033 * Retreive packet from receive buffer and send to the next level up via 2034 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 2035 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 2036 */ 2037 int 2038 fe_get_packet(sc, len) 2039 struct fe_softc *sc; 2040 int len; 2041 { 2042 struct ether_header *eh; 2043 struct mbuf *m; 2044 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 2045 2046 /* Allocate a header mbuf. */ 2047 MGETHDR(m, M_DONTWAIT, MT_DATA); 2048 if (m == 0) 2049 return (0); 2050 m->m_pkthdr.rcvif = ifp; 2051 m->m_pkthdr.len = len; 2052 2053 /* The following silliness is to make NFS happy. */ 2054 #define EROUND ((sizeof(struct ether_header) + 3) & ~3) 2055 #define EOFF (EROUND - sizeof(struct ether_header)) 2056 2057 /* 2058 * Our strategy has one more problem. There is a policy on 2059 * mbuf cluster allocation. It says that we must have at 2060 * least MINCLSIZE (208 bytes) to allocate a cluster. For a 2061 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2), 2062 * our code violates the rule... 2063 * On the other hand, the current code is short, simle, 2064 * and fast, however. It does no harmful thing, just waists 2065 * some memory. Any comments? FIXME. 2066 */ 2067 2068 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 2069 if (len > MHLEN - EOFF) { 2070 MCLGET(m, M_DONTWAIT); 2071 if ((m->m_flags & M_EXT) == 0) { 2072 m_freem(m); 2073 return (0); 2074 } 2075 } 2076 2077 /* 2078 * The following assumes there is room for the ether header in the 2079 * header mbuf. 2080 */ 2081 m->m_data += EOFF; 2082 eh = mtod(m, struct ether_header *); 2083 2084 /* Set the length of this packet. */ 2085 m->m_len = len; 2086 2087 /* Get a packet. */ 2088 insw(sc->sc_iobase + FE_BMPR8, m->m_data, (len + 1) >> 1); 2089 2090 #if NBPFILTER > 0 2091 /* 2092 * Check if there's a BPF listener on this interface. If so, hand off 2093 * the raw packet to bpf. 2094 */ 2095 if (ifp->if_bpf) { 2096 bpf_mtap(ifp->if_bpf, m); 2097 2098 /* 2099 * Note that the interface cannot be in promiscuous mode if 2100 * there are no BPF listeners. And if we are in promiscuous 2101 * mode, we have to check if this packet is really ours. 2102 */ 2103 if ((ifp->if_flags & IFF_PROMISC) != 0 && 2104 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 2105 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr, 2106 sizeof(eh->ether_dhost)) != 0) { 2107 m_freem(m); 2108 return (1); 2109 } 2110 } 2111 #endif 2112 2113 /* Fix up data start offset in mbuf to point past ether header. */ 2114 m_adj(m, sizeof(struct ether_header)); 2115 ether_input(ifp, eh, m); 2116 return (1); 2117 } 2118 2119 /* 2120 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 2121 * Returns number of bytes actually written, including length word. 2122 * 2123 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 2124 * Packets shorter than Ethernet minimum are legal, and we pad them 2125 * before sending out. An exception is "partial" packets which are 2126 * shorter than mandatory Ethernet header. 2127 * 2128 * I wrote a code for an experimental "delayed padding" technique. 2129 * When employed, it postpones the padding process for short packets. 2130 * If xmit() occured at the moment, the padding process is omitted, and 2131 * garbages are sent as pad data. If next packet is stored in the 2132 * transmission buffer before xmit(), write_mbuf() pads the previous 2133 * packet before transmitting new packet. This *may* gain the 2134 * system performance (slightly). 2135 */ 2136 void 2137 fe_write_mbufs(sc, m) 2138 struct fe_softc *sc; 2139 struct mbuf *m; 2140 { 2141 int bmpr8 = sc->sc_iobase + FE_BMPR8; 2142 struct mbuf *mp; 2143 u_char *data; 2144 u_short savebyte; /* WARNING: Architecture dependent! */ 2145 int totlen, len, wantbyte; 2146 2147 #if FE_DELAYED_PADDING 2148 /* Do the "delayed padding." */ 2149 len = sc->txb_padding >> 1; 2150 if (len > 0) { 2151 while (--len >= 0) 2152 outw(bmpr8, 0); 2153 sc->txb_padding = 0; 2154 } 2155 #endif 2156 2157 /* We need to use m->m_pkthdr.len, so require the header */ 2158 if ((m->m_flags & M_PKTHDR) == 0) 2159 panic("fe_write_mbufs: no header mbuf"); 2160 2161 #if FE_DEBUG >= 2 2162 /* First, count up the total number of bytes to copy. */ 2163 for (totlen = 0, mp = m; mp != 0; mp = mp->m_next) 2164 totlen += mp->m_len; 2165 /* Check if this matches the one in the packet header. */ 2166 if (totlen != m->m_pkthdr.len) 2167 log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n", 2168 sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len); 2169 #else 2170 /* Just use the length value in the packet header. */ 2171 totlen = m->m_pkthdr.len; 2172 #endif 2173 2174 #if FE_DEBUG >= 1 2175 /* 2176 * Should never send big packets. If such a packet is passed, 2177 * it should be a bug of upper layer. We just ignore it. 2178 * ... Partial (too short) packets, neither. 2179 */ 2180 if (totlen > ETHER_MAX_LEN || totlen < ETHER_HDR_SIZE) { 2181 log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n", 2182 sc->sc_dev.dv_xname, 2183 totlen < ETHER_HDR_SIZE ? "partial" : "big", totlen); 2184 sc->sc_arpcom.ac_if.if_oerrors++; 2185 return; 2186 } 2187 #endif 2188 2189 /* 2190 * Put the length word for this frame. 2191 * Does 86960 accept odd length? -- Yes. 2192 * Do we need to pad the length to minimum size by ourselves? 2193 * -- Generally yes. But for (or will be) the last 2194 * packet in the transmission buffer, we can skip the 2195 * padding process. It may gain performance slightly. FIXME. 2196 */ 2197 outw(bmpr8, max(totlen, ETHER_MIN_LEN)); 2198 2199 /* 2200 * Update buffer status now. 2201 * Truncate the length up to an even number, since we use outw(). 2202 */ 2203 totlen = (totlen + 1) & ~1; 2204 sc->txb_free -= FE_DATA_LEN_LEN + max(totlen, ETHER_MIN_LEN); 2205 sc->txb_count++; 2206 2207 #if FE_DELAYED_PADDING 2208 /* Postpone the packet padding if necessary. */ 2209 if (totlen < ETHER_MIN_LEN) 2210 sc->txb_padding = ETHER_MIN_LEN - totlen; 2211 #endif 2212 2213 /* 2214 * Transfer the data from mbuf chain to the transmission buffer. 2215 * MB86960 seems to require that data be transferred as words, and 2216 * only words. So that we require some extra code to patch 2217 * over odd-length mbufs. 2218 */ 2219 wantbyte = 0; 2220 for (; m != 0; m = m->m_next) { 2221 /* Ignore empty mbuf. */ 2222 len = m->m_len; 2223 if (len == 0) 2224 continue; 2225 2226 /* Find the actual data to send. */ 2227 data = mtod(m, caddr_t); 2228 2229 /* Finish the last byte. */ 2230 if (wantbyte) { 2231 outw(bmpr8, savebyte | (*data << 8)); 2232 data++; 2233 len--; 2234 wantbyte = 0; 2235 } 2236 2237 /* Output contiguous words. */ 2238 if (len > 1) 2239 outsw(bmpr8, data, len >> 1); 2240 2241 /* Save remaining byte, if there is one. */ 2242 if (len & 1) { 2243 data += len & ~1; 2244 savebyte = *data; 2245 wantbyte = 1; 2246 } 2247 } 2248 2249 /* Spit the last byte, if the length is odd. */ 2250 if (wantbyte) 2251 outw(bmpr8, savebyte); 2252 2253 #if ! FE_DELAYED_PADDING 2254 /* 2255 * Pad the packet to the minimum length if necessary. 2256 */ 2257 len = (ETHER_MIN_LEN >> 1) - (totlen >> 1); 2258 while (--len >= 0) 2259 outw(bmpr8, 0); 2260 #endif 2261 } 2262 2263 /* 2264 * Compute the multicast address filter from the 2265 * list of multicast addresses we need to listen to. 2266 */ 2267 void 2268 fe_getmcaf(ac, af) 2269 struct arpcom *ac; 2270 u_char *af; 2271 { 2272 struct ifnet *ifp = &ac->ac_if; 2273 struct ether_multi *enm; 2274 register u_char *cp, c; 2275 register u_long crc; 2276 register int i, len; 2277 struct ether_multistep step; 2278 2279 /* 2280 * Set up multicast address filter by passing all multicast addresses 2281 * through a crc generator, and then using the high order 6 bits as an 2282 * index into the 64 bit logical address filter. The high order bit 2283 * selects the word, while the rest of the bits select the bit within 2284 * the word. 2285 */ 2286 2287 if ((ifp->if_flags & IFF_PROMISC) != 0) 2288 goto allmulti; 2289 2290 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0x00; 2291 ETHER_FIRST_MULTI(step, ac, enm); 2292 while (enm != NULL) { 2293 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 2294 sizeof(enm->enm_addrlo)) != 0) { 2295 /* 2296 * We must listen to a range of multicast addresses. 2297 * For now, just accept all multicasts, rather than 2298 * trying to set only those filter bits needed to match 2299 * the range. (At this time, the only use of address 2300 * ranges is for IP multicast routing, for which the 2301 * range is big enough to require all bits set.) 2302 */ 2303 goto allmulti; 2304 } 2305 2306 cp = enm->enm_addrlo; 2307 crc = 0xffffffff; 2308 for (len = sizeof(enm->enm_addrlo); --len >= 0;) { 2309 c = *cp++; 2310 for (i = 8; --i >= 0;) { 2311 if ((crc & 0x01) ^ (c & 0x01)) { 2312 crc >>= 1; 2313 crc ^= 0xedb88320; 2314 } else 2315 crc >>= 1; 2316 c >>= 1; 2317 } 2318 } 2319 /* Just want the 6 most significant bits. */ 2320 crc >>= 26; 2321 2322 /* Turn on the corresponding bit in the filter. */ 2323 af[crc >> 3] |= 1 << (crc & 7); 2324 2325 ETHER_NEXT_MULTI(step, enm); 2326 } 2327 ifp->if_flags &= ~IFF_ALLMULTI; 2328 return; 2329 2330 allmulti: 2331 ifp->if_flags |= IFF_ALLMULTI; 2332 af[0] = af[1] = af[2] = af[3] = af[4] = af[5] = af[6] = af[7] = 0xff; 2333 } 2334 2335 /* 2336 * Calculate a new "multicast packet filter" and put the 86960 2337 * receiver in appropriate mode. 2338 */ 2339 void 2340 fe_setmode(sc) 2341 struct fe_softc *sc; 2342 { 2343 int flags = sc->sc_arpcom.ac_if.if_flags; 2344 2345 /* 2346 * If the interface is not running, we postpone the update 2347 * process for receive modes and multicast address filter 2348 * until the interface is restarted. It reduces some 2349 * complicated job on maintaining chip states. (Earlier versions 2350 * of this driver had a bug on that point...) 2351 * 2352 * To complete the trick, fe_init() calls fe_setmode() after 2353 * restarting the interface. 2354 */ 2355 if ((flags & IFF_RUNNING) == 0) 2356 return; 2357 2358 /* 2359 * Promiscuous mode is handled separately. 2360 */ 2361 if ((flags & IFF_PROMISC) != 0) { 2362 /* 2363 * Program 86960 to receive all packets on the segment 2364 * including those directed to other stations. 2365 * Multicast filter stored in MARs are ignored 2366 * under this setting, so we don't need to update it. 2367 * 2368 * Promiscuous mode is used solely by BPF, and BPF only 2369 * listens to valid (no error) packets. So, we ignore 2370 * errornous ones even in this mode. 2371 */ 2372 outb(sc->sc_iobase + FE_DLCR5, 2373 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1); 2374 sc->filter_change = 0; 2375 2376 #if FE_DEBUG >= 3 2377 log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname); 2378 #endif 2379 return; 2380 } 2381 2382 /* 2383 * Turn the chip to the normal (non-promiscuous) mode. 2384 */ 2385 outb(sc->sc_iobase + FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1); 2386 2387 /* 2388 * Find the new multicast filter value. 2389 */ 2390 fe_getmcaf(&sc->sc_arpcom, sc->filter); 2391 sc->filter_change = 1; 2392 2393 #if FE_DEBUG >= 3 2394 log(LOG_INFO, 2395 "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n", 2396 sc->sc_dev.dv_xname, 2397 sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3], 2398 sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]); 2399 #endif 2400 2401 /* 2402 * We have to update the multicast filter in the 86960, A.S.A.P. 2403 * 2404 * Note that the DLC (Data Linc Control unit, i.e. transmitter 2405 * and receiver) must be stopped when feeding the filter, and 2406 * DLC trushes all packets in both transmission and receive 2407 * buffers when stopped. 2408 * 2409 * ... Are the above sentenses correct? I have to check the 2410 * manual of the MB86960A. FIXME. 2411 * 2412 * To reduce the packet lossage, we delay the filter update 2413 * process until buffers are empty. 2414 */ 2415 if (sc->txb_sched == 0 && sc->txb_count == 0 && 2416 (inb(sc->sc_iobase + FE_DLCR1) & FE_D1_PKTRDY) == 0) { 2417 /* 2418 * Buffers are (apparently) empty. Load 2419 * the new filter value into MARs now. 2420 */ 2421 fe_loadmar(sc); 2422 } else { 2423 /* 2424 * Buffers are not empty. Mark that we have to update 2425 * the MARs. The new filter will be loaded by feintr() 2426 * later. 2427 */ 2428 #if FE_DEBUG >= 4 2429 log(LOG_INFO, "%s: filter change delayed\n", sc->sc_dev.dv_xname); 2430 #endif 2431 } 2432 } 2433 2434 /* 2435 * Load a new multicast address filter into MARs. 2436 * 2437 * The caller must have splnet'ed befor fe_loadmar. 2438 * This function starts the DLC upon return. So it can be called only 2439 * when the chip is working, i.e., from the driver's point of view, when 2440 * a device is RUNNING. (I mistook the point in previous versions.) 2441 */ 2442 void 2443 fe_loadmar(sc) 2444 struct fe_softc *sc; 2445 { 2446 2447 /* Stop the DLC (transmitter and receiver). */ 2448 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 2449 2450 /* Select register bank 1 for MARs. */ 2451 outb(sc->sc_iobase + FE_DLCR7, 2452 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 2453 2454 /* Copy filter value into the registers. */ 2455 outblk(sc->sc_iobase + FE_MAR8, sc->filter, FE_FILTER_LEN); 2456 2457 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 2458 outb(sc->sc_iobase + FE_DLCR7, 2459 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 2460 2461 /* Restart the DLC. */ 2462 outb(sc->sc_iobase + FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 2463 2464 /* We have just updated the filter. */ 2465 sc->filter_change = 0; 2466 2467 #if FE_DEBUG >= 3 2468 log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname); 2469 #endif 2470 } 2471 2472 #if FE_DEBUG >= 1 2473 void 2474 fe_dump(level, sc) 2475 int level; 2476 struct fe_softc *sc; 2477 { 2478 int iobase = sc->sc_iobase; 2479 u_char save_dlcr7; 2480 2481 save_dlcr7 = inb(iobase + FE_DLCR7); 2482 2483 log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x", 2484 inb(iobase + FE_DLCR0), inb(iobase + FE_DLCR1), 2485 inb(iobase + FE_DLCR2), inb(iobase + FE_DLCR3), 2486 inb(iobase + FE_DLCR4), inb(iobase + FE_DLCR5), 2487 inb(iobase + FE_DLCR6), inb(iobase + FE_DLCR7)); 2488 2489 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR); 2490 log(level, "\t %02x %02x %02x %02x %02x %02x %02x %02x,", 2491 inb(iobase + FE_DLCR8), inb(iobase + FE_DLCR9), 2492 inb(iobase + FE_DLCR10), inb(iobase + FE_DLCR11), 2493 inb(iobase + FE_DLCR12), inb(iobase + FE_DLCR13), 2494 inb(iobase + FE_DLCR14), inb(iobase + FE_DLCR15)); 2495 2496 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR); 2497 log(level, "\tMAR = %02x %02x %02x %02x %02x %02x %02x %02x,", 2498 inb(iobase + FE_MAR8), inb(iobase + FE_MAR9), 2499 inb(iobase + FE_MAR10), inb(iobase + FE_MAR11), 2500 inb(iobase + FE_MAR12), inb(iobase + FE_MAR13), 2501 inb(iobase + FE_MAR14), inb(iobase + FE_MAR15)); 2502 2503 outb(iobase + FE_DLCR7, (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR); 2504 log(level, "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x.", 2505 inb(iobase + FE_BMPR10), inb(iobase + FE_BMPR11), 2506 inb(iobase + FE_BMPR12), inb(iobase + FE_BMPR13), 2507 inb(iobase + FE_BMPR14), inb(iobase + FE_BMPR15), 2508 inb(iobase + FE_BMPR16), inb(iobase + FE_BMPR17), 2509 inb(iobase + FE_BMPR19)); 2510 2511 outb(iobase + FE_DLCR7, save_dlcr7); 2512 } 2513 #endif 2514