1 /* $NetBSD: cs89x0isa.c,v 1.14 2008/04/08 20:08:49 cegger Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* isa DMA routines for cs89x0 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: cs89x0isa.c,v 1.14 2008/04/08 20:08:49 cegger Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/socket.h> 45 #include <sys/device.h> 46 47 #include "rnd.h" 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 56 #include <sys/bus.h> 57 58 #include <dev/isa/isareg.h> 59 #include <dev/isa/isavar.h> 60 #include <dev/isa/isadmavar.h> 61 62 #include <dev/ic/cs89x0reg.h> 63 #include <dev/ic/cs89x0var.h> 64 #include <dev/isa/cs89x0isavar.h> 65 66 #define DMA_STATUS_BITS 0x0007 /* bit masks for checking DMA status */ 67 #define DMA_STATUS_OK 0x0004 68 69 void 70 cs_isa_dma_attach(struct cs_softc *sc) 71 { 72 struct cs_softc_isa *isc = (void *)sc; 73 74 if (isc->sc_drq == ISA_UNKNOWN_DRQ) 75 printf("%s: DMA channel unspecified, not using DMA\n", 76 device_xname(&sc->sc_dev)); 77 else if (isc->sc_drq < 5 || isc->sc_drq > 7) 78 printf("%s: invalid DMA channel, not using DMA\n", 79 device_xname(&sc->sc_dev)); 80 else { 81 bus_size_t maxsize; 82 bus_addr_t dma_addr; 83 84 maxsize = isa_dmamaxsize(isc->sc_ic, isc->sc_drq); 85 if (maxsize < CS8900_DMASIZE) { 86 printf("%s: max DMA size %lu is less than required %d\n", 87 device_xname(&sc->sc_dev), (u_long)maxsize, 88 CS8900_DMASIZE); 89 goto after_dma_block; 90 } 91 92 if (isa_drq_alloc(isc->sc_ic, isc->sc_drq) != 0) { 93 aprint_error_dev(&sc->sc_dev, "unable to reserve drq %d\n", 94 isc->sc_drq); 95 goto after_dma_block; 96 } 97 98 if (isa_dmamap_create(isc->sc_ic, isc->sc_drq, 99 CS8900_DMASIZE, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW) != 0) { 100 aprint_error_dev(&sc->sc_dev, "unable to create ISA DMA map\n"); 101 goto after_dma_block; 102 } 103 if (isa_dmamem_alloc(isc->sc_ic, isc->sc_drq, 104 CS8900_DMASIZE, &dma_addr, BUS_DMA_NOWAIT) != 0) { 105 aprint_error_dev(&sc->sc_dev, "unable to allocate DMA buffer\n"); 106 goto after_dma_block; 107 } 108 if (isa_dmamem_map(isc->sc_ic, isc->sc_drq, dma_addr, 109 CS8900_DMASIZE, (void **)&isc->sc_dmabase, 110 BUS_DMA_NOWAIT | BUS_DMA_COHERENT /* XXX */ ) != 0) { 111 aprint_error_dev(&sc->sc_dev, "unable to map DMA buffer\n"); 112 isa_dmamem_free(isc->sc_ic, isc->sc_drq, dma_addr, 113 CS8900_DMASIZE); 114 goto after_dma_block; 115 } 116 117 isc->sc_dmasize = CS8900_DMASIZE; 118 sc->sc_cfgflags |= CFGFLG_DMA_MODE; 119 isc->sc_dmaaddr = dma_addr; 120 after_dma_block: 121 ; 122 } 123 } 124 125 void cs_isa_dma_chipinit(struct cs_softc *sc) 126 { 127 struct cs_softc_isa *isc = (void *)sc; 128 129 if (sc->sc_cfgflags & CFGFLG_DMA_MODE) { 130 /* 131 * First we program the DMA controller and ensure the memory 132 * buffer is valid. If it isn't then we just go on without 133 * DMA. 134 */ 135 if (isa_dmastart(isc->sc_ic, isc->sc_drq, isc->sc_dmabase, 136 isc->sc_dmasize, NULL, DMAMODE_READ | DMAMODE_LOOPDEMAND, 137 BUS_DMA_NOWAIT)) { 138 /* XXX XXX XXX */ 139 panic("%s: unable to start DMA", device_xname(&sc->sc_dev)); 140 } 141 isc->sc_dmacur = isc->sc_dmabase; 142 143 /* interrupt when a DMA'd frame is received */ 144 CS_WRITE_PACKET_PAGE(sc, PKTPG_RX_CFG, 145 RX_CFG_ALL_IE | RX_CFG_RX_DMA_ONLY); 146 147 /* 148 * set the DMA burst bit so we don't tie up the bus for too 149 * long. 150 */ 151 if (isc->sc_dmasize == 16384) { 152 CS_WRITE_PACKET_PAGE(sc, PKTPG_BUS_CTL, 153 ((CS_READ_PACKET_PAGE(sc, PKTPG_BUS_CTL) & 154 ~BUS_CTL_DMA_SIZE) | BUS_CTL_DMA_BURST)); 155 } else { /* use 64K */ 156 CS_WRITE_PACKET_PAGE(sc, PKTPG_BUS_CTL, 157 CS_READ_PACKET_PAGE(sc, PKTPG_BUS_CTL) | 158 BUS_CTL_DMA_SIZE | BUS_CTL_DMA_BURST); 159 } 160 161 CS_WRITE_PACKET_PAGE(sc, PKTPG_DMA_CHANNEL, isc->sc_drq - 5); 162 } 163 } 164 165 void cs_process_rx_dma(struct cs_softc *sc) 166 { 167 struct cs_softc_isa *isc = (void *)sc; 168 struct ifnet *ifp; 169 u_int16_t num_dma_frames; 170 u_int16_t pkt_length; 171 u_int16_t status; 172 u_int to_copy; 173 char *dma_mem_ptr; 174 struct mbuf *m; 175 u_char *pBuff; 176 int pad; 177 178 /* initialise the pointers */ 179 ifp = &sc->sc_ethercom.ec_if; 180 181 /* Read the number of frames DMAed. */ 182 num_dma_frames = CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 183 num_dma_frames &= (u_int16_t) (0x0fff); 184 185 /* 186 * Loop till number of DMA frames ready to read is zero. After 187 * reading the frame out of memory we must check if any have been 188 * received while we were processing 189 */ 190 while (num_dma_frames != 0) { 191 dma_mem_ptr = isc->sc_dmacur; 192 193 /* 194 * process all of the DMA frames in memory 195 * 196 * This loop relies on the dma_mem_ptr variable being set to the 197 * next frames start address. 198 */ 199 for (; num_dma_frames > 0; num_dma_frames--) { 200 201 /* 202 * Get the length and status of the packet. Only the 203 * status is guaranteed to be at dma_mem_ptr, ie need 204 * to check for wraparound before reading the length 205 */ 206 status = *((u_int16_t *) dma_mem_ptr); 207 dma_mem_ptr += 2; 208 if (dma_mem_ptr > (isc->sc_dmabase + isc->sc_dmasize)) { 209 dma_mem_ptr = isc->sc_dmabase; 210 } 211 pkt_length = *((u_int16_t *) dma_mem_ptr); 212 dma_mem_ptr += 2; 213 214 /* Do some sanity checks on the length and status. */ 215 if ((pkt_length > ETHER_MAX_LEN) || 216 ((status & DMA_STATUS_BITS) != DMA_STATUS_OK)) { 217 /* 218 * the SCO driver kills the adapter in this 219 * situation 220 */ 221 /* 222 * should increment the error count and reset 223 * the DMA operation. 224 */ 225 printf("%s: cs_process_rx_dma: DMA buffer out of sync about to reset\n", 226 device_xname(&sc->sc_dev)); 227 ifp->if_ierrors++; 228 229 /* skip the rest of the DMA buffer */ 230 isa_dmaabort(isc->sc_ic, isc->sc_drq); 231 232 /* now reset the chip and reinitialise */ 233 cs_init(&sc->sc_ethercom.ec_if); 234 return; 235 } 236 /* Check the status of the received packet. */ 237 if (status & RX_EVENT_RX_OK) { 238 /* get a new mbuf */ 239 MGETHDR(m, M_DONTWAIT, MT_DATA); 240 if (m == 0) { 241 printf("%s: cs_process_rx_dma: unable to allocate mbuf\n", 242 device_xname(&sc->sc_dev)); 243 ifp->if_ierrors++; 244 /* 245 * couldn't allocate an mbuf so 246 * things are not good, may as well 247 * drop all the packets I think. 248 */ 249 CS_READ_PACKET_PAGE(sc, 250 PKTPG_DMA_FRAME_COUNT); 251 252 /* now reset DMA operation */ 253 isa_dmaabort(isc->sc_ic, isc->sc_drq); 254 255 /* 256 * now reset the chip and 257 * reinitialise 258 */ 259 cs_init(&sc->sc_ethercom.ec_if); 260 return; 261 } 262 /* 263 * save processing by always using a mbuf 264 * cluster, guaranteed to fit packet 265 */ 266 MCLGET(m, M_DONTWAIT); 267 if ((m->m_flags & M_EXT) == 0) { 268 /* couldn't allocate an mbuf cluster */ 269 printf("%s: cs_process_rx_dma: unable to allocate a cluster\n", 270 device_xname(&sc->sc_dev)); 271 m_freem(m); 272 273 /* skip the frame */ 274 CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 275 isa_dmaabort(isc->sc_ic, isc->sc_drq); 276 277 /* 278 * now reset the chip and 279 * reinitialise 280 */ 281 cs_init(&sc->sc_ethercom.ec_if); 282 return; 283 } 284 m->m_pkthdr.rcvif = ifp; 285 m->m_pkthdr.len = pkt_length; 286 m->m_len = pkt_length; 287 288 /* 289 * align ip header on word boundary for 290 * ipintr 291 */ 292 pad = ALIGN(sizeof(struct ether_header)) - 293 sizeof(struct ether_header); 294 m->m_data += pad; 295 296 /* 297 * set up the buffer pointer to point to the 298 * data area 299 */ 300 pBuff = mtod(m, char *); 301 302 /* 303 * Read the frame into free_pktbuf 304 * The buffer is circular buffer, either 305 * 16K or 64K in length. 306 * 307 * need to check where the end of the buffer 308 * is and go back to the start. 309 */ 310 if ((dma_mem_ptr + pkt_length) < 311 (isc->sc_dmabase + isc->sc_dmasize)) { 312 /* 313 * No wrap around. Copy the frame 314 * header 315 */ 316 memcpy(pBuff, dma_mem_ptr, pkt_length); 317 dma_mem_ptr += pkt_length; 318 } else { 319 to_copy = (u_int) 320 ((isc->sc_dmabase + isc->sc_dmasize) - 321 dma_mem_ptr); 322 323 /* Copy the first half of the frame. */ 324 memcpy(pBuff, dma_mem_ptr, to_copy); 325 pBuff += to_copy; 326 327 /* 328 * Rest of the frame is to be read 329 * from the first byte of the DMA 330 * memory. 331 */ 332 /* 333 * Get the number of bytes leftout in 334 * the frame. 335 */ 336 to_copy = pkt_length - to_copy; 337 338 dma_mem_ptr = isc->sc_dmabase; 339 340 /* Copy rest of the frame. */ 341 memcpy(pBuff, dma_mem_ptr, to_copy); 342 dma_mem_ptr += to_copy; 343 } 344 345 cs_ether_input(sc, m); 346 } 347 /* (status & RX_OK) */ 348 else { 349 /* the frame was not received OK */ 350 /* Increment the input error count */ 351 ifp->if_ierrors++; 352 353 /* 354 * If debugging is enabled then log error 355 * messages if we got any. 356 */ 357 if ((ifp->if_flags & IFF_DEBUG) && 358 status != REG_NUM_RX_EVENT) 359 cs_print_rx_errors(sc, status); 360 } 361 /* 362 * now update the current frame pointer. the 363 * dma_mem_ptr should point to the next packet to be 364 * received, without the alignment considerations. 365 * 366 * The cs8900 pads all frames to start at the next 32bit 367 * aligned addres. hence we need to pad our offset 368 * pointer. 369 */ 370 dma_mem_ptr += 3; 371 dma_mem_ptr = (char *) 372 ((long) dma_mem_ptr & 0xfffffffc); 373 if (dma_mem_ptr < (isc->sc_dmabase + isc->sc_dmasize)) { 374 isc->sc_dmacur = dma_mem_ptr; 375 } else { 376 dma_mem_ptr = isc->sc_dmacur = isc->sc_dmabase; 377 } 378 } /* for all frames */ 379 /* Read the number of frames DMAed again. */ 380 num_dma_frames = CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 381 num_dma_frames &= (u_int16_t) (0x0fff); 382 } /* while there are frames left */ 383 } 384