1 /* $NetBSD: adv_isa.c,v 1.14 2007/10/19 12:00:14 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * Author: Baldassare Dante Profeta <dante@mclink.it> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Device probe and attach routines for the following 38 * Advanced Systems Inc. SCSI controllers: 39 * 40 * Connectivity Products: 41 * ABP510/5150 - Bus-Master ISA (240 CDB) (Footnote 1) 42 * ABP5140 - Bus-Master ISA (16 CDB) (Footnote 1) (Footnote 2) 43 * ABP5142 - Bus-Master ISA with floppy (16 CDB) (Footnote 3) 44 * 45 * Single Channel Products: 46 * ABP542 - Bus-Master ISA with floppy (240 CDB) 47 * ABP842 - Bus-Master VL (240 CDB) 48 * 49 * Dual Channel Products: 50 * ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) 51 * 52 * Footnotes: 53 * 1. This board has been shipped by HP with the 4020i CD-R drive. 54 * The board has no BIOS so it cannot control a boot device, but 55 * it can control any secondary SCSI device. 56 * 2. This board has been sold by SIIG as the i540 SpeedMaster. 57 * 3. This board has been sold by SIIG as the i542 SpeedMaster. 58 */ 59 60 #include <sys/cdefs.h> 61 __KERNEL_RCSID(0, "$NetBSD: adv_isa.c,v 1.14 2007/10/19 12:00:14 ad Exp $"); 62 63 #include <sys/param.h> 64 #include <sys/systm.h> 65 #include <sys/kernel.h> 66 #include <sys/errno.h> 67 #include <sys/ioctl.h> 68 #include <sys/device.h> 69 #include <sys/buf.h> 70 #include <sys/proc.h> 71 #include <sys/user.h> 72 #include <sys/queue.h> 73 74 #include <sys/bus.h> 75 76 #include <dev/scsipi/scsi_all.h> 77 #include <dev/scsipi/scsipi_all.h> 78 #include <dev/scsipi/scsiconf.h> 79 80 #include <dev/isa/isavar.h> 81 82 #include <dev/ic/advlib.h> 83 #include <dev/ic/adv.h> 84 85 86 /* Possible port addresses an ISA or VL adapter can live at */ 87 static int asc_ioport[ASC_IOADR_TABLE_MAX_IX] = 88 { 89 0x100, 90 ASC_IOADR_1, /* First selection in BIOS setup */ 91 0x120, 92 ASC_IOADR_2, /* Second selection in BIOS setup */ 93 0x140, 94 ASC_IOADR_3, /* Third selection in BIOS setup */ 95 ASC_IOADR_4, /* Fourth selection in BIOS setup */ 96 ASC_IOADR_5, /* Fifth selection in BIOS setup */ 97 ASC_IOADR_6, /* Sixth selection in BIOS setup */ 98 ASC_IOADR_7, /* Seventh selection in BIOS setup */ 99 ASC_IOADR_8 /* Eighth and default selection in BIOS setup */ 100 }; 101 102 /******************************************************************************/ 103 104 int adv_isa_probe(struct device *, struct cfdata *, void *); 105 void adv_isa_attach(struct device *, struct device *, void *); 106 107 CFATTACH_DECL(adv_isa, sizeof(ASC_SOFTC), 108 adv_isa_probe, adv_isa_attach, NULL, NULL); 109 110 /******************************************************************************/ 111 112 int 113 adv_isa_probe( struct device *parent, struct cfdata *match, 114 void *aux) 115 { 116 struct isa_attach_args *ia = aux; 117 bus_space_tag_t iot = ia->ia_iot; 118 bus_space_handle_t ioh; 119 int port_index; 120 int iobase, irq, drq; 121 int rv = 0; 122 123 if (ia->ia_nio < 1) 124 return (0); 125 if (ia->ia_nirq < 1) 126 return (0); 127 if (ia->ia_ndrq < 1) 128 return (0); 129 130 if (ISA_DIRECT_CONFIG(ia)) 131 return (0); 132 133 /* 134 * If the I/O address is wildcarded, look for boards 135 * in ascending order. 136 */ 137 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) { 138 for (port_index = 0; port_index < ASC_IOADR_TABLE_MAX_IX; 139 port_index++) { 140 iobase = asc_ioport[port_index]; 141 142 if (iobase) { 143 if (bus_space_map(iot, iobase, ASC_IOADR_GAP, 144 0, &ioh)) 145 continue; 146 147 rv = AscFindSignature(iot, ioh); 148 149 if (rv) { 150 ia->ia_io[0].ir_addr = iobase; 151 break; 152 } 153 154 bus_space_unmap(iot, ioh, ASC_IOADR_GAP); 155 } 156 } 157 if (rv == 0) 158 return (0); 159 } else { 160 iobase = ia->ia_io[0].ir_addr; 161 if (bus_space_map(iot, iobase, ASC_IOADR_GAP, 0, &ioh)) 162 return (0); 163 164 rv = AscFindSignature(iot, ioh); 165 166 if (rv == 0) { 167 bus_space_unmap(iot, ioh, ASC_IOADR_GAP); 168 return (0); 169 } 170 } 171 172 /* XXXJRT Probe routines should not have side-effects!! */ 173 ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); 174 ASC_SET_CHIP_STATUS(iot, ioh, 0); 175 176 irq = AscGetChipIRQ(iot, ioh, ASC_IS_ISA); 177 drq = AscGetIsaDmaChannel(iot, ioh); 178 179 /* Verify that the IRQ/DRQ match (or are wildcarded). */ 180 if (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ && 181 ia->ia_irq[0].ir_irq != irq) { 182 rv = 0; 183 goto out; 184 } 185 if (ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ && 186 ia->ia_drq[0].ir_drq != drq) { 187 rv = 0; 188 goto out; 189 } 190 191 ia->ia_nio = 1; 192 ia->ia_io[0].ir_addr = iobase; 193 ia->ia_io[0].ir_size = ASC_IOADR_GAP; 194 195 ia->ia_nirq = 1; 196 ia->ia_irq[0].ir_irq = irq; 197 198 ia->ia_ndrq = 1; 199 ia->ia_drq[0].ir_drq = drq; 200 201 ia->ia_niomem = 0; 202 203 out: 204 bus_space_unmap(iot, ioh, ASC_IOADR_GAP); 205 return rv; 206 } 207 208 209 void 210 adv_isa_attach(struct device *parent, struct device *self, void *aux) 211 { 212 struct isa_attach_args *ia = aux; 213 ASC_SOFTC *sc = (void *) self; 214 bus_space_tag_t iot = ia->ia_iot; 215 bus_space_handle_t ioh; 216 isa_chipset_tag_t ic = ia->ia_ic; 217 int error; 218 219 printf("\n"); 220 221 sc->sc_flags = 0x0; 222 223 if (bus_space_map(iot, ia->ia_io[0].ir_addr, ASC_IOADR_GAP, 0, &ioh)) { 224 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 225 return; 226 } 227 228 sc->sc_iot = iot; 229 sc->sc_ioh = ioh; 230 sc->sc_dmat = ia->ia_dmat; 231 sc->bus_type = ASC_IS_ISA; 232 sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); 233 /* 234 * Memo: 235 * for EISA cards: 236 * sc->chip_version = (ASC_CHIP_MIN_VER_EISA - 1) + ea->ea_pid[1]; 237 */ 238 239 /* 240 * Initialize the board 241 */ 242 if (adv_init(sc)) { 243 printf("%s: adv_init failed\n", sc->sc_dev.dv_xname); 244 return; 245 } 246 247 if ((error = isa_dmacascade(ic, ia->ia_drq[0].ir_drq)) != 0) { 248 printf("%s: unable to cascade DRQ, error = %d\n", 249 sc->sc_dev.dv_xname, error); 250 return; 251 } 252 253 sc->sc_ih = isa_intr_establish(ic, ia->ia_irq[0].ir_irq, IST_EDGE, 254 IPL_BIO, adv_intr, sc); 255 if (sc->sc_ih == NULL) { 256 printf("%s: couldn't establish interrupt\n", 257 sc->sc_dev.dv_xname); 258 return; 259 } 260 261 adv_attach(sc); 262 } 263