1 /* $NetBSD: tulip.c,v 1.96 2001/07/23 17:20:04 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family, and a variety of clone chips. 43 */ 44 45 #include "bpfilter.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/callout.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_ether.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #endif 70 71 #include <machine/bus.h> 72 #include <machine/intr.h> 73 74 #include <dev/mii/mii.h> 75 #include <dev/mii/miivar.h> 76 #include <dev/mii/mii_bitbang.h> 77 78 #include <dev/ic/tulipreg.h> 79 #include <dev/ic/tulipvar.h> 80 81 const char * const tlp_chip_names[] = TULIP_CHIP_NAMES; 82 83 const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = 84 TLP_TXTHRESH_TAB_10; 85 86 const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = 87 TLP_TXTHRESH_TAB_10_100; 88 89 const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = 90 TLP_TXTHRESH_TAB_WINB; 91 92 const struct tulip_txthresh_tab tlp_dm9102_txthresh_tab[] = 93 TLP_TXTHRESH_TAB_DM9102; 94 95 void tlp_start __P((struct ifnet *)); 96 void tlp_watchdog __P((struct ifnet *)); 97 int tlp_ioctl __P((struct ifnet *, u_long, caddr_t)); 98 int tlp_init __P((struct ifnet *)); 99 void tlp_stop __P((struct ifnet *, int)); 100 101 void tlp_shutdown __P((void *)); 102 103 void tlp_reset __P((struct tulip_softc *)); 104 void tlp_rxdrain __P((struct tulip_softc *)); 105 int tlp_add_rxbuf __P((struct tulip_softc *, int)); 106 void tlp_idle __P((struct tulip_softc *, u_int32_t)); 107 void tlp_srom_idle __P((struct tulip_softc *)); 108 int tlp_srom_size __P((struct tulip_softc *)); 109 110 int tlp_enable __P((struct tulip_softc *)); 111 void tlp_disable __P((struct tulip_softc *)); 112 void tlp_power __P((int, void *)); 113 114 void tlp_filter_setup __P((struct tulip_softc *)); 115 void tlp_winb_filter_setup __P((struct tulip_softc *)); 116 void tlp_al981_filter_setup __P((struct tulip_softc *)); 117 118 void tlp_rxintr __P((struct tulip_softc *)); 119 void tlp_txintr __P((struct tulip_softc *)); 120 121 void tlp_mii_tick __P((void *)); 122 void tlp_mii_statchg __P((struct device *)); 123 void tlp_winb_mii_statchg __P((struct device *)); 124 void tlp_dm9102_mii_statchg __P((struct device *)); 125 126 void tlp_mii_getmedia __P((struct tulip_softc *, struct ifmediareq *)); 127 int tlp_mii_setmedia __P((struct tulip_softc *)); 128 129 int tlp_bitbang_mii_readreg __P((struct device *, int, int)); 130 void tlp_bitbang_mii_writereg __P((struct device *, int, int, int)); 131 132 int tlp_pnic_mii_readreg __P((struct device *, int, int)); 133 void tlp_pnic_mii_writereg __P((struct device *, int, int, int)); 134 135 int tlp_al981_mii_readreg __P((struct device *, int, int)); 136 void tlp_al981_mii_writereg __P((struct device *, int, int, int)); 137 138 void tlp_2114x_preinit __P((struct tulip_softc *)); 139 void tlp_2114x_mii_preinit __P((struct tulip_softc *)); 140 void tlp_pnic_preinit __P((struct tulip_softc *)); 141 void tlp_dm9102_preinit __P((struct tulip_softc *)); 142 143 void tlp_21140_reset __P((struct tulip_softc *)); 144 void tlp_21142_reset __P((struct tulip_softc *)); 145 void tlp_pmac_reset __P((struct tulip_softc *)); 146 void tlp_dm9102_reset __P((struct tulip_softc *)); 147 148 #define tlp_mchash(addr, sz) \ 149 (ether_crc32_le((addr), ETHER_ADDR_LEN) & ((sz) - 1)) 150 151 /* 152 * MII bit-bang glue. 153 */ 154 u_int32_t tlp_sio_mii_bitbang_read __P((struct device *)); 155 void tlp_sio_mii_bitbang_write __P((struct device *, u_int32_t)); 156 157 const struct mii_bitbang_ops tlp_sio_mii_bitbang_ops = { 158 tlp_sio_mii_bitbang_read, 159 tlp_sio_mii_bitbang_write, 160 { 161 MIIROM_MDO, /* MII_BIT_MDO */ 162 MIIROM_MDI, /* MII_BIT_MDI */ 163 MIIROM_MDC, /* MII_BIT_MDC */ 164 0, /* MII_BIT_DIR_HOST_PHY */ 165 MIIROM_MIIDIR, /* MII_BIT_DIR_PHY_HOST */ 166 } 167 }; 168 169 #ifdef TLP_DEBUG 170 #define DPRINTF(sc, x) if ((sc)->sc_ethercom.ec_if.if_flags & IFF_DEBUG) \ 171 printf x 172 #else 173 #define DPRINTF(sc, x) /* nothing */ 174 #endif 175 176 #ifdef TLP_STATS 177 void tlp_print_stats __P((struct tulip_softc *)); 178 #endif 179 180 /* 181 * Can be used to debug the SROM-related things, including contents. 182 * Initialized so that it's patchable. 183 */ 184 int tlp_srom_debug = 0; 185 186 /* 187 * tlp_attach: 188 * 189 * Attach a Tulip interface to the system. 190 */ 191 void 192 tlp_attach(sc, enaddr) 193 struct tulip_softc *sc; 194 const u_int8_t *enaddr; 195 { 196 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 197 int i, error; 198 199 callout_init(&sc->sc_nway_callout); 200 callout_init(&sc->sc_tick_callout); 201 202 /* 203 * NOTE: WE EXPECT THE FRONT-END TO INITIALIZE sc_regshift! 204 */ 205 206 /* 207 * Setup the transmit threshold table. 208 */ 209 switch (sc->sc_chip) { 210 case TULIP_CHIP_DE425: 211 case TULIP_CHIP_21040: 212 case TULIP_CHIP_21041: 213 sc->sc_txth = tlp_10_txthresh_tab; 214 break; 215 216 case TULIP_CHIP_DM9102: 217 case TULIP_CHIP_DM9102A: 218 sc->sc_txth = tlp_dm9102_txthresh_tab; 219 break; 220 221 default: 222 sc->sc_txth = tlp_10_100_txthresh_tab; 223 break; 224 } 225 226 /* 227 * Setup the filter setup function. 228 */ 229 switch (sc->sc_chip) { 230 case TULIP_CHIP_WB89C840F: 231 sc->sc_filter_setup = tlp_winb_filter_setup; 232 break; 233 234 case TULIP_CHIP_AL981: 235 case TULIP_CHIP_AN983: 236 case TULIP_CHIP_AN985: 237 sc->sc_filter_setup = tlp_al981_filter_setup; 238 break; 239 240 default: 241 sc->sc_filter_setup = tlp_filter_setup; 242 break; 243 } 244 245 /* 246 * Set up the media status change function. 247 */ 248 switch (sc->sc_chip) { 249 case TULIP_CHIP_WB89C840F: 250 sc->sc_statchg = tlp_winb_mii_statchg; 251 break; 252 253 case TULIP_CHIP_DM9102: 254 case TULIP_CHIP_DM9102A: 255 sc->sc_statchg = tlp_dm9102_mii_statchg; 256 break; 257 258 default: 259 /* 260 * We may override this if we have special media 261 * handling requirements (e.g. flipping GPIO pins). 262 * 263 * The pure-MII statchg function covers the basics. 264 */ 265 sc->sc_statchg = tlp_mii_statchg; 266 break; 267 } 268 269 /* 270 * Default to no FS|LS in setup packet descriptors. They're 271 * supposed to be zero according to the 21040 and 21143 272 * manuals, and some chips fall over badly if they're 273 * included. Yet, other chips seem to require them. Sigh. 274 */ 275 switch (sc->sc_chip) { 276 case TULIP_CHIP_X3201_3: 277 sc->sc_setup_fsls = TDCTL_Tx_FS|TDCTL_Tx_LS; 278 break; 279 280 default: 281 sc->sc_setup_fsls = 0; 282 } 283 284 /* 285 * Set up various chip-specific quirks. 286 * 287 * Note that wherever we can, we use the "ring" option for 288 * transmit and receive descriptors. This is because some 289 * clone chips apparently have problems when using chaining, 290 * although some *only* support chaining. 291 * 292 * What we do is always program the "next" pointer, and then 293 * conditionally set the TDCTL_CH and TDCTL_ER bits in the 294 * appropriate places. 295 */ 296 switch (sc->sc_chip) { 297 case TULIP_CHIP_21140: 298 case TULIP_CHIP_21140A: 299 case TULIP_CHIP_21142: 300 case TULIP_CHIP_21143: 301 case TULIP_CHIP_82C115: /* 21143-like */ 302 case TULIP_CHIP_MX98713: /* 21140-like */ 303 case TULIP_CHIP_MX98713A: /* 21143-like */ 304 case TULIP_CHIP_MX98715: /* 21143-like */ 305 case TULIP_CHIP_MX98715A: /* 21143-like */ 306 case TULIP_CHIP_MX98715AEC_X: /* 21143-like */ 307 case TULIP_CHIP_MX98725: /* 21143-like */ 308 /* 309 * Run these chips in ring mode. 310 */ 311 sc->sc_tdctl_ch = 0; 312 sc->sc_tdctl_er = TDCTL_ER; 313 sc->sc_preinit = tlp_2114x_preinit; 314 break; 315 316 case TULIP_CHIP_82C168: 317 case TULIP_CHIP_82C169: 318 /* 319 * Run these chips in ring mode. 320 */ 321 sc->sc_tdctl_ch = 0; 322 sc->sc_tdctl_er = TDCTL_ER; 323 sc->sc_preinit = tlp_pnic_preinit; 324 325 /* 326 * These chips seem to have busted DMA engines; just put them 327 * in Store-and-Forward mode from the get-go. 328 */ 329 sc->sc_txthresh = TXTH_SF; 330 break; 331 332 case TULIP_CHIP_WB89C840F: 333 /* 334 * Run this chip in chained mode. 335 */ 336 sc->sc_tdctl_ch = TDCTL_CH; 337 sc->sc_tdctl_er = 0; 338 sc->sc_flags |= TULIPF_IC_FS; 339 break; 340 341 case TULIP_CHIP_DM9102: 342 case TULIP_CHIP_DM9102A: 343 /* 344 * Run these chips in chained mode. 345 */ 346 sc->sc_tdctl_ch = TDCTL_CH; 347 sc->sc_tdctl_er = 0; 348 sc->sc_preinit = tlp_dm9102_preinit; 349 350 /* 351 * These chips have a broken bus interface, so we 352 * can't use any optimized bus commands. For this 353 * reason, we tend to underrun pretty quickly, so 354 * just to Store-and-Forward mode from the get-go. 355 */ 356 sc->sc_txthresh = TXTH_DM9102_SF; 357 break; 358 359 default: 360 /* 361 * Default to running in ring mode. 362 */ 363 sc->sc_tdctl_ch = 0; 364 sc->sc_tdctl_er = TDCTL_ER; 365 } 366 367 /* 368 * Set up the MII bit-bang operations. 369 */ 370 switch (sc->sc_chip) { 371 case TULIP_CHIP_WB89C840F: /* XXX direction bit different? */ 372 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 373 break; 374 375 default: 376 sc->sc_bitbang_ops = &tlp_sio_mii_bitbang_ops; 377 } 378 379 SIMPLEQ_INIT(&sc->sc_txfreeq); 380 SIMPLEQ_INIT(&sc->sc_txdirtyq); 381 382 /* 383 * Allocate the control data structures, and create and load the 384 * DMA map for it. 385 */ 386 if ((error = bus_dmamem_alloc(sc->sc_dmat, 387 sizeof(struct tulip_control_data), PAGE_SIZE, 0, &sc->sc_cdseg, 388 1, &sc->sc_cdnseg, 0)) != 0) { 389 printf("%s: unable to allocate control data, error = %d\n", 390 sc->sc_dev.dv_xname, error); 391 goto fail_0; 392 } 393 394 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg, 395 sizeof(struct tulip_control_data), (caddr_t *)&sc->sc_control_data, 396 BUS_DMA_COHERENT)) != 0) { 397 printf("%s: unable to map control data, error = %d\n", 398 sc->sc_dev.dv_xname, error); 399 goto fail_1; 400 } 401 402 if ((error = bus_dmamap_create(sc->sc_dmat, 403 sizeof(struct tulip_control_data), 1, 404 sizeof(struct tulip_control_data), 0, 0, &sc->sc_cddmamap)) != 0) { 405 printf("%s: unable to create control data DMA map, " 406 "error = %d\n", sc->sc_dev.dv_xname, error); 407 goto fail_2; 408 } 409 410 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap, 411 sc->sc_control_data, sizeof(struct tulip_control_data), NULL, 412 0)) != 0) { 413 printf("%s: unable to load control data DMA map, error = %d\n", 414 sc->sc_dev.dv_xname, error); 415 goto fail_3; 416 } 417 418 /* 419 * Create the transmit buffer DMA maps. 420 * 421 * Note that on the Xircom clone, transmit buffers must be 422 * 4-byte aligned. We're almost guaranteed to have to copy 423 * the packet in that case, so we just limit ourselves to 424 * one segment. 425 * 426 * On the DM9102, the transmit logic can only handle one 427 * DMA segment. 428 */ 429 switch (sc->sc_chip) { 430 case TULIP_CHIP_X3201_3: 431 case TULIP_CHIP_DM9102: 432 case TULIP_CHIP_DM9102A: 433 sc->sc_ntxsegs = 1; 434 break; 435 436 default: 437 sc->sc_ntxsegs = TULIP_NTXSEGS; 438 } 439 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 440 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 441 sc->sc_ntxsegs, MCLBYTES, 0, 0, 442 &sc->sc_txsoft[i].txs_dmamap)) != 0) { 443 printf("%s: unable to create tx DMA map %d, " 444 "error = %d\n", sc->sc_dev.dv_xname, i, error); 445 goto fail_4; 446 } 447 } 448 449 /* 450 * Create the receive buffer DMA maps. 451 */ 452 for (i = 0; i < TULIP_NRXDESC; i++) { 453 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 454 MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) { 455 printf("%s: unable to create rx DMA map %d, " 456 "error = %d\n", sc->sc_dev.dv_xname, i, error); 457 goto fail_5; 458 } 459 sc->sc_rxsoft[i].rxs_mbuf = NULL; 460 } 461 462 /* 463 * From this point forward, the attachment cannot fail. A failure 464 * before this point releases all resources that may have been 465 * allocated. 466 */ 467 sc->sc_flags |= TULIPF_ATTACHED; 468 469 /* 470 * Reset the chip to a known state. 471 */ 472 tlp_reset(sc); 473 474 /* Announce ourselves. */ 475 printf("%s: %s%sEthernet address %s\n", sc->sc_dev.dv_xname, 476 sc->sc_name[0] != '\0' ? sc->sc_name : "", 477 sc->sc_name[0] != '\0' ? ", " : "", 478 ether_sprintf(enaddr)); 479 480 /* 481 * Initialize our media structures. This may probe the MII, if 482 * present. 483 */ 484 (*sc->sc_mediasw->tmsw_init)(sc); 485 486 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 487 ifp->if_softc = sc; 488 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 489 ifp->if_ioctl = tlp_ioctl; 490 ifp->if_start = tlp_start; 491 ifp->if_watchdog = tlp_watchdog; 492 ifp->if_init = tlp_init; 493 ifp->if_stop = tlp_stop; 494 IFQ_SET_READY(&ifp->if_snd); 495 496 /* 497 * We can support 802.1Q VLAN-sized frames. 498 */ 499 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 500 501 /* 502 * Attach the interface. 503 */ 504 if_attach(ifp); 505 ether_ifattach(ifp, enaddr); 506 #if NRND > 0 507 rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname, 508 RND_TYPE_NET, 0); 509 #endif 510 511 /* 512 * Make sure the interface is shutdown during reboot. 513 */ 514 sc->sc_sdhook = shutdownhook_establish(tlp_shutdown, sc); 515 if (sc->sc_sdhook == NULL) 516 printf("%s: WARNING: unable to establish shutdown hook\n", 517 sc->sc_dev.dv_xname); 518 519 /* 520 * Add a suspend hook to make sure we come back up after a 521 * resume. 522 */ 523 sc->sc_powerhook = powerhook_establish(tlp_power, sc); 524 if (sc->sc_powerhook == NULL) 525 printf("%s: WARNING: unable to establish power hook\n", 526 sc->sc_dev.dv_xname); 527 return; 528 529 /* 530 * Free any resources we've allocated during the failed attach 531 * attempt. Do this in reverse order and fall through. 532 */ 533 fail_5: 534 for (i = 0; i < TULIP_NRXDESC; i++) { 535 if (sc->sc_rxsoft[i].rxs_dmamap != NULL) 536 bus_dmamap_destroy(sc->sc_dmat, 537 sc->sc_rxsoft[i].rxs_dmamap); 538 } 539 fail_4: 540 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 541 if (sc->sc_txsoft[i].txs_dmamap != NULL) 542 bus_dmamap_destroy(sc->sc_dmat, 543 sc->sc_txsoft[i].txs_dmamap); 544 } 545 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 546 fail_3: 547 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 548 fail_2: 549 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 550 sizeof(struct tulip_control_data)); 551 fail_1: 552 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 553 fail_0: 554 return; 555 } 556 557 /* 558 * tlp_activate: 559 * 560 * Handle device activation/deactivation requests. 561 */ 562 int 563 tlp_activate(self, act) 564 struct device *self; 565 enum devact act; 566 { 567 struct tulip_softc *sc = (void *) self; 568 int s, error = 0; 569 570 s = splnet(); 571 switch (act) { 572 case DVACT_ACTIVATE: 573 error = EOPNOTSUPP; 574 break; 575 576 case DVACT_DEACTIVATE: 577 if (sc->sc_flags & TULIPF_HAS_MII) 578 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 579 MII_OFFSET_ANY); 580 if_deactivate(&sc->sc_ethercom.ec_if); 581 break; 582 } 583 splx(s); 584 585 return (error); 586 } 587 588 /* 589 * tlp_detach: 590 * 591 * Detach a Tulip interface. 592 */ 593 int 594 tlp_detach(sc) 595 struct tulip_softc *sc; 596 { 597 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 598 struct tulip_rxsoft *rxs; 599 struct tulip_txsoft *txs; 600 int i; 601 602 /* 603 * Suceed now if there isn't any work to do. 604 */ 605 if ((sc->sc_flags & TULIPF_ATTACHED) == 0) 606 return (0); 607 608 /* Unhook our tick handler. */ 609 if (sc->sc_tick) 610 callout_stop(&sc->sc_tick_callout); 611 612 if (sc->sc_flags & TULIPF_HAS_MII) { 613 /* Detach all PHYs */ 614 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 615 } 616 617 /* Delete all remaining media. */ 618 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 619 620 #if NRND > 0 621 rnd_detach_source(&sc->sc_rnd_source); 622 #endif 623 ether_ifdetach(ifp); 624 if_detach(ifp); 625 626 for (i = 0; i < TULIP_NRXDESC; i++) { 627 rxs = &sc->sc_rxsoft[i]; 628 if (rxs->rxs_mbuf != NULL) { 629 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 630 m_freem(rxs->rxs_mbuf); 631 rxs->rxs_mbuf = NULL; 632 } 633 bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap); 634 } 635 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 636 txs = &sc->sc_txsoft[i]; 637 if (txs->txs_mbuf != NULL) { 638 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 639 m_freem(txs->txs_mbuf); 640 txs->txs_mbuf = NULL; 641 } 642 bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap); 643 } 644 bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap); 645 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap); 646 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data, 647 sizeof(struct tulip_control_data)); 648 bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg); 649 650 shutdownhook_disestablish(sc->sc_sdhook); 651 powerhook_disestablish(sc->sc_powerhook); 652 653 if (sc->sc_srom) 654 free(sc->sc_srom, M_DEVBUF); 655 656 return (0); 657 } 658 659 /* 660 * tlp_shutdown: 661 * 662 * Make sure the interface is stopped at reboot time. 663 */ 664 void 665 tlp_shutdown(arg) 666 void *arg; 667 { 668 struct tulip_softc *sc = arg; 669 670 tlp_stop(&sc->sc_ethercom.ec_if, 1); 671 } 672 673 /* 674 * tlp_start: [ifnet interface function] 675 * 676 * Start packet transmission on the interface. 677 */ 678 void 679 tlp_start(ifp) 680 struct ifnet *ifp; 681 { 682 struct tulip_softc *sc = ifp->if_softc; 683 struct mbuf *m0, *m; 684 struct tulip_txsoft *txs, *last_txs; 685 bus_dmamap_t dmamap; 686 int error, firsttx, nexttx, lasttx, ofree, seg; 687 688 DPRINTF(sc, ("%s: tlp_start: sc_flags 0x%08x, if_flags 0x%08x\n", 689 sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags)); 690 691 /* 692 * If we want a filter setup, it means no more descriptors were 693 * available for the setup routine. Let it get a chance to wedge 694 * itself into the ring. 695 */ 696 if (sc->sc_flags & TULIPF_WANT_SETUP) 697 ifp->if_flags |= IFF_OACTIVE; 698 699 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 700 return; 701 702 /* 703 * Remember the previous number of free descriptors and 704 * the first descriptor we'll use. 705 */ 706 ofree = sc->sc_txfree; 707 firsttx = sc->sc_txnext; 708 709 DPRINTF(sc, ("%s: tlp_start: txfree %d, txnext %d\n", 710 sc->sc_dev.dv_xname, ofree, firsttx)); 711 712 /* 713 * Loop through the send queue, setting up transmit descriptors 714 * until we drain the queue, or use up all available transmit 715 * descriptors. 716 */ 717 while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL && 718 sc->sc_txfree != 0) { 719 /* 720 * Grab a packet off the queue. 721 */ 722 IFQ_POLL(&ifp->if_snd, m0); 723 if (m0 == NULL) 724 break; 725 m = NULL; 726 727 dmamap = txs->txs_dmamap; 728 729 /* 730 * Load the DMA map. If this fails, the packet either 731 * didn't fit in the alloted number of segments, or we were 732 * short on resources. In this case, we'll copy and try 733 * again. 734 * 735 * Note that if we're only allowed 1 Tx segment, we 736 * have an alignment restriction. Do this test before 737 * attempting to load the DMA map, because it's more 738 * likely we'll trip the alignment test than the 739 * more-than-one-segment test. 740 */ 741 if ((sc->sc_ntxsegs == 1 && (mtod(m0, bus_addr_t) & 3) != 0) || 742 bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0, 743 BUS_DMA_WRITE|BUS_DMA_NOWAIT) != 0) { 744 MGETHDR(m, M_DONTWAIT, MT_DATA); 745 if (m == NULL) { 746 printf("%s: unable to allocate Tx mbuf\n", 747 sc->sc_dev.dv_xname); 748 break; 749 } 750 if (m0->m_pkthdr.len > MHLEN) { 751 MCLGET(m, M_DONTWAIT); 752 if ((m->m_flags & M_EXT) == 0) { 753 printf("%s: unable to allocate Tx " 754 "cluster\n", sc->sc_dev.dv_xname); 755 m_freem(m); 756 break; 757 } 758 } 759 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 760 m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len; 761 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 762 m, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 763 if (error) { 764 printf("%s: unable to load Tx buffer, " 765 "error = %d\n", sc->sc_dev.dv_xname, error); 766 break; 767 } 768 } 769 770 /* 771 * Ensure we have enough descriptors free to describe 772 * the packet. 773 */ 774 if (dmamap->dm_nsegs > sc->sc_txfree) { 775 /* 776 * Not enough free descriptors to transmit this 777 * packet. We haven't committed to anything yet, 778 * so just unload the DMA map, put the packet 779 * back on the queue, and punt. Notify the upper 780 * layer that there are no more slots left. 781 * 782 * XXX We could allocate an mbuf and copy, but 783 * XXX it is worth it? 784 */ 785 ifp->if_flags |= IFF_OACTIVE; 786 bus_dmamap_unload(sc->sc_dmat, dmamap); 787 if (m != NULL) 788 m_freem(m); 789 break; 790 } 791 792 IFQ_DEQUEUE(&ifp->if_snd, m0); 793 if (m != NULL) { 794 m_freem(m0); 795 m0 = m; 796 } 797 798 /* 799 * WE ARE NOW COMMITTED TO TRANSMITTING THE PACKET. 800 */ 801 802 /* Sync the DMA map. */ 803 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 804 BUS_DMASYNC_PREWRITE); 805 806 /* 807 * Initialize the transmit descriptors. 808 */ 809 for (nexttx = sc->sc_txnext, seg = 0; 810 seg < dmamap->dm_nsegs; 811 seg++, nexttx = TULIP_NEXTTX(nexttx)) { 812 /* 813 * If this is the first descriptor we're 814 * enqueueing, don't set the OWN bit just 815 * yet. That could cause a race condition. 816 * We'll do it below. 817 */ 818 sc->sc_txdescs[nexttx].td_status = 819 (nexttx == firsttx) ? 0 : htole32(TDSTAT_OWN); 820 sc->sc_txdescs[nexttx].td_bufaddr1 = 821 htole32(dmamap->dm_segs[seg].ds_addr); 822 sc->sc_txdescs[nexttx].td_ctl = 823 htole32((dmamap->dm_segs[seg].ds_len << 824 TDCTL_SIZE1_SHIFT) | sc->sc_tdctl_ch | 825 (nexttx == (TULIP_NTXDESC - 1) ? 826 sc->sc_tdctl_er : 0)); 827 lasttx = nexttx; 828 } 829 830 /* Set `first segment' and `last segment' appropriately. */ 831 sc->sc_txdescs[sc->sc_txnext].td_ctl |= htole32(TDCTL_Tx_FS); 832 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_LS); 833 834 #ifdef TLP_DEBUG 835 if (ifp->if_flags & IFF_DEBUG) { 836 printf(" txsoft %p transmit chain:\n", txs); 837 for (seg = sc->sc_txnext;; seg = TULIP_NEXTTX(seg)) { 838 printf(" descriptor %d:\n", seg); 839 printf(" td_status: 0x%08x\n", 840 le32toh(sc->sc_txdescs[seg].td_status)); 841 printf(" td_ctl: 0x%08x\n", 842 le32toh(sc->sc_txdescs[seg].td_ctl)); 843 printf(" td_bufaddr1: 0x%08x\n", 844 le32toh(sc->sc_txdescs[seg].td_bufaddr1)); 845 printf(" td_bufaddr2: 0x%08x\n", 846 le32toh(sc->sc_txdescs[seg].td_bufaddr2)); 847 if (seg == lasttx) 848 break; 849 } 850 } 851 #endif 852 853 /* Sync the descriptors we're using. */ 854 TULIP_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs, 855 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 856 857 /* 858 * Store a pointer to the packet so we can free it later, 859 * and remember what txdirty will be once the packet is 860 * done. 861 */ 862 txs->txs_mbuf = m0; 863 txs->txs_firstdesc = sc->sc_txnext; 864 txs->txs_lastdesc = lasttx; 865 txs->txs_ndescs = dmamap->dm_nsegs; 866 867 /* Advance the tx pointer. */ 868 sc->sc_txfree -= dmamap->dm_nsegs; 869 sc->sc_txnext = nexttx; 870 871 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 872 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 873 874 last_txs = txs; 875 876 #if NBPFILTER > 0 877 /* 878 * Pass the packet to any BPF listeners. 879 */ 880 if (ifp->if_bpf) 881 bpf_mtap(ifp->if_bpf, m0); 882 #endif /* NBPFILTER > 0 */ 883 } 884 885 if (txs == NULL || sc->sc_txfree == 0) { 886 /* No more slots left; notify upper layer. */ 887 ifp->if_flags |= IFF_OACTIVE; 888 } 889 890 if (sc->sc_txfree != ofree) { 891 DPRINTF(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n", 892 sc->sc_dev.dv_xname, lasttx, firsttx)); 893 /* 894 * Cause a transmit interrupt to happen on the 895 * last packet we enqueued. 896 */ 897 sc->sc_txdescs[lasttx].td_ctl |= htole32(TDCTL_Tx_IC); 898 TULIP_CDTXSYNC(sc, lasttx, 1, 899 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 900 901 /* 902 * Some clone chips want IC on the *first* segment in 903 * the packet. Appease them. 904 */ 905 if ((sc->sc_flags & TULIPF_IC_FS) != 0 && 906 last_txs->txs_firstdesc != lasttx) { 907 sc->sc_txdescs[last_txs->txs_firstdesc].td_ctl |= 908 htole32(TDCTL_Tx_IC); 909 TULIP_CDTXSYNC(sc, last_txs->txs_firstdesc, 1, 910 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 911 } 912 913 /* 914 * The entire packet chain is set up. Give the 915 * first descriptor to the chip now. 916 */ 917 sc->sc_txdescs[firsttx].td_status |= htole32(TDSTAT_OWN); 918 TULIP_CDTXSYNC(sc, firsttx, 1, 919 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 920 921 /* Wake up the transmitter. */ 922 /* XXX USE AUTOPOLLING? */ 923 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 924 925 /* Set a watchdog timer in case the chip flakes out. */ 926 ifp->if_timer = 5; 927 } 928 } 929 930 /* 931 * tlp_watchdog: [ifnet interface function] 932 * 933 * Watchdog timer handler. 934 */ 935 void 936 tlp_watchdog(ifp) 937 struct ifnet *ifp; 938 { 939 struct tulip_softc *sc = ifp->if_softc; 940 int doing_setup, doing_transmit; 941 942 doing_setup = (sc->sc_flags & TULIPF_DOING_SETUP); 943 doing_transmit = (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL); 944 945 if (doing_setup && doing_transmit) { 946 printf("%s: filter setup and transmit timeout\n", 947 sc->sc_dev.dv_xname); 948 ifp->if_oerrors++; 949 } else if (doing_transmit) { 950 printf("%s: transmit timeout\n", sc->sc_dev.dv_xname); 951 ifp->if_oerrors++; 952 } else if (doing_setup) 953 printf("%s: filter setup timeout\n", sc->sc_dev.dv_xname); 954 else 955 printf("%s: spurious watchdog timeout\n", sc->sc_dev.dv_xname); 956 957 (void) tlp_init(ifp); 958 959 /* Try to get more packets going. */ 960 tlp_start(ifp); 961 } 962 963 /* 964 * tlp_ioctl: [ifnet interface function] 965 * 966 * Handle control requests from the operator. 967 */ 968 int 969 tlp_ioctl(ifp, cmd, data) 970 struct ifnet *ifp; 971 u_long cmd; 972 caddr_t data; 973 { 974 struct tulip_softc *sc = ifp->if_softc; 975 struct ifreq *ifr = (struct ifreq *)data; 976 int s, error; 977 978 s = splnet(); 979 980 switch (cmd) { 981 case SIOCSIFMEDIA: 982 case SIOCGIFMEDIA: 983 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 984 break; 985 986 default: 987 error = ether_ioctl(ifp, cmd, data); 988 if (error == ENETRESET) { 989 if (TULIP_IS_ENABLED(sc)) { 990 /* 991 * Multicast list has changed. Set the 992 * hardware filter accordingly. 993 */ 994 (*sc->sc_filter_setup)(sc); 995 } 996 error = 0; 997 } 998 break; 999 } 1000 1001 /* Try to get more packets going. */ 1002 if (TULIP_IS_ENABLED(sc)) 1003 tlp_start(ifp); 1004 1005 splx(s); 1006 return (error); 1007 } 1008 1009 /* 1010 * tlp_intr: 1011 * 1012 * Interrupt service routine. 1013 */ 1014 int 1015 tlp_intr(arg) 1016 void *arg; 1017 { 1018 struct tulip_softc *sc = arg; 1019 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1020 u_int32_t status, rxstatus, txstatus; 1021 int handled = 0, txthresh; 1022 1023 DPRINTF(sc, ("%s: tlp_intr\n", sc->sc_dev.dv_xname)); 1024 1025 #ifdef DEBUG 1026 if (TULIP_IS_ENABLED(sc) == 0) 1027 panic("%s: tlp_intr: not enabled\n", sc->sc_dev.dv_xname); 1028 #endif 1029 1030 /* 1031 * If the interface isn't running, the interrupt couldn't 1032 * possibly have come from us. 1033 */ 1034 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1035 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1036 return (0); 1037 1038 /* Disable interrupts on the DM9102 (interrupt edge bug). */ 1039 switch (sc->sc_chip) { 1040 case TULIP_CHIP_DM9102: 1041 case TULIP_CHIP_DM9102A: 1042 TULIP_WRITE(sc, CSR_INTEN, 0); 1043 break; 1044 1045 default: 1046 /* Nothing. */ 1047 break; 1048 } 1049 1050 for (;;) { 1051 status = TULIP_READ(sc, CSR_STATUS); 1052 if (status) 1053 TULIP_WRITE(sc, CSR_STATUS, status); 1054 1055 if ((status & sc->sc_inten) == 0) 1056 break; 1057 1058 handled = 1; 1059 1060 rxstatus = status & sc->sc_rxint_mask; 1061 txstatus = status & sc->sc_txint_mask; 1062 1063 if (rxstatus) { 1064 /* Grab new any new packets. */ 1065 tlp_rxintr(sc); 1066 1067 if (rxstatus & STATUS_RWT) 1068 printf("%s: receive watchdog timeout\n", 1069 sc->sc_dev.dv_xname); 1070 1071 if (rxstatus & STATUS_RU) { 1072 printf("%s: receive ring overrun\n", 1073 sc->sc_dev.dv_xname); 1074 /* Get the receive process going again. */ 1075 if (sc->sc_tdctl_er != TDCTL_ER) { 1076 tlp_idle(sc, OPMODE_SR); 1077 TULIP_WRITE(sc, CSR_RXLIST, 1078 TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1079 TULIP_WRITE(sc, CSR_OPMODE, 1080 sc->sc_opmode); 1081 } 1082 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1083 break; 1084 } 1085 } 1086 1087 if (txstatus) { 1088 /* Sweep up transmit descriptors. */ 1089 tlp_txintr(sc); 1090 1091 if (txstatus & STATUS_TJT) 1092 printf("%s: transmit jabber timeout\n", 1093 sc->sc_dev.dv_xname); 1094 1095 if (txstatus & STATUS_UNF) { 1096 /* 1097 * Increase our transmit threshold if 1098 * another is available. 1099 */ 1100 txthresh = sc->sc_txthresh + 1; 1101 if (sc->sc_txth[txthresh].txth_name != NULL) { 1102 /* Idle the transmit process. */ 1103 tlp_idle(sc, OPMODE_ST); 1104 1105 sc->sc_txthresh = txthresh; 1106 sc->sc_opmode &= ~(OPMODE_TR|OPMODE_SF); 1107 sc->sc_opmode |= 1108 sc->sc_txth[txthresh].txth_opmode; 1109 printf("%s: transmit underrun; new " 1110 "threshold: %s\n", 1111 sc->sc_dev.dv_xname, 1112 sc->sc_txth[txthresh].txth_name); 1113 1114 /* 1115 * Set the new threshold and restart 1116 * the transmit process. 1117 */ 1118 TULIP_WRITE(sc, CSR_OPMODE, 1119 sc->sc_opmode); 1120 } 1121 /* 1122 * XXX Log every Nth underrun from 1123 * XXX now on? 1124 */ 1125 } 1126 } 1127 1128 if (status & (STATUS_TPS|STATUS_RPS)) { 1129 if (status & STATUS_TPS) 1130 printf("%s: transmit process stopped\n", 1131 sc->sc_dev.dv_xname); 1132 if (status & STATUS_RPS) 1133 printf("%s: receive process stopped\n", 1134 sc->sc_dev.dv_xname); 1135 (void) tlp_init(ifp); 1136 break; 1137 } 1138 1139 if (status & STATUS_SE) { 1140 const char *str; 1141 switch (status & STATUS_EB) { 1142 case STATUS_EB_PARITY: 1143 str = "parity error"; 1144 break; 1145 1146 case STATUS_EB_MABT: 1147 str = "master abort"; 1148 break; 1149 1150 case STATUS_EB_TABT: 1151 str = "target abort"; 1152 break; 1153 1154 default: 1155 str = "unknown error"; 1156 break; 1157 } 1158 printf("%s: fatal system error: %s\n", 1159 sc->sc_dev.dv_xname, str); 1160 (void) tlp_init(ifp); 1161 break; 1162 } 1163 1164 /* 1165 * Not handled: 1166 * 1167 * Transmit buffer unavailable -- normal 1168 * condition, nothing to do, really. 1169 * 1170 * General purpose timer experied -- we don't 1171 * use the general purpose timer. 1172 * 1173 * Early receive interrupt -- not available on 1174 * all chips, we just use RI. We also only 1175 * use single-segment receive DMA, so this 1176 * is mostly useless. 1177 */ 1178 } 1179 1180 /* Bring interrupts back up on the DM9102. */ 1181 switch (sc->sc_chip) { 1182 case TULIP_CHIP_DM9102: 1183 case TULIP_CHIP_DM9102A: 1184 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1185 break; 1186 1187 default: 1188 /* Nothing. */ 1189 break; 1190 } 1191 1192 /* Try to get more packets going. */ 1193 tlp_start(ifp); 1194 1195 #if NRND > 0 1196 if (handled) 1197 rnd_add_uint32(&sc->sc_rnd_source, status); 1198 #endif 1199 return (handled); 1200 } 1201 1202 /* 1203 * tlp_rxintr: 1204 * 1205 * Helper; handle receive interrupts. 1206 */ 1207 void 1208 tlp_rxintr(sc) 1209 struct tulip_softc *sc; 1210 { 1211 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1212 struct ether_header *eh; 1213 struct tulip_rxsoft *rxs; 1214 struct mbuf *m; 1215 u_int32_t rxstat; 1216 int i, len; 1217 1218 for (i = sc->sc_rxptr;; i = TULIP_NEXTRX(i)) { 1219 rxs = &sc->sc_rxsoft[i]; 1220 1221 TULIP_CDRXSYNC(sc, i, 1222 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1223 1224 rxstat = le32toh(sc->sc_rxdescs[i].td_status); 1225 1226 if (rxstat & TDSTAT_OWN) { 1227 /* 1228 * We have processed all of the receive buffers. 1229 */ 1230 break; 1231 } 1232 1233 /* 1234 * Make sure the packet fit in one buffer. This should 1235 * always be the case. But the Lite-On PNIC, rev 33 1236 * has an awful receive engine bug, which may require 1237 * a very icky work-around. 1238 */ 1239 if ((rxstat & (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) != 1240 (TDSTAT_Rx_FS|TDSTAT_Rx_LS)) { 1241 printf("%s: incoming packet spilled, resetting\n", 1242 sc->sc_dev.dv_xname); 1243 (void) tlp_init(ifp); 1244 return; 1245 } 1246 1247 /* 1248 * If any collisions were seen on the wire, count one. 1249 */ 1250 if (rxstat & TDSTAT_Rx_CS) 1251 ifp->if_collisions++; 1252 1253 /* 1254 * If an error occured, update stats, clear the status 1255 * word, and leave the packet buffer in place. It will 1256 * simply be reused the next time the ring comes around. 1257 * If 802.1Q VLAN MTU is enabled, ignore the Frame Too Long 1258 * error. 1259 */ 1260 if (rxstat & TDSTAT_ES && 1261 ((sc->sc_ethercom.ec_capenable & ETHERCAP_VLAN_MTU) == 0 || 1262 (rxstat & (TDSTAT_Rx_DE | TDSTAT_Rx_RF | 1263 TDSTAT_Rx_DB | TDSTAT_Rx_CE)) != 0)) { 1264 #define PRINTERR(bit, str) \ 1265 if (rxstat & (bit)) \ 1266 printf("%s: receive error: %s\n", \ 1267 sc->sc_dev.dv_xname, str) 1268 ifp->if_ierrors++; 1269 PRINTERR(TDSTAT_Rx_DE, "descriptor error"); 1270 PRINTERR(TDSTAT_Rx_RF, "runt frame"); 1271 PRINTERR(TDSTAT_Rx_TL, "frame too long"); 1272 PRINTERR(TDSTAT_Rx_RE, "MII error"); 1273 PRINTERR(TDSTAT_Rx_DB, "dribbling bit"); 1274 PRINTERR(TDSTAT_Rx_CE, "CRC error"); 1275 #undef PRINTERR 1276 TULIP_INIT_RXDESC(sc, i); 1277 continue; 1278 } 1279 1280 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1281 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 1282 1283 /* 1284 * No errors; receive the packet. Note the Tulip 1285 * includes the CRC with every packet. 1286 */ 1287 len = TDSTAT_Rx_LENGTH(rxstat); 1288 1289 #ifdef __NO_STRICT_ALIGNMENT 1290 /* 1291 * Allocate a new mbuf cluster. If that fails, we are 1292 * out of memory, and must drop the packet and recycle 1293 * the buffer that's already attached to this descriptor. 1294 */ 1295 m = rxs->rxs_mbuf; 1296 if (tlp_add_rxbuf(sc, i) != 0) { 1297 ifp->if_ierrors++; 1298 TULIP_INIT_RXDESC(sc, i); 1299 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1300 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1301 continue; 1302 } 1303 #else 1304 /* 1305 * The Tulip's receive buffers must be 4-byte aligned. 1306 * But this means that the data after the Ethernet header 1307 * is misaligned. We must allocate a new buffer and 1308 * copy the data, shifted forward 2 bytes. 1309 */ 1310 MGETHDR(m, M_DONTWAIT, MT_DATA); 1311 if (m == NULL) { 1312 dropit: 1313 ifp->if_ierrors++; 1314 TULIP_INIT_RXDESC(sc, i); 1315 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1316 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1317 continue; 1318 } 1319 if (len > (MHLEN - 2)) { 1320 MCLGET(m, M_DONTWAIT); 1321 if ((m->m_flags & M_EXT) == 0) { 1322 m_freem(m); 1323 goto dropit; 1324 } 1325 } 1326 m->m_data += 2; 1327 1328 /* 1329 * Note that we use clusters for incoming frames, so the 1330 * buffer is virtually contiguous. 1331 */ 1332 memcpy(mtod(m, caddr_t), mtod(rxs->rxs_mbuf, caddr_t), len); 1333 1334 /* Allow the receive descriptor to continue using its mbuf. */ 1335 TULIP_INIT_RXDESC(sc, i); 1336 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 1337 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 1338 #endif /* __NO_STRICT_ALIGNMENT */ 1339 1340 ifp->if_ipackets++; 1341 eh = mtod(m, struct ether_header *); 1342 m->m_flags |= M_HASFCS; 1343 m->m_pkthdr.rcvif = ifp; 1344 m->m_pkthdr.len = m->m_len = len; 1345 1346 #if NBPFILTER > 0 1347 /* 1348 * Pass this up to any BPF listeners, but only 1349 * pass it up the stack if its for us. 1350 */ 1351 if (ifp->if_bpf) 1352 bpf_mtap(ifp->if_bpf, m); 1353 #endif /* NPBFILTER > 0 */ 1354 1355 /* 1356 * We sometimes have to run the 21140 in Hash-Only 1357 * mode. If we're in that mode, and not in promiscuous 1358 * mode, and we have a unicast packet that isn't for 1359 * us, then drop it. 1360 */ 1361 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY && 1362 (ifp->if_flags & IFF_PROMISC) == 0 && 1363 ETHER_IS_MULTICAST(eh->ether_dhost) == 0 && 1364 memcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 1365 ETHER_ADDR_LEN) != 0) { 1366 m_freem(m); 1367 continue; 1368 } 1369 1370 /* Pass it on. */ 1371 (*ifp->if_input)(ifp, m); 1372 } 1373 1374 /* Update the receive pointer. */ 1375 sc->sc_rxptr = i; 1376 } 1377 1378 /* 1379 * tlp_txintr: 1380 * 1381 * Helper; handle transmit interrupts. 1382 */ 1383 void 1384 tlp_txintr(sc) 1385 struct tulip_softc *sc; 1386 { 1387 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1388 struct tulip_txsoft *txs; 1389 u_int32_t txstat; 1390 1391 DPRINTF(sc, ("%s: tlp_txintr: sc_flags 0x%08x\n", 1392 sc->sc_dev.dv_xname, sc->sc_flags)); 1393 1394 ifp->if_flags &= ~IFF_OACTIVE; 1395 1396 /* 1397 * Go through our Tx list and free mbufs for those 1398 * frames that have been transmitted. 1399 */ 1400 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 1401 TULIP_CDTXSYNC(sc, txs->txs_lastdesc, 1402 txs->txs_ndescs, 1403 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1404 1405 #ifdef TLP_DEBUG 1406 if (ifp->if_flags & IFF_DEBUG) { 1407 int i; 1408 printf(" txsoft %p transmit chain:\n", txs); 1409 for (i = txs->txs_firstdesc;; i = TULIP_NEXTTX(i)) { 1410 printf(" descriptor %d:\n", i); 1411 printf(" td_status: 0x%08x\n", 1412 le32toh(sc->sc_txdescs[i].td_status)); 1413 printf(" td_ctl: 0x%08x\n", 1414 le32toh(sc->sc_txdescs[i].td_ctl)); 1415 printf(" td_bufaddr1: 0x%08x\n", 1416 le32toh(sc->sc_txdescs[i].td_bufaddr1)); 1417 printf(" td_bufaddr2: 0x%08x\n", 1418 le32toh(sc->sc_txdescs[i].td_bufaddr2)); 1419 if (i == txs->txs_lastdesc) 1420 break; 1421 } 1422 } 1423 #endif 1424 1425 txstat = le32toh(sc->sc_txdescs[txs->txs_lastdesc].td_status); 1426 if (txstat & TDSTAT_OWN) 1427 break; 1428 1429 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 1430 1431 sc->sc_txfree += txs->txs_ndescs; 1432 1433 if (txs->txs_mbuf == NULL) { 1434 /* 1435 * If we didn't have an mbuf, it was the setup 1436 * packet. 1437 */ 1438 #ifdef DIAGNOSTIC 1439 if ((sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1440 panic("tlp_txintr: null mbuf, not doing setup"); 1441 #endif 1442 TULIP_CDSPSYNC(sc, BUS_DMASYNC_POSTWRITE); 1443 sc->sc_flags &= ~TULIPF_DOING_SETUP; 1444 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1445 continue; 1446 } 1447 1448 bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap, 1449 0, txs->txs_dmamap->dm_mapsize, 1450 BUS_DMASYNC_POSTWRITE); 1451 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 1452 m_freem(txs->txs_mbuf); 1453 txs->txs_mbuf = NULL; 1454 1455 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1456 1457 /* 1458 * Check for errors and collisions. 1459 */ 1460 #ifdef TLP_STATS 1461 if (txstat & TDSTAT_Tx_UF) 1462 sc->sc_stats.ts_tx_uf++; 1463 if (txstat & TDSTAT_Tx_TO) 1464 sc->sc_stats.ts_tx_to++; 1465 if (txstat & TDSTAT_Tx_EC) 1466 sc->sc_stats.ts_tx_ec++; 1467 if (txstat & TDSTAT_Tx_LC) 1468 sc->sc_stats.ts_tx_lc++; 1469 #endif 1470 1471 if (txstat & (TDSTAT_Tx_UF|TDSTAT_Tx_TO)) 1472 ifp->if_oerrors++; 1473 1474 if (txstat & TDSTAT_Tx_EC) 1475 ifp->if_collisions += 16; 1476 else 1477 ifp->if_collisions += TDSTAT_Tx_COLLISIONS(txstat); 1478 if (txstat & TDSTAT_Tx_LC) 1479 ifp->if_collisions++; 1480 1481 ifp->if_opackets++; 1482 } 1483 1484 /* 1485 * If there are no more pending transmissions, cancel the watchdog 1486 * timer. 1487 */ 1488 if (txs == NULL && (sc->sc_flags & TULIPF_DOING_SETUP) == 0) 1489 ifp->if_timer = 0; 1490 1491 /* 1492 * If we have a receive filter setup pending, do it now. 1493 */ 1494 if (sc->sc_flags & TULIPF_WANT_SETUP) 1495 (*sc->sc_filter_setup)(sc); 1496 } 1497 1498 #ifdef TLP_STATS 1499 void 1500 tlp_print_stats(sc) 1501 struct tulip_softc *sc; 1502 { 1503 1504 printf("%s: tx_uf %lu, tx_to %lu, tx_ec %lu, tx_lc %lu\n", 1505 sc->sc_dev.dv_xname, 1506 sc->sc_stats.ts_tx_uf, sc->sc_stats.ts_tx_to, 1507 sc->sc_stats.ts_tx_ec, sc->sc_stats.ts_tx_lc); 1508 } 1509 #endif 1510 1511 /* 1512 * tlp_reset: 1513 * 1514 * Perform a soft reset on the Tulip. 1515 */ 1516 void 1517 tlp_reset(sc) 1518 struct tulip_softc *sc; 1519 { 1520 int i; 1521 1522 TULIP_WRITE(sc, CSR_BUSMODE, BUSMODE_SWR); 1523 1524 /* 1525 * Xircom clone doesn't bring itself out of reset automatically. 1526 * Instead, we have to wait at least 50 PCI cycles, and then 1527 * clear SWR. 1528 */ 1529 if (sc->sc_chip == TULIP_CHIP_X3201_3) { 1530 delay(10); 1531 TULIP_WRITE(sc, CSR_BUSMODE, 0); 1532 } 1533 1534 for (i = 0; i < 1000; i++) { 1535 /* 1536 * Wait at least 50 PCI cycles for the reset to 1537 * complete before peeking at the Tulip again. 1538 * 10 uSec is a bit longer than 50 PCI cycles 1539 * (at 33MHz), but it doesn't hurt have the extra 1540 * wait. 1541 */ 1542 delay(10); 1543 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR) == 0) 1544 break; 1545 } 1546 1547 if (TULIP_ISSET(sc, CSR_BUSMODE, BUSMODE_SWR)) 1548 printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname); 1549 1550 delay(1000); 1551 1552 /* 1553 * If the board has any GPIO reset sequences to issue, do them now. 1554 */ 1555 if (sc->sc_reset != NULL) 1556 (*sc->sc_reset)(sc); 1557 } 1558 1559 /* 1560 * tlp_init: [ ifnet interface function ] 1561 * 1562 * Initialize the interface. Must be called at splnet(). 1563 */ 1564 int 1565 tlp_init(ifp) 1566 struct ifnet *ifp; 1567 { 1568 struct tulip_softc *sc = ifp->if_softc; 1569 struct tulip_txsoft *txs; 1570 struct tulip_rxsoft *rxs; 1571 int i, error = 0; 1572 1573 if ((error = tlp_enable(sc)) != 0) 1574 goto out; 1575 1576 /* 1577 * Cancel any pending I/O. 1578 */ 1579 tlp_stop(ifp, 0); 1580 1581 /* 1582 * Initialize `opmode' to 0, and call the pre-init routine, if 1583 * any. This is required because the 2114x and some of the 1584 * clones require that the media-related bits in `opmode' be 1585 * set before performing a soft-reset in order to get internal 1586 * chip pathways are correct. Yay! 1587 */ 1588 sc->sc_opmode = 0; 1589 if (sc->sc_preinit != NULL) 1590 (*sc->sc_preinit)(sc); 1591 1592 /* 1593 * Reset the Tulip to a known state. 1594 */ 1595 tlp_reset(sc); 1596 1597 /* 1598 * Initialize the BUSMODE register. 1599 */ 1600 sc->sc_busmode = BUSMODE_BAR; 1601 switch (sc->sc_chip) { 1602 case TULIP_CHIP_21140: 1603 case TULIP_CHIP_21140A: 1604 case TULIP_CHIP_21142: 1605 case TULIP_CHIP_21143: 1606 case TULIP_CHIP_82C115: 1607 case TULIP_CHIP_MX98725: 1608 /* 1609 * If we're allowed to do so, use Memory Read Line 1610 * and Memory Read Multiple. 1611 * 1612 * XXX Should we use Memory Write and Invalidate? 1613 */ 1614 if (sc->sc_flags & TULIPF_MRL) 1615 sc->sc_busmode |= BUSMODE_RLE; 1616 if (sc->sc_flags & TULIPF_MRM) 1617 sc->sc_busmode |= BUSMODE_RME; 1618 #if 0 1619 if (sc->sc_flags & TULIPF_MWI) 1620 sc->sc_busmode |= BUSMODE_WLE; 1621 #endif 1622 break; 1623 1624 case TULIP_CHIP_82C168: 1625 case TULIP_CHIP_82C169: 1626 sc->sc_busmode |= BUSMODE_PNIC_MBO; 1627 if (sc->sc_maxburst == 0) 1628 sc->sc_maxburst = 16; 1629 break; 1630 1631 default: 1632 /* Nothing. */ 1633 break; 1634 } 1635 switch (sc->sc_cacheline) { 1636 default: 1637 /* 1638 * Note: We must *always* set these bits; a cache 1639 * alignment of 0 is RESERVED. 1640 */ 1641 case 8: 1642 sc->sc_busmode |= BUSMODE_CAL_8LW; 1643 break; 1644 case 16: 1645 sc->sc_busmode |= BUSMODE_CAL_16LW; 1646 break; 1647 case 32: 1648 sc->sc_busmode |= BUSMODE_CAL_32LW; 1649 break; 1650 } 1651 switch (sc->sc_maxburst) { 1652 case 1: 1653 sc->sc_busmode |= BUSMODE_PBL_1LW; 1654 break; 1655 case 2: 1656 sc->sc_busmode |= BUSMODE_PBL_2LW; 1657 break; 1658 case 4: 1659 sc->sc_busmode |= BUSMODE_PBL_4LW; 1660 break; 1661 case 8: 1662 sc->sc_busmode |= BUSMODE_PBL_8LW; 1663 break; 1664 case 16: 1665 sc->sc_busmode |= BUSMODE_PBL_16LW; 1666 break; 1667 case 32: 1668 sc->sc_busmode |= BUSMODE_PBL_32LW; 1669 break; 1670 default: 1671 sc->sc_busmode |= BUSMODE_PBL_DEFAULT; 1672 break; 1673 } 1674 #if BYTE_ORDER == BIG_ENDIAN 1675 /* 1676 * Can't use BUSMODE_BLE or BUSMODE_DBO; not all chips 1677 * support them, and even on ones that do, it doesn't 1678 * always work. So we always access descriptors with 1679 * little endian via htole32/le32toh. 1680 */ 1681 #endif 1682 /* 1683 * Big-endian bus requires BUSMODE_BLE anyway. 1684 * Also, BUSMODE_DBO is needed because we assume 1685 * descriptors are little endian. 1686 */ 1687 if (sc->sc_flags & TULIPF_BLE) 1688 sc->sc_busmode |= BUSMODE_BLE; 1689 if (sc->sc_flags & TULIPF_DBO) 1690 sc->sc_busmode |= BUSMODE_DBO; 1691 1692 /* 1693 * Some chips have a broken bus interface. 1694 */ 1695 switch (sc->sc_chip) { 1696 case TULIP_CHIP_DM9102: 1697 case TULIP_CHIP_DM9102A: 1698 sc->sc_busmode = 0; 1699 break; 1700 1701 default: 1702 /* Nothing. */ 1703 break; 1704 } 1705 1706 TULIP_WRITE(sc, CSR_BUSMODE, sc->sc_busmode); 1707 1708 /* 1709 * Initialize the OPMODE register. We don't write it until 1710 * we're ready to begin the transmit and receive processes. 1711 * 1712 * Media-related OPMODE bits are set in the media callbacks 1713 * for each specific chip/board. 1714 */ 1715 sc->sc_opmode |= OPMODE_SR | OPMODE_ST | 1716 sc->sc_txth[sc->sc_txthresh].txth_opmode; 1717 1718 /* 1719 * Magical mystery initialization on the Macronix chips. 1720 * The MX98713 uses its own magic value, the rest share 1721 * a common one. 1722 */ 1723 switch (sc->sc_chip) { 1724 case TULIP_CHIP_MX98713: 1725 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98713); 1726 break; 1727 1728 case TULIP_CHIP_MX98713A: 1729 case TULIP_CHIP_MX98715: 1730 case TULIP_CHIP_MX98715A: 1731 case TULIP_CHIP_MX98715AEC_X: 1732 case TULIP_CHIP_MX98725: 1733 TULIP_WRITE(sc, CSR_PMAC_TOR, PMAC_TOR_98715); 1734 break; 1735 1736 default: 1737 /* Nothing. */ 1738 break; 1739 } 1740 1741 /* 1742 * Initialize the transmit descriptor ring. 1743 */ 1744 memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 1745 for (i = 0; i < TULIP_NTXDESC; i++) { 1746 sc->sc_txdescs[i].td_ctl = htole32(sc->sc_tdctl_ch); 1747 sc->sc_txdescs[i].td_bufaddr2 = 1748 htole32(TULIP_CDTXADDR(sc, TULIP_NEXTTX(i))); 1749 } 1750 sc->sc_txdescs[TULIP_NTXDESC - 1].td_ctl |= htole32(sc->sc_tdctl_er); 1751 TULIP_CDTXSYNC(sc, 0, TULIP_NTXDESC, 1752 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1753 sc->sc_txfree = TULIP_NTXDESC; 1754 sc->sc_txnext = 0; 1755 1756 /* 1757 * Initialize the transmit job descriptors. 1758 */ 1759 SIMPLEQ_INIT(&sc->sc_txfreeq); 1760 SIMPLEQ_INIT(&sc->sc_txdirtyq); 1761 for (i = 0; i < TULIP_TXQUEUELEN; i++) { 1762 txs = &sc->sc_txsoft[i]; 1763 txs->txs_mbuf = NULL; 1764 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1765 } 1766 1767 /* 1768 * Initialize the receive descriptor and receive job 1769 * descriptor rings. 1770 */ 1771 for (i = 0; i < TULIP_NRXDESC; i++) { 1772 rxs = &sc->sc_rxsoft[i]; 1773 if (rxs->rxs_mbuf == NULL) { 1774 if ((error = tlp_add_rxbuf(sc, i)) != 0) { 1775 printf("%s: unable to allocate or map rx " 1776 "buffer %d, error = %d\n", 1777 sc->sc_dev.dv_xname, i, error); 1778 /* 1779 * XXX Should attempt to run with fewer receive 1780 * XXX buffers instead of just failing. 1781 */ 1782 tlp_rxdrain(sc); 1783 goto out; 1784 } 1785 } else 1786 TULIP_INIT_RXDESC(sc, i); 1787 } 1788 sc->sc_rxptr = 0; 1789 1790 /* 1791 * Initialize the interrupt mask and enable interrupts. 1792 */ 1793 /* normal interrupts */ 1794 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; 1795 1796 /* abnormal interrupts */ 1797 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | 1798 STATUS_RU | STATUS_RPS | STATUS_RWT | STATUS_SE | STATUS_AIS; 1799 1800 sc->sc_rxint_mask = STATUS_RI|STATUS_RU|STATUS_RWT; 1801 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; 1802 1803 switch (sc->sc_chip) { 1804 case TULIP_CHIP_WB89C840F: 1805 /* 1806 * Clear bits that we don't want that happen to 1807 * overlap or don't exist. 1808 */ 1809 sc->sc_inten &= ~(STATUS_WINB_REI|STATUS_RWT); 1810 break; 1811 1812 default: 1813 /* Nothing. */ 1814 break; 1815 } 1816 1817 sc->sc_rxint_mask &= sc->sc_inten; 1818 sc->sc_txint_mask &= sc->sc_inten; 1819 1820 TULIP_WRITE(sc, CSR_INTEN, sc->sc_inten); 1821 TULIP_WRITE(sc, CSR_STATUS, 0xffffffff); 1822 1823 /* 1824 * Give the transmit and receive rings to the Tulip. 1825 */ 1826 TULIP_WRITE(sc, CSR_TXLIST, TULIP_CDTXADDR(sc, sc->sc_txnext)); 1827 TULIP_WRITE(sc, CSR_RXLIST, TULIP_CDRXADDR(sc, sc->sc_rxptr)); 1828 1829 /* 1830 * On chips that do this differently, set the station address. 1831 */ 1832 switch (sc->sc_chip) { 1833 case TULIP_CHIP_WB89C840F: 1834 { 1835 /* XXX Do this with stream writes? */ 1836 bus_addr_t cpa = TULIP_CSR_OFFSET(sc, CSR_WINB_CPA0); 1837 1838 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1839 bus_space_write_1(sc->sc_st, sc->sc_sh, 1840 cpa + i, LLADDR(ifp->if_sadl)[i]); 1841 } 1842 break; 1843 } 1844 1845 case TULIP_CHIP_AL981: 1846 case TULIP_CHIP_AN983: 1847 case TULIP_CHIP_AN985: 1848 { 1849 u_int32_t reg; 1850 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 1851 1852 reg = enaddr[0] | 1853 (enaddr[1] << 8) | 1854 (enaddr[2] << 16) | 1855 (enaddr[3] << 24); 1856 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR0, reg); 1857 1858 reg = enaddr[4] | 1859 (enaddr[5] << 8); 1860 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_PAR1, reg); 1861 } 1862 1863 default: 1864 /* Nothing. */ 1865 break; 1866 } 1867 1868 /* 1869 * Set the receive filter. This will start the transmit and 1870 * receive processes. 1871 */ 1872 (*sc->sc_filter_setup)(sc); 1873 1874 /* 1875 * Set the current media. 1876 */ 1877 (void) (*sc->sc_mediasw->tmsw_set)(sc); 1878 1879 /* 1880 * Start the receive process. 1881 */ 1882 TULIP_WRITE(sc, CSR_RXPOLL, RXPOLL_RPD); 1883 1884 if (sc->sc_tick != NULL) { 1885 /* Start the one second clock. */ 1886 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 1887 } 1888 1889 /* 1890 * Note that the interface is now running. 1891 */ 1892 ifp->if_flags |= IFF_RUNNING; 1893 ifp->if_flags &= ~IFF_OACTIVE; 1894 1895 out: 1896 if (error) { 1897 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1898 ifp->if_timer = 0; 1899 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 1900 } 1901 return (error); 1902 } 1903 1904 /* 1905 * tlp_enable: 1906 * 1907 * Enable the Tulip chip. 1908 */ 1909 int 1910 tlp_enable(sc) 1911 struct tulip_softc *sc; 1912 { 1913 1914 if (TULIP_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) { 1915 if ((*sc->sc_enable)(sc) != 0) { 1916 printf("%s: device enable failed\n", 1917 sc->sc_dev.dv_xname); 1918 return (EIO); 1919 } 1920 sc->sc_flags |= TULIPF_ENABLED; 1921 } 1922 return (0); 1923 } 1924 1925 /* 1926 * tlp_disable: 1927 * 1928 * Disable the Tulip chip. 1929 */ 1930 void 1931 tlp_disable(sc) 1932 struct tulip_softc *sc; 1933 { 1934 1935 if (TULIP_IS_ENABLED(sc) && sc->sc_disable != NULL) { 1936 (*sc->sc_disable)(sc); 1937 sc->sc_flags &= ~TULIPF_ENABLED; 1938 } 1939 } 1940 1941 /* 1942 * tlp_power: 1943 * 1944 * Power management (suspend/resume) hook. 1945 */ 1946 void 1947 tlp_power(why, arg) 1948 int why; 1949 void *arg; 1950 { 1951 struct tulip_softc *sc = arg; 1952 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1953 int s; 1954 1955 s = splnet(); 1956 switch (why) { 1957 case PWR_SUSPEND: 1958 case PWR_STANDBY: 1959 tlp_stop(ifp, 0); 1960 if (sc->sc_power != NULL) 1961 (*sc->sc_power)(sc, why); 1962 break; 1963 case PWR_RESUME: 1964 if (ifp->if_flags & IFF_UP) { 1965 if (sc->sc_power != NULL) 1966 (*sc->sc_power)(sc, why); 1967 tlp_init(ifp); 1968 } 1969 break; 1970 case PWR_SOFTSUSPEND: 1971 case PWR_SOFTSTANDBY: 1972 case PWR_SOFTRESUME: 1973 break; 1974 } 1975 splx(s); 1976 } 1977 1978 /* 1979 * tlp_rxdrain: 1980 * 1981 * Drain the receive queue. 1982 */ 1983 void 1984 tlp_rxdrain(sc) 1985 struct tulip_softc *sc; 1986 { 1987 struct tulip_rxsoft *rxs; 1988 int i; 1989 1990 for (i = 0; i < TULIP_NRXDESC; i++) { 1991 rxs = &sc->sc_rxsoft[i]; 1992 if (rxs->rxs_mbuf != NULL) { 1993 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 1994 m_freem(rxs->rxs_mbuf); 1995 rxs->rxs_mbuf = NULL; 1996 } 1997 } 1998 } 1999 2000 /* 2001 * tlp_stop: [ ifnet interface function ] 2002 * 2003 * Stop transmission on the interface. 2004 */ 2005 void 2006 tlp_stop(ifp, disable) 2007 struct ifnet *ifp; 2008 int disable; 2009 { 2010 struct tulip_softc *sc = ifp->if_softc; 2011 struct tulip_txsoft *txs; 2012 2013 if (sc->sc_tick != NULL) { 2014 /* Stop the one second clock. */ 2015 callout_stop(&sc->sc_tick_callout); 2016 } 2017 2018 if (sc->sc_flags & TULIPF_HAS_MII) { 2019 /* Down the MII. */ 2020 mii_down(&sc->sc_mii); 2021 } 2022 2023 /* Disable interrupts. */ 2024 TULIP_WRITE(sc, CSR_INTEN, 0); 2025 2026 /* Stop the transmit and receive processes. */ 2027 sc->sc_opmode = 0; 2028 TULIP_WRITE(sc, CSR_OPMODE, 0); 2029 TULIP_WRITE(sc, CSR_RXLIST, 0); 2030 TULIP_WRITE(sc, CSR_TXLIST, 0); 2031 2032 /* 2033 * Release any queued transmit buffers. 2034 */ 2035 while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) { 2036 SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs, txs_q); 2037 if (txs->txs_mbuf != NULL) { 2038 bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap); 2039 m_freem(txs->txs_mbuf); 2040 txs->txs_mbuf = NULL; 2041 } 2042 SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 2043 } 2044 2045 if (disable) { 2046 tlp_rxdrain(sc); 2047 tlp_disable(sc); 2048 } 2049 2050 sc->sc_flags &= ~(TULIPF_WANT_SETUP|TULIPF_DOING_SETUP); 2051 2052 /* 2053 * Mark the interface down and cancel the watchdog timer. 2054 */ 2055 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2056 ifp->if_timer = 0; 2057 } 2058 2059 #define SROM_EMIT(sc, x) \ 2060 do { \ 2061 TULIP_WRITE((sc), CSR_MIIROM, (x)); \ 2062 delay(2); \ 2063 } while (0) 2064 2065 /* 2066 * tlp_srom_idle: 2067 * 2068 * Put the SROM in idle state. 2069 */ 2070 void 2071 tlp_srom_idle(sc) 2072 struct tulip_softc *sc; 2073 { 2074 u_int32_t miirom; 2075 int i; 2076 2077 miirom = MIIROM_SR; 2078 SROM_EMIT(sc, miirom); 2079 2080 miirom |= MIIROM_RD; 2081 SROM_EMIT(sc, miirom); 2082 2083 miirom |= MIIROM_SROMCS; 2084 SROM_EMIT(sc, miirom); 2085 2086 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2087 2088 /* Strobe the clock 32 times. */ 2089 for (i = 0; i < 32; i++) { 2090 SROM_EMIT(sc, miirom); 2091 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2092 } 2093 2094 SROM_EMIT(sc, miirom); 2095 2096 miirom &= ~MIIROM_SROMCS; 2097 SROM_EMIT(sc, miirom); 2098 2099 SROM_EMIT(sc, 0); 2100 } 2101 2102 /* 2103 * tlp_srom_size: 2104 * 2105 * Determine the number of address bits in the SROM. 2106 */ 2107 int 2108 tlp_srom_size(sc) 2109 struct tulip_softc *sc; 2110 { 2111 u_int32_t miirom; 2112 int x; 2113 2114 /* Select the SROM. */ 2115 miirom = MIIROM_SR; 2116 SROM_EMIT(sc, miirom); 2117 2118 miirom |= MIIROM_RD; 2119 SROM_EMIT(sc, miirom); 2120 2121 /* Send CHIP SELECT for one clock tick. */ 2122 miirom |= MIIROM_SROMCS; 2123 SROM_EMIT(sc, miirom); 2124 2125 /* Shift in the READ opcode. */ 2126 for (x = 3; x > 0; x--) { 2127 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2128 miirom |= MIIROM_SROMDI; 2129 else 2130 miirom &= ~MIIROM_SROMDI; 2131 SROM_EMIT(sc, miirom); 2132 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2133 SROM_EMIT(sc, miirom); 2134 } 2135 2136 /* Shift in address and look for dummy 0 bit. */ 2137 for (x = 1; x <= 12; x++) { 2138 miirom &= ~MIIROM_SROMDI; 2139 SROM_EMIT(sc, miirom); 2140 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2141 if (!TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2142 break; 2143 SROM_EMIT(sc, miirom); 2144 } 2145 2146 /* Clear CHIP SELECT. */ 2147 miirom &= ~MIIROM_SROMCS; 2148 SROM_EMIT(sc, miirom); 2149 2150 /* Deselect the SROM. */ 2151 SROM_EMIT(sc, 0); 2152 2153 if (x < 4 || x > 12) { 2154 printf("%s: broken MicroWire interface detected; " 2155 "setting SROM size to 1Kb\n", sc->sc_dev.dv_xname); 2156 return (6); 2157 } else { 2158 if (tlp_srom_debug) 2159 printf("%s: SROM size is 2^%d*16 bits (%d bytes)\n", 2160 sc->sc_dev.dv_xname, x, (1 << (x + 4)) >> 3); 2161 return (x); 2162 } 2163 } 2164 2165 /* 2166 * tlp_read_srom: 2167 * 2168 * Read the Tulip SROM. 2169 */ 2170 int 2171 tlp_read_srom(sc) 2172 struct tulip_softc *sc; 2173 { 2174 int size; 2175 u_int32_t miirom; 2176 u_int16_t datain; 2177 int i, x; 2178 2179 tlp_srom_idle(sc); 2180 2181 sc->sc_srom_addrbits = tlp_srom_size(sc); 2182 if (sc->sc_srom_addrbits == 0) 2183 return (0); 2184 size = TULIP_ROM_SIZE(sc->sc_srom_addrbits); 2185 sc->sc_srom = malloc(size, M_DEVBUF, M_NOWAIT); 2186 2187 /* Select the SROM. */ 2188 miirom = MIIROM_SR; 2189 SROM_EMIT(sc, miirom); 2190 2191 miirom |= MIIROM_RD; 2192 SROM_EMIT(sc, miirom); 2193 2194 for (i = 0; i < size; i += 2) { 2195 /* Send CHIP SELECT for one clock tick. */ 2196 miirom |= MIIROM_SROMCS; 2197 SROM_EMIT(sc, miirom); 2198 2199 /* Shift in the READ opcode. */ 2200 for (x = 3; x > 0; x--) { 2201 if (TULIP_SROM_OPC_READ & (1 << (x - 1))) 2202 miirom |= MIIROM_SROMDI; 2203 else 2204 miirom &= ~MIIROM_SROMDI; 2205 SROM_EMIT(sc, miirom); 2206 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2207 SROM_EMIT(sc, miirom); 2208 } 2209 2210 /* Shift in address. */ 2211 for (x = sc->sc_srom_addrbits; x > 0; x--) { 2212 if (i & (1 << x)) 2213 miirom |= MIIROM_SROMDI; 2214 else 2215 miirom &= ~MIIROM_SROMDI; 2216 SROM_EMIT(sc, miirom); 2217 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2218 SROM_EMIT(sc, miirom); 2219 } 2220 2221 /* Shift out data. */ 2222 miirom &= ~MIIROM_SROMDI; 2223 datain = 0; 2224 for (x = 16; x > 0; x--) { 2225 SROM_EMIT(sc, miirom|MIIROM_SROMSK); 2226 if (TULIP_ISSET(sc, CSR_MIIROM, MIIROM_SROMDO)) 2227 datain |= (1 << (x - 1)); 2228 SROM_EMIT(sc, miirom); 2229 } 2230 sc->sc_srom[i] = datain & 0xff; 2231 sc->sc_srom[i + 1] = datain >> 8; 2232 2233 /* Clear CHIP SELECT. */ 2234 miirom &= ~MIIROM_SROMCS; 2235 SROM_EMIT(sc, miirom); 2236 } 2237 2238 /* Deselect the SROM. */ 2239 SROM_EMIT(sc, 0); 2240 2241 /* ...and idle it. */ 2242 tlp_srom_idle(sc); 2243 2244 if (tlp_srom_debug) { 2245 printf("SROM CONTENTS:"); 2246 for (i = 0; i < size; i++) { 2247 if ((i % 8) == 0) 2248 printf("\n\t"); 2249 printf("0x%02x ", sc->sc_srom[i]); 2250 } 2251 printf("\n"); 2252 } 2253 2254 return (1); 2255 } 2256 2257 #undef SROM_EMIT 2258 2259 /* 2260 * tlp_add_rxbuf: 2261 * 2262 * Add a receive buffer to the indicated descriptor. 2263 */ 2264 int 2265 tlp_add_rxbuf(sc, idx) 2266 struct tulip_softc *sc; 2267 int idx; 2268 { 2269 struct tulip_rxsoft *rxs = &sc->sc_rxsoft[idx]; 2270 struct mbuf *m; 2271 int error; 2272 2273 MGETHDR(m, M_DONTWAIT, MT_DATA); 2274 if (m == NULL) 2275 return (ENOBUFS); 2276 2277 MCLGET(m, M_DONTWAIT); 2278 if ((m->m_flags & M_EXT) == 0) { 2279 m_freem(m); 2280 return (ENOBUFS); 2281 } 2282 2283 if (rxs->rxs_mbuf != NULL) 2284 bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap); 2285 2286 rxs->rxs_mbuf = m; 2287 2288 error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap, 2289 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, 2290 BUS_DMA_READ|BUS_DMA_NOWAIT); 2291 if (error) { 2292 printf("%s: can't load rx DMA map %d, error = %d\n", 2293 sc->sc_dev.dv_xname, idx, error); 2294 panic("tlp_add_rxbuf"); /* XXX */ 2295 } 2296 2297 bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0, 2298 rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD); 2299 2300 TULIP_INIT_RXDESC(sc, idx); 2301 2302 return (0); 2303 } 2304 2305 /* 2306 * tlp_srom_crcok: 2307 * 2308 * Check the CRC of the Tulip SROM. 2309 */ 2310 int 2311 tlp_srom_crcok(romdata) 2312 const u_int8_t *romdata; 2313 { 2314 u_int32_t crc; 2315 2316 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM); 2317 crc = (crc & 0xffff) ^ 0xffff; 2318 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM)) 2319 return (1); 2320 2321 /* 2322 * Try an alternate checksum. 2323 */ 2324 crc = ether_crc32_le(romdata, TULIP_ROM_CRC32_CHECKSUM1); 2325 crc = (crc & 0xffff) ^ 0xffff; 2326 if (crc == TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM1)) 2327 return (1); 2328 2329 return (0); 2330 } 2331 2332 /* 2333 * tlp_isv_srom: 2334 * 2335 * Check to see if the SROM is in the new standardized format. 2336 */ 2337 int 2338 tlp_isv_srom(romdata) 2339 const u_int8_t *romdata; 2340 { 2341 int i; 2342 u_int16_t cksum; 2343 2344 if (tlp_srom_crcok(romdata)) { 2345 /* 2346 * SROM CRC checks out; must be in the new format. 2347 */ 2348 return (1); 2349 } 2350 2351 cksum = TULIP_ROM_GETW(romdata, TULIP_ROM_CRC32_CHECKSUM); 2352 if (cksum == 0xffff || cksum == 0) { 2353 /* 2354 * No checksum present. Check the SROM ID; 18 bytes of 0 2355 * followed by 1 (version) followed by the number of 2356 * adapters which use this SROM (should be non-zero). 2357 */ 2358 for (i = 0; i < TULIP_ROM_SROM_FORMAT_VERION; i++) { 2359 if (romdata[i] != 0) 2360 return (0); 2361 } 2362 if (romdata[TULIP_ROM_SROM_FORMAT_VERION] != 1) 2363 return (0); 2364 if (romdata[TULIP_ROM_CHIP_COUNT] == 0) 2365 return (0); 2366 return (1); 2367 } 2368 2369 return (0); 2370 } 2371 2372 /* 2373 * tlp_isv_srom_enaddr: 2374 * 2375 * Get the Ethernet address from an ISV SROM. 2376 */ 2377 int 2378 tlp_isv_srom_enaddr(sc, enaddr) 2379 struct tulip_softc *sc; 2380 u_int8_t *enaddr; 2381 { 2382 int i, devcnt; 2383 2384 if (tlp_isv_srom(sc->sc_srom) == 0) 2385 return (0); 2386 2387 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 2388 for (i = 0; i < devcnt; i++) { 2389 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 2390 break; 2391 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 2392 sc->sc_devno) 2393 break; 2394 } 2395 2396 if (i == devcnt) 2397 return (0); 2398 2399 memcpy(enaddr, &sc->sc_srom[TULIP_ROM_IEEE_NETWORK_ADDRESS], 2400 ETHER_ADDR_LEN); 2401 enaddr[5] += i; 2402 2403 return (1); 2404 } 2405 2406 /* 2407 * tlp_parse_old_srom: 2408 * 2409 * Parse old-format SROMs. 2410 * 2411 * This routine is largely lifted from Matt Thomas's `de' driver. 2412 */ 2413 int 2414 tlp_parse_old_srom(sc, enaddr) 2415 struct tulip_softc *sc; 2416 u_int8_t *enaddr; 2417 { 2418 static const u_int8_t testpat[] = 2419 { 0xff, 0, 0x55, 0xaa, 0xff, 0, 0x55, 0xaa }; 2420 int i; 2421 u_int32_t cksum; 2422 2423 if (memcmp(&sc->sc_srom[0], &sc->sc_srom[16], 8) != 0) { 2424 /* 2425 * Some vendors (e.g. ZNYX) don't use the standard 2426 * DEC Address ROM format, but rather just have an 2427 * Ethernet address in the first 6 bytes, maybe a 2428 * 2 byte checksum, and then all 0xff's. 2429 * 2430 * On the other hand, Cobalt Networks interfaces 2431 * simply have the address in the first six bytes 2432 * with the rest zeroed out. 2433 */ 2434 for (i = 8; i < 32; i++) { 2435 if (sc->sc_srom[i] != 0xff && 2436 sc->sc_srom[i] != 0) 2437 return (0); 2438 } 2439 2440 /* 2441 * Sanity check the Ethernet address: 2442 * 2443 * - Make sure it's not multicast or locally 2444 * assigned 2445 * - Make sure it has a non-0 OUI 2446 */ 2447 if (sc->sc_srom[0] & 3) 2448 return (0); 2449 if (sc->sc_srom[0] == 0 && sc->sc_srom[1] == 0 && 2450 sc->sc_srom[2] == 0) 2451 return (0); 2452 2453 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2454 return (1); 2455 } 2456 2457 /* 2458 * Standard DEC Address ROM test. 2459 */ 2460 2461 if (memcmp(&sc->sc_srom[24], testpat, 8) != 0) 2462 return (0); 2463 2464 for (i = 0; i < 8; i++) { 2465 if (sc->sc_srom[i] != sc->sc_srom[15 - i]) 2466 return (0); 2467 } 2468 2469 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 2470 2471 cksum = *(u_int16_t *) &enaddr[0]; 2472 2473 cksum <<= 1; 2474 if (cksum > 0xffff) 2475 cksum -= 0xffff; 2476 2477 cksum += *(u_int16_t *) &enaddr[2]; 2478 if (cksum > 0xffff) 2479 cksum -= 0xffff; 2480 2481 cksum <<= 1; 2482 if (cksum > 0xffff) 2483 cksum -= 0xffff; 2484 2485 cksum += *(u_int16_t *) &enaddr[4]; 2486 if (cksum >= 0xffff) 2487 cksum -= 0xffff; 2488 2489 if (cksum != *(u_int16_t *) &sc->sc_srom[6]) 2490 return (0); 2491 2492 return (1); 2493 } 2494 2495 /* 2496 * tlp_filter_setup: 2497 * 2498 * Set the Tulip's receive filter. 2499 */ 2500 void 2501 tlp_filter_setup(sc) 2502 struct tulip_softc *sc; 2503 { 2504 struct ethercom *ec = &sc->sc_ethercom; 2505 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2506 struct ether_multi *enm; 2507 struct ether_multistep step; 2508 __volatile u_int32_t *sp; 2509 struct tulip_txsoft *txs; 2510 u_int8_t enaddr[ETHER_ADDR_LEN]; 2511 u_int32_t hash, hashsize; 2512 int cnt; 2513 2514 DPRINTF(sc, ("%s: tlp_filter_setup: sc_flags 0x%08x\n", 2515 sc->sc_dev.dv_xname, sc->sc_flags)); 2516 2517 memcpy(enaddr, LLADDR(ifp->if_sadl), ETHER_ADDR_LEN); 2518 2519 /* 2520 * If there are transmissions pending, wait until they have 2521 * completed. 2522 */ 2523 if (SIMPLEQ_FIRST(&sc->sc_txdirtyq) != NULL || 2524 (sc->sc_flags & TULIPF_DOING_SETUP) != 0) { 2525 sc->sc_flags |= TULIPF_WANT_SETUP; 2526 DPRINTF(sc, ("%s: tlp_filter_setup: deferring\n", 2527 sc->sc_dev.dv_xname)); 2528 return; 2529 } 2530 sc->sc_flags &= ~TULIPF_WANT_SETUP; 2531 2532 switch (sc->sc_chip) { 2533 case TULIP_CHIP_82C115: 2534 hashsize = TULIP_PNICII_HASHSIZE; 2535 break; 2536 2537 default: 2538 hashsize = TULIP_MCHASHSIZE; 2539 } 2540 2541 /* 2542 * If we're running, idle the transmit and receive engines. If 2543 * we're NOT running, we're being called from tlp_init(), and our 2544 * writing OPMODE will start the transmit and receive processes 2545 * in motion. 2546 */ 2547 if (ifp->if_flags & IFF_RUNNING) 2548 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 2549 2550 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2551 2552 if (ifp->if_flags & IFF_PROMISC) { 2553 sc->sc_opmode |= OPMODE_PR; 2554 goto allmulti; 2555 } 2556 2557 /* 2558 * Try Perfect filtering first. 2559 */ 2560 2561 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2562 sp = TULIP_CDSP(sc); 2563 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2564 cnt = 0; 2565 ETHER_FIRST_MULTI(step, ec, enm); 2566 while (enm != NULL) { 2567 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2568 /* 2569 * We must listen to a range of multicast addresses. 2570 * For now, just accept all multicasts, rather than 2571 * trying to set only those filter bits needed to match 2572 * the range. (At this time, the only use of address 2573 * ranges is for IP multicast routing, for which the 2574 * range is big enough to require all bits set.) 2575 */ 2576 goto allmulti; 2577 } 2578 if (cnt == (TULIP_MAXADDRS - 2)) { 2579 /* 2580 * We already have our multicast limit (still need 2581 * our station address and broadcast). Go to 2582 * Hash-Perfect mode. 2583 */ 2584 goto hashperfect; 2585 } 2586 cnt++; 2587 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 0); 2588 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 1); 2589 *sp++ = TULIP_SP_FIELD(enm->enm_addrlo, 2); 2590 ETHER_NEXT_MULTI(step, enm); 2591 } 2592 2593 if (ifp->if_flags & IFF_BROADCAST) { 2594 /* ...and the broadcast address. */ 2595 cnt++; 2596 *sp++ = TULIP_SP_FIELD_C(0xffff); 2597 *sp++ = TULIP_SP_FIELD_C(0xffff); 2598 *sp++ = TULIP_SP_FIELD_C(0xffff); 2599 } 2600 2601 /* Pad the rest with our station address. */ 2602 for (; cnt < TULIP_MAXADDRS; cnt++) { 2603 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2604 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2605 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2606 } 2607 ifp->if_flags &= ~IFF_ALLMULTI; 2608 goto setit; 2609 2610 hashperfect: 2611 /* 2612 * Try Hash-Perfect mode. 2613 */ 2614 2615 /* 2616 * Some 21140 chips have broken Hash-Perfect modes. On these 2617 * chips, we simply use Hash-Only mode, and put our station 2618 * address into the filter. 2619 */ 2620 if (sc->sc_chip == TULIP_CHIP_21140) 2621 sc->sc_filtmode = TDCTL_Tx_FT_HASHONLY; 2622 else 2623 sc->sc_filtmode = TDCTL_Tx_FT_HASH; 2624 sp = TULIP_CDSP(sc); 2625 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2626 ETHER_FIRST_MULTI(step, ec, enm); 2627 while (enm != NULL) { 2628 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2629 /* 2630 * We must listen to a range of multicast addresses. 2631 * For now, just accept all multicasts, rather than 2632 * trying to set only those filter bits needed to match 2633 * the range. (At this time, the only use of address 2634 * ranges is for IP multicast routing, for which the 2635 * range is big enough to require all bits set.) 2636 */ 2637 goto allmulti; 2638 } 2639 hash = tlp_mchash(enm->enm_addrlo, hashsize); 2640 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2641 ETHER_NEXT_MULTI(step, enm); 2642 } 2643 2644 if (ifp->if_flags & IFF_BROADCAST) { 2645 /* ...and the broadcast address. */ 2646 hash = tlp_mchash(etherbroadcastaddr, hashsize); 2647 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2648 } 2649 2650 if (sc->sc_filtmode == TDCTL_Tx_FT_HASHONLY) { 2651 /* ...and our station address. */ 2652 hash = tlp_mchash(enaddr, hashsize); 2653 sp[hash >> 4] |= htole32(1 << (hash & 0xf)); 2654 } else { 2655 /* 2656 * Hash-Perfect mode; put our station address after 2657 * the hash table. 2658 */ 2659 sp[39] = TULIP_SP_FIELD(enaddr, 0); 2660 sp[40] = TULIP_SP_FIELD(enaddr, 1); 2661 sp[41] = TULIP_SP_FIELD(enaddr, 2); 2662 } 2663 ifp->if_flags &= ~IFF_ALLMULTI; 2664 goto setit; 2665 2666 allmulti: 2667 /* 2668 * Use Perfect filter mode. First address is the broadcast address, 2669 * and pad the rest with our station address. We'll set Pass-all- 2670 * multicast in OPMODE below. 2671 */ 2672 sc->sc_filtmode = TDCTL_Tx_FT_PERFECT; 2673 sp = TULIP_CDSP(sc); 2674 memset(TULIP_CDSP(sc), 0, TULIP_SETUP_PACKET_LEN); 2675 cnt = 0; 2676 if (ifp->if_flags & IFF_BROADCAST) { 2677 cnt++; 2678 *sp++ = TULIP_SP_FIELD_C(0xffff); 2679 *sp++ = TULIP_SP_FIELD_C(0xffff); 2680 *sp++ = TULIP_SP_FIELD_C(0xffff); 2681 } 2682 for (; cnt < TULIP_MAXADDRS; cnt++) { 2683 *sp++ = TULIP_SP_FIELD(enaddr, 0); 2684 *sp++ = TULIP_SP_FIELD(enaddr, 1); 2685 *sp++ = TULIP_SP_FIELD(enaddr, 2); 2686 } 2687 ifp->if_flags |= IFF_ALLMULTI; 2688 2689 setit: 2690 if (ifp->if_flags & IFF_ALLMULTI) 2691 sc->sc_opmode |= OPMODE_PM; 2692 2693 /* Sync the setup packet buffer. */ 2694 TULIP_CDSPSYNC(sc, BUS_DMASYNC_PREWRITE); 2695 2696 /* 2697 * Fill in the setup packet descriptor. 2698 */ 2699 txs = SIMPLEQ_FIRST(&sc->sc_txfreeq); 2700 2701 txs->txs_firstdesc = sc->sc_txnext; 2702 txs->txs_lastdesc = sc->sc_txnext; 2703 txs->txs_ndescs = 1; 2704 txs->txs_mbuf = NULL; 2705 2706 sc->sc_txdescs[sc->sc_txnext].td_bufaddr1 = 2707 htole32(TULIP_CDSPADDR(sc)); 2708 sc->sc_txdescs[sc->sc_txnext].td_ctl = 2709 htole32((TULIP_SETUP_PACKET_LEN << TDCTL_SIZE1_SHIFT) | 2710 sc->sc_filtmode | TDCTL_Tx_SET | sc->sc_setup_fsls | 2711 TDCTL_Tx_IC | sc->sc_tdctl_ch | 2712 (sc->sc_txnext == (TULIP_NTXDESC - 1) ? sc->sc_tdctl_er : 0)); 2713 sc->sc_txdescs[sc->sc_txnext].td_status = htole32(TDSTAT_OWN); 2714 TULIP_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndescs, 2715 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 2716 2717 /* Advance the tx pointer. */ 2718 sc->sc_txfree -= 1; 2719 sc->sc_txnext = TULIP_NEXTTX(sc->sc_txnext); 2720 2721 SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs, txs_q); 2722 SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 2723 2724 /* 2725 * Set the OPMODE register. This will also resume the 2726 * transmit transmit process we idled above. 2727 */ 2728 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2729 2730 sc->sc_flags |= TULIPF_DOING_SETUP; 2731 2732 /* 2733 * Kick the transmitter; this will cause the Tulip to 2734 * read the setup descriptor. 2735 */ 2736 /* XXX USE AUTOPOLLING? */ 2737 TULIP_WRITE(sc, CSR_TXPOLL, TXPOLL_TPD); 2738 2739 /* Set up a watchdog timer in case the chip flakes out. */ 2740 ifp->if_timer = 5; 2741 2742 DPRINTF(sc, ("%s: tlp_filter_setup: returning\n", sc->sc_dev.dv_xname)); 2743 } 2744 2745 /* 2746 * tlp_winb_filter_setup: 2747 * 2748 * Set the Winbond 89C840F's receive filter. 2749 */ 2750 void 2751 tlp_winb_filter_setup(sc) 2752 struct tulip_softc *sc; 2753 { 2754 struct ethercom *ec = &sc->sc_ethercom; 2755 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2756 struct ether_multi *enm; 2757 struct ether_multistep step; 2758 u_int32_t hash, mchash[2]; 2759 2760 DPRINTF(sc, ("%s: tlp_winb_filter_setup: sc_flags 0x%08x\n", 2761 sc->sc_dev.dv_xname, sc->sc_flags)); 2762 2763 sc->sc_opmode &= ~(OPMODE_WINB_APP|OPMODE_WINB_AMP|OPMODE_WINB_ABP); 2764 2765 if (ifp->if_flags & IFF_MULTICAST) 2766 sc->sc_opmode |= OPMODE_WINB_AMP; 2767 2768 if (ifp->if_flags & IFF_BROADCAST) 2769 sc->sc_opmode |= OPMODE_WINB_ABP; 2770 2771 if (ifp->if_flags & IFF_PROMISC) { 2772 sc->sc_opmode |= OPMODE_WINB_APP; 2773 goto allmulti; 2774 } 2775 2776 mchash[0] = mchash[1] = 0; 2777 2778 ETHER_FIRST_MULTI(step, ec, enm); 2779 while (enm != NULL) { 2780 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2781 /* 2782 * We must listen to a range of multicast addresses. 2783 * For now, just accept all multicasts, rather than 2784 * trying to set only those filter bits needed to match 2785 * the range. (At this time, the only use of address 2786 * ranges is for IP multicast routing, for which the 2787 * range is big enough to require all bits set.) 2788 */ 2789 goto allmulti; 2790 } 2791 2792 /* 2793 * According to the FreeBSD `wb' driver, yes, you 2794 * really do invert the hash. 2795 */ 2796 hash = 2797 (~(ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26)) 2798 & 0x3f; 2799 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2800 ETHER_NEXT_MULTI(step, enm); 2801 } 2802 ifp->if_flags &= ~IFF_ALLMULTI; 2803 goto setit; 2804 2805 allmulti: 2806 ifp->if_flags |= IFF_ALLMULTI; 2807 mchash[0] = mchash[1] = 0xffffffff; 2808 2809 setit: 2810 TULIP_WRITE(sc, CSR_WINB_CMA0, mchash[0]); 2811 TULIP_WRITE(sc, CSR_WINB_CMA1, mchash[1]); 2812 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2813 DPRINTF(sc, ("%s: tlp_winb_filter_setup: returning\n", 2814 sc->sc_dev.dv_xname)); 2815 } 2816 2817 /* 2818 * tlp_al981_filter_setup: 2819 * 2820 * Set the ADMtek AL981's receive filter. 2821 */ 2822 void 2823 tlp_al981_filter_setup(sc) 2824 struct tulip_softc *sc; 2825 { 2826 struct ethercom *ec = &sc->sc_ethercom; 2827 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2828 struct ether_multi *enm; 2829 struct ether_multistep step; 2830 u_int32_t hash, mchash[2]; 2831 2832 /* 2833 * If the chip is running, we need to reset the interface, 2834 * and will revisit here (with IFF_RUNNING) clear. The 2835 * chip seems to really not like to have its multicast 2836 * filter programmed without a reset. 2837 */ 2838 if (ifp->if_flags & IFF_RUNNING) { 2839 (void) tlp_init(ifp); 2840 return; 2841 } 2842 2843 DPRINTF(sc, ("%s: tlp_al981_filter_setup: sc_flags 0x%08x\n", 2844 sc->sc_dev.dv_xname, sc->sc_flags)); 2845 2846 sc->sc_opmode &= ~(OPMODE_PR|OPMODE_PM); 2847 2848 if (ifp->if_flags & IFF_PROMISC) { 2849 sc->sc_opmode |= OPMODE_PR; 2850 goto allmulti; 2851 } 2852 2853 mchash[0] = mchash[1] = 0; 2854 2855 ETHER_FIRST_MULTI(step, ec, enm); 2856 while (enm != NULL) { 2857 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 2858 /* 2859 * We must listen to a range of multicast addresses. 2860 * For now, just accept all multicasts, rather than 2861 * trying to set only those filter bits needed to match 2862 * the range. (At this time, the only use of address 2863 * ranges is for IP multicast routing, for which the 2864 * range is big enough to require all bits set.) 2865 */ 2866 goto allmulti; 2867 } 2868 2869 hash = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26; 2870 mchash[hash >> 5] |= 1 << (hash & 0x1f); 2871 ETHER_NEXT_MULTI(step, enm); 2872 } 2873 ifp->if_flags &= ~IFF_ALLMULTI; 2874 goto setit; 2875 2876 allmulti: 2877 ifp->if_flags |= IFF_ALLMULTI; 2878 mchash[0] = mchash[1] = 0xffffffff; 2879 2880 setit: 2881 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_MAR0, mchash[0]); 2882 bus_space_write_4(sc->sc_st, sc->sc_sh, CSR_ADM_MAR1, mchash[1]); 2883 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 2884 DPRINTF(sc, ("%s: tlp_al981_filter_setup: returning\n", 2885 sc->sc_dev.dv_xname)); 2886 } 2887 2888 /* 2889 * tlp_idle: 2890 * 2891 * Cause the transmit and/or receive processes to go idle. 2892 */ 2893 void 2894 tlp_idle(sc, bits) 2895 struct tulip_softc *sc; 2896 u_int32_t bits; 2897 { 2898 static const char * const tlp_tx_state_names[] = { 2899 "STOPPED", 2900 "RUNNING - FETCH", 2901 "RUNNING - WAIT", 2902 "RUNNING - READING", 2903 "-- RESERVED --", 2904 "RUNNING - SETUP", 2905 "SUSPENDED", 2906 "RUNNING - CLOSE", 2907 }; 2908 static const char * const tlp_rx_state_names[] = { 2909 "STOPPED", 2910 "RUNNING - FETCH", 2911 "RUNNING - CHECK", 2912 "RUNNING - WAIT", 2913 "SUSPENDED", 2914 "RUNNING - CLOSE", 2915 "RUNNING - FLUSH", 2916 "RUNNING - QUEUE", 2917 }; 2918 static const char * const dm9102_tx_state_names[] = { 2919 "STOPPED", 2920 "RUNNING - FETCH", 2921 "RUNNING - SETUP", 2922 "RUNNING - READING", 2923 "RUNNING - CLOSE - CLEAR OWNER", 2924 "RUNNING - WAIT", 2925 "RUNNING - CLOSE - WRITE STATUS", 2926 "SUSPENDED", 2927 }; 2928 static const char * const dm9102_rx_state_names[] = { 2929 "STOPPED", 2930 "RUNNING - FETCH", 2931 "RUNNING - WAIT", 2932 "RUNNING - QUEUE", 2933 "RUNNING - CLOSE - CLEAR OWNER", 2934 "RUNNING - CLOSE - WRITE STATUS", 2935 "SUSPENDED", 2936 "RUNNING - FLUSH", 2937 }; 2938 2939 const char * const *tx_state_names, * const *rx_state_names; 2940 u_int32_t csr, ackmask = 0; 2941 int i; 2942 2943 switch (sc->sc_chip) { 2944 case TULIP_CHIP_DM9102: 2945 case TULIP_CHIP_DM9102A: 2946 tx_state_names = dm9102_tx_state_names; 2947 rx_state_names = dm9102_rx_state_names; 2948 break; 2949 2950 default: 2951 tx_state_names = tlp_tx_state_names; 2952 rx_state_names = tlp_rx_state_names; 2953 break; 2954 } 2955 2956 if (bits & OPMODE_ST) 2957 ackmask |= STATUS_TPS; 2958 2959 if (bits & OPMODE_SR) 2960 ackmask |= STATUS_RPS; 2961 2962 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode & ~bits); 2963 2964 for (i = 0; i < 1000; i++) { 2965 if (TULIP_ISSET(sc, CSR_STATUS, ackmask) == ackmask) 2966 break; 2967 delay(10); 2968 } 2969 2970 csr = TULIP_READ(sc, CSR_STATUS); 2971 if ((csr & ackmask) != ackmask) { 2972 if ((bits & OPMODE_ST) != 0 && (csr & STATUS_TPS) == 0 && 2973 (csr & STATUS_TS) != STATUS_TS_STOPPED) { 2974 printf("%s: transmit process failed to idle: " 2975 "state %s\n", sc->sc_dev.dv_xname, 2976 tx_state_names[(csr & STATUS_TS) >> 20]); 2977 } 2978 if ((bits & OPMODE_SR) != 0 && (csr & STATUS_RPS) == 0 && 2979 (csr & STATUS_RS) != STATUS_RS_STOPPED) { 2980 switch (sc->sc_chip) { 2981 case TULIP_CHIP_AN983: 2982 case TULIP_CHIP_AN985: 2983 /* 2984 * Filter the message out on noisy chips. 2985 */ 2986 break; 2987 default: 2988 printf("%s: receive process failed to idle: " 2989 "state %s\n", sc->sc_dev.dv_xname, 2990 rx_state_names[(csr & STATUS_RS) >> 17]); 2991 } 2992 } 2993 } 2994 TULIP_WRITE(sc, CSR_STATUS, ackmask); 2995 } 2996 2997 /***************************************************************************** 2998 * Generic media support functions. 2999 *****************************************************************************/ 3000 3001 /* 3002 * tlp_mediastatus: [ifmedia interface function] 3003 * 3004 * Query the current media. 3005 */ 3006 void 3007 tlp_mediastatus(ifp, ifmr) 3008 struct ifnet *ifp; 3009 struct ifmediareq *ifmr; 3010 { 3011 struct tulip_softc *sc = ifp->if_softc; 3012 3013 if (TULIP_IS_ENABLED(sc) == 0) { 3014 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 3015 ifmr->ifm_status = 0; 3016 return; 3017 } 3018 3019 (*sc->sc_mediasw->tmsw_get)(sc, ifmr); 3020 } 3021 3022 /* 3023 * tlp_mediachange: [ifmedia interface function] 3024 * 3025 * Update the current media. 3026 */ 3027 int 3028 tlp_mediachange(ifp) 3029 struct ifnet *ifp; 3030 { 3031 struct tulip_softc *sc = ifp->if_softc; 3032 3033 if ((ifp->if_flags & IFF_UP) == 0) 3034 return (0); 3035 return ((*sc->sc_mediasw->tmsw_set)(sc)); 3036 } 3037 3038 /***************************************************************************** 3039 * Support functions for MII-attached media. 3040 *****************************************************************************/ 3041 3042 /* 3043 * tlp_mii_tick: 3044 * 3045 * One second timer, used to tick the MII. 3046 */ 3047 void 3048 tlp_mii_tick(arg) 3049 void *arg; 3050 { 3051 struct tulip_softc *sc = arg; 3052 int s; 3053 3054 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 3055 return; 3056 3057 s = splnet(); 3058 mii_tick(&sc->sc_mii); 3059 splx(s); 3060 3061 callout_reset(&sc->sc_tick_callout, hz, sc->sc_tick, sc); 3062 } 3063 3064 /* 3065 * tlp_mii_statchg: [mii interface function] 3066 * 3067 * Callback from PHY when media changes. 3068 */ 3069 void 3070 tlp_mii_statchg(self) 3071 struct device *self; 3072 { 3073 struct tulip_softc *sc = (struct tulip_softc *)self; 3074 3075 /* Idle the transmit and receive processes. */ 3076 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3077 3078 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_HBD); 3079 3080 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) 3081 sc->sc_opmode |= OPMODE_TTM; 3082 else 3083 sc->sc_opmode |= OPMODE_HBD; 3084 3085 if (sc->sc_mii.mii_media_active & IFM_FDX) 3086 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 3087 3088 /* 3089 * Write new OPMODE bits. This also restarts the transmit 3090 * and receive processes. 3091 */ 3092 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3093 } 3094 3095 /* 3096 * tlp_winb_mii_statchg: [mii interface function] 3097 * 3098 * Callback from PHY when media changes. This version is 3099 * for the Winbond 89C840F, which has different OPMODE bits. 3100 */ 3101 void 3102 tlp_winb_mii_statchg(self) 3103 struct device *self; 3104 { 3105 struct tulip_softc *sc = (struct tulip_softc *)self; 3106 3107 /* Idle the transmit and receive processes. */ 3108 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 3109 3110 sc->sc_opmode &= ~(OPMODE_WINB_FES|OPMODE_FD); 3111 3112 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_100_TX) 3113 sc->sc_opmode |= OPMODE_WINB_FES; 3114 3115 if (sc->sc_mii.mii_media_active & IFM_FDX) 3116 sc->sc_opmode |= OPMODE_FD; 3117 3118 /* 3119 * Write new OPMODE bits. This also restarts the transmit 3120 * and receive processes. 3121 */ 3122 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3123 } 3124 3125 /* 3126 * tlp_dm9102_mii_statchg: [mii interface function] 3127 * 3128 * Callback from PHY when media changes. This version is 3129 * for the DM9102. 3130 */ 3131 void 3132 tlp_dm9102_mii_statchg(self) 3133 struct device *self; 3134 { 3135 struct tulip_softc *sc = (struct tulip_softc *)self; 3136 3137 /* 3138 * Don't idle the transmit and receive processes, here. It 3139 * seems to fail, and just causes excess noise. 3140 */ 3141 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD); 3142 3143 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) != IFM_100_TX) 3144 sc->sc_opmode |= OPMODE_TTM; 3145 3146 if (sc->sc_mii.mii_media_active & IFM_FDX) 3147 sc->sc_opmode |= OPMODE_FD; 3148 3149 /* 3150 * Write new OPMODE bits. 3151 */ 3152 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3153 } 3154 3155 /* 3156 * tlp_mii_getmedia: 3157 * 3158 * Callback from ifmedia to request current media status. 3159 */ 3160 void 3161 tlp_mii_getmedia(sc, ifmr) 3162 struct tulip_softc *sc; 3163 struct ifmediareq *ifmr; 3164 { 3165 3166 mii_pollstat(&sc->sc_mii); 3167 ifmr->ifm_status = sc->sc_mii.mii_media_status; 3168 ifmr->ifm_active = sc->sc_mii.mii_media_active; 3169 } 3170 3171 /* 3172 * tlp_mii_setmedia: 3173 * 3174 * Callback from ifmedia to request new media setting. 3175 */ 3176 int 3177 tlp_mii_setmedia(sc) 3178 struct tulip_softc *sc; 3179 { 3180 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 3181 3182 if (ifp->if_flags & IFF_UP) { 3183 switch (sc->sc_chip) { 3184 case TULIP_CHIP_21142: 3185 case TULIP_CHIP_21143: 3186 /* Disable the internal Nway engine. */ 3187 TULIP_WRITE(sc, CSR_SIATXRX, 0); 3188 break; 3189 3190 default: 3191 /* Nothing. */ 3192 break; 3193 } 3194 mii_mediachg(&sc->sc_mii); 3195 } 3196 return (0); 3197 } 3198 3199 /* 3200 * tlp_bitbang_mii_readreg: 3201 * 3202 * Read a PHY register via bit-bang'ing the MII. 3203 */ 3204 int 3205 tlp_bitbang_mii_readreg(self, phy, reg) 3206 struct device *self; 3207 int phy, reg; 3208 { 3209 struct tulip_softc *sc = (void *) self; 3210 3211 return (mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg)); 3212 } 3213 3214 /* 3215 * tlp_bitbang_mii_writereg: 3216 * 3217 * Write a PHY register via bit-bang'ing the MII. 3218 */ 3219 void 3220 tlp_bitbang_mii_writereg(self, phy, reg, val) 3221 struct device *self; 3222 int phy, reg, val; 3223 { 3224 struct tulip_softc *sc = (void *) self; 3225 3226 mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val); 3227 } 3228 3229 /* 3230 * tlp_sio_mii_bitbang_read: 3231 * 3232 * Read the MII serial port for the MII bit-bang module. 3233 */ 3234 u_int32_t 3235 tlp_sio_mii_bitbang_read(self) 3236 struct device *self; 3237 { 3238 struct tulip_softc *sc = (void *) self; 3239 3240 return (TULIP_READ(sc, CSR_MIIROM)); 3241 } 3242 3243 /* 3244 * tlp_sio_mii_bitbang_write: 3245 * 3246 * Write the MII serial port for the MII bit-bang module. 3247 */ 3248 void 3249 tlp_sio_mii_bitbang_write(self, val) 3250 struct device *self; 3251 u_int32_t val; 3252 { 3253 struct tulip_softc *sc = (void *) self; 3254 3255 TULIP_WRITE(sc, CSR_MIIROM, val); 3256 } 3257 3258 /* 3259 * tlp_pnic_mii_readreg: 3260 * 3261 * Read a PHY register on the Lite-On PNIC. 3262 */ 3263 int 3264 tlp_pnic_mii_readreg(self, phy, reg) 3265 struct device *self; 3266 int phy, reg; 3267 { 3268 struct tulip_softc *sc = (void *) self; 3269 u_int32_t val; 3270 int i; 3271 3272 TULIP_WRITE(sc, CSR_PNIC_MII, 3273 PNIC_MII_MBO | PNIC_MII_RESERVED | 3274 PNIC_MII_READ | (phy << PNIC_MII_PHYSHIFT) | 3275 (reg << PNIC_MII_REGSHIFT)); 3276 3277 for (i = 0; i < 1000; i++) { 3278 delay(10); 3279 val = TULIP_READ(sc, CSR_PNIC_MII); 3280 if ((val & PNIC_MII_BUSY) == 0) { 3281 if ((val & PNIC_MII_DATA) == PNIC_MII_DATA) 3282 return (0); 3283 else 3284 return (val & PNIC_MII_DATA); 3285 } 3286 } 3287 printf("%s: MII read timed out\n", sc->sc_dev.dv_xname); 3288 return (0); 3289 } 3290 3291 /* 3292 * tlp_pnic_mii_writereg: 3293 * 3294 * Write a PHY register on the Lite-On PNIC. 3295 */ 3296 void 3297 tlp_pnic_mii_writereg(self, phy, reg, val) 3298 struct device *self; 3299 int phy, reg, val; 3300 { 3301 struct tulip_softc *sc = (void *) self; 3302 int i; 3303 3304 TULIP_WRITE(sc, CSR_PNIC_MII, 3305 PNIC_MII_MBO | PNIC_MII_RESERVED | 3306 PNIC_MII_WRITE | (phy << PNIC_MII_PHYSHIFT) | 3307 (reg << PNIC_MII_REGSHIFT) | val); 3308 3309 for (i = 0; i < 1000; i++) { 3310 delay(10); 3311 if (TULIP_ISSET(sc, CSR_PNIC_MII, PNIC_MII_BUSY) == 0) 3312 return; 3313 } 3314 printf("%s: MII write timed out\n", sc->sc_dev.dv_xname); 3315 } 3316 3317 const bus_addr_t tlp_al981_phy_regmap[] = { 3318 CSR_ADM_BMCR, 3319 CSR_ADM_BMSR, 3320 CSR_ADM_PHYIDR1, 3321 CSR_ADM_PHYIDR2, 3322 CSR_ADM_ANAR, 3323 CSR_ADM_ANLPAR, 3324 CSR_ADM_ANER, 3325 3326 CSR_ADM_XMC, 3327 CSR_ADM_XCIIS, 3328 CSR_ADM_XIE, 3329 CSR_ADM_100CTR, 3330 }; 3331 const int tlp_al981_phy_regmap_size = sizeof(tlp_al981_phy_regmap) / 3332 sizeof(tlp_al981_phy_regmap[0]); 3333 3334 /* 3335 * tlp_al981_mii_readreg: 3336 * 3337 * Read a PHY register on the ADMtek AL981. 3338 */ 3339 int 3340 tlp_al981_mii_readreg(self, phy, reg) 3341 struct device *self; 3342 int phy, reg; 3343 { 3344 struct tulip_softc *sc = (struct tulip_softc *)self; 3345 3346 /* AL981 only has an internal PHY. */ 3347 if (phy != 0) 3348 return (0); 3349 3350 if (reg >= tlp_al981_phy_regmap_size) 3351 return (0); 3352 3353 return (bus_space_read_4(sc->sc_st, sc->sc_sh, 3354 tlp_al981_phy_regmap[reg]) & 0xffff); 3355 } 3356 3357 /* 3358 * tlp_al981_mii_writereg: 3359 * 3360 * Write a PHY register on the ADMtek AL981. 3361 */ 3362 void 3363 tlp_al981_mii_writereg(self, phy, reg, val) 3364 struct device *self; 3365 int phy, reg, val; 3366 { 3367 struct tulip_softc *sc = (struct tulip_softc *)self; 3368 3369 /* AL981 only has an internal PHY. */ 3370 if (phy != 0) 3371 return; 3372 3373 if (reg >= tlp_al981_phy_regmap_size) 3374 return; 3375 3376 bus_space_write_4(sc->sc_st, sc->sc_sh, 3377 tlp_al981_phy_regmap[reg], val); 3378 } 3379 3380 /***************************************************************************** 3381 * Chip-specific pre-init and reset functions. 3382 *****************************************************************************/ 3383 3384 /* 3385 * tlp_2114x_preinit: 3386 * 3387 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3388 */ 3389 void 3390 tlp_2114x_preinit(sc) 3391 struct tulip_softc *sc; 3392 { 3393 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3394 struct tulip_21x4x_media *tm = ife->ifm_aux; 3395 3396 /* 3397 * Whether or not we're in MII or SIA/SYM mode, the media info 3398 * contains the appropriate OPMODE bits. 3399 * 3400 * Note that if we have no media info, we are are doing 3401 * non-MII `auto'. 3402 * 3403 * Also, we always set the Must-Be-One bit. 3404 */ 3405 if (tm == NULL) { 3406 #ifdef DIAGNOSTIC 3407 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3408 panic("tlp_2114x_preinit: not IFM_AUTO"); 3409 if (sc->sc_nway_active == NULL) 3410 panic("tlp_2114x_preinit: nway_active NULL"); 3411 #endif 3412 tm = sc->sc_nway_active->ifm_aux; 3413 } 3414 sc->sc_opmode |= OPMODE_MBO | tm->tm_opmode; 3415 3416 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3417 } 3418 3419 /* 3420 * tlp_2114x_mii_preinit: 3421 * 3422 * Pre-init function shared by DECchip 21140, 21140A, 21142, and 21143. 3423 * This version is used by boards which only have MII and don't have 3424 * an ISV SROM. 3425 */ 3426 void 3427 tlp_2114x_mii_preinit(sc) 3428 struct tulip_softc *sc; 3429 { 3430 3431 /* 3432 * Always set the Must-Be-One bit, and Port Select (to select MII). 3433 * We'll never be called during a media change. 3434 */ 3435 sc->sc_opmode |= OPMODE_MBO|OPMODE_PS; 3436 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3437 } 3438 3439 /* 3440 * tlp_pnic_preinit: 3441 * 3442 * Pre-init function for the Lite-On 82c168 and 82c169. 3443 */ 3444 void 3445 tlp_pnic_preinit(sc) 3446 struct tulip_softc *sc; 3447 { 3448 3449 if (sc->sc_flags & TULIPF_HAS_MII) { 3450 /* 3451 * MII case: just set the port-select bit; we will never 3452 * be called during a media change. 3453 */ 3454 sc->sc_opmode |= OPMODE_PS; 3455 } else { 3456 /* 3457 * ENDEC/PCS/Nway mode; enable the Tx backoff counter. 3458 */ 3459 sc->sc_opmode |= OPMODE_PNIC_TBEN; 3460 } 3461 } 3462 3463 /* 3464 * tlp_dm9102_preinit: 3465 * 3466 * Pre-init function for the Davicom DM9102. 3467 */ 3468 void 3469 tlp_dm9102_preinit(sc) 3470 struct tulip_softc *sc; 3471 { 3472 3473 switch (sc->sc_chip) { 3474 case TULIP_CHIP_DM9102: 3475 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 3476 break; 3477 3478 case TULIP_CHIP_DM9102A: 3479 /* 3480 * XXX Figure out how to actually deal with the HomePNA 3481 * XXX portion of the DM9102A. 3482 */ 3483 sc->sc_opmode |= OPMODE_MBO|OPMODE_HBD; 3484 break; 3485 3486 default: 3487 /* Nothing. */ 3488 break; 3489 } 3490 3491 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 3492 } 3493 3494 /* 3495 * tlp_21140_reset: 3496 * 3497 * Issue a reset sequence on the 21140 via the GPIO facility. 3498 */ 3499 void 3500 tlp_21140_reset(sc) 3501 struct tulip_softc *sc; 3502 { 3503 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3504 struct tulip_21x4x_media *tm = ife->ifm_aux; 3505 int i; 3506 3507 /* First, set the direction on the GPIO pins. */ 3508 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 3509 3510 /* Now, issue the reset sequence. */ 3511 for (i = 0; i < tm->tm_reset_length; i++) { 3512 delay(10); 3513 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_reset_offset + i]); 3514 } 3515 3516 /* Now, issue the selection sequence. */ 3517 for (i = 0; i < tm->tm_gp_length; i++) { 3518 delay(10); 3519 TULIP_WRITE(sc, CSR_GPP, sc->sc_srom[tm->tm_gp_offset + i]); 3520 } 3521 3522 /* If there were no sequences, just lower the pins. */ 3523 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) 3524 TULIP_WRITE(sc, CSR_GPP, 0); 3525 } 3526 3527 /* 3528 * tlp_21142_reset: 3529 * 3530 * Issue a reset sequence on the 21142 via the GPIO facility. 3531 */ 3532 void 3533 tlp_21142_reset(sc) 3534 struct tulip_softc *sc; 3535 { 3536 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 3537 struct tulip_21x4x_media *tm = ife->ifm_aux; 3538 const u_int8_t *ncp; 3539 int i; 3540 3541 ncp = &sc->sc_srom[tm->tm_reset_offset]; 3542 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 3543 delay(10); 3544 TULIP_WRITE(sc, CSR_SIAGEN, 3545 TULIP_ROM_GETW(ncp, 0) << 16); 3546 } 3547 3548 ncp = &sc->sc_srom[tm->tm_gp_offset]; 3549 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 3550 delay(10); 3551 TULIP_WRITE(sc, CSR_SIAGEN, 3552 TULIP_ROM_GETW(ncp, 0) << 16); 3553 } 3554 3555 /* If there were no sequences, just lower the pins. */ 3556 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 3557 delay(10); 3558 TULIP_WRITE(sc, CSR_SIAGEN, 0); 3559 } 3560 } 3561 3562 /* 3563 * tlp_pmac_reset: 3564 * 3565 * Reset routine for Macronix chips. 3566 */ 3567 void 3568 tlp_pmac_reset(sc) 3569 struct tulip_softc *sc; 3570 { 3571 3572 switch (sc->sc_chip) { 3573 case TULIP_CHIP_82C115: 3574 case TULIP_CHIP_MX98715: 3575 case TULIP_CHIP_MX98715A: 3576 case TULIP_CHIP_MX98725: 3577 /* 3578 * Set the LED operating mode. This information is located 3579 * in the EEPROM at byte offset 0x77, per the MX98715A and 3580 * MX98725 application notes. 3581 */ 3582 TULIP_WRITE(sc, CSR_MIIROM, sc->sc_srom[0x77] << 24); 3583 break; 3584 case TULIP_CHIP_MX98715AEC_X: 3585 /* 3586 * Set the LED operating mode. This information is located 3587 * in the EEPROM at byte offset 0x76, per the MX98715AEC 3588 * application note. 3589 */ 3590 TULIP_WRITE(sc, CSR_MIIROM, ((0xf & sc->sc_srom[0x76]) << 28) 3591 | ((0xf0 & sc->sc_srom[0x76]) << 20)); 3592 break; 3593 3594 default: 3595 /* Nothing. */ 3596 break; 3597 } 3598 } 3599 3600 /* 3601 * tlp_dm9102_reset: 3602 * 3603 * Reset routine for the Davicom DM9102. 3604 */ 3605 void 3606 tlp_dm9102_reset(sc) 3607 struct tulip_softc *sc; 3608 { 3609 3610 TULIP_WRITE(sc, CSR_DM_PHYSTAT, DM_PHYSTAT_GEPC|DM_PHYSTAT_GPED); 3611 delay(100); 3612 TULIP_WRITE(sc, CSR_DM_PHYSTAT, 0); 3613 } 3614 3615 /***************************************************************************** 3616 * Chip/board-specific media switches. The ones here are ones that 3617 * are potentially common to multiple front-ends. 3618 *****************************************************************************/ 3619 3620 /* 3621 * This table is a common place for all sorts of media information, 3622 * keyed off of the SROM media code for that media. 3623 * 3624 * Note that we explicitly configure the 21142/21143 to always advertise 3625 * NWay capabilities when using the UTP port. 3626 * XXX Actually, we don't yet. 3627 */ 3628 const struct tulip_srom_to_ifmedia tulip_srom_to_ifmedia_table[] = { 3629 { TULIP_ROM_MB_MEDIA_TP, IFM_10_T, 0, 3630 "10baseT", 3631 0, 3632 { SIACONN_21040_10BASET, 3633 SIATXRX_21040_10BASET, 3634 SIAGEN_21040_10BASET }, 3635 3636 { SIACONN_21041_10BASET, 3637 SIATXRX_21041_10BASET, 3638 SIAGEN_21041_10BASET }, 3639 3640 { SIACONN_21142_10BASET, 3641 SIATXRX_21142_10BASET, 3642 SIAGEN_21142_10BASET } }, 3643 3644 { TULIP_ROM_MB_MEDIA_BNC, IFM_10_2, 0, 3645 "10base2", 3646 0, 3647 { 0, 3648 0, 3649 0 }, 3650 3651 { SIACONN_21041_BNC, 3652 SIATXRX_21041_BNC, 3653 SIAGEN_21041_BNC }, 3654 3655 { SIACONN_21142_BNC, 3656 SIATXRX_21142_BNC, 3657 SIAGEN_21142_BNC } }, 3658 3659 { TULIP_ROM_MB_MEDIA_AUI, IFM_10_5, 0, 3660 "10base5", 3661 0, 3662 { SIACONN_21040_AUI, 3663 SIATXRX_21040_AUI, 3664 SIAGEN_21040_AUI }, 3665 3666 { SIACONN_21041_AUI, 3667 SIATXRX_21041_AUI, 3668 SIAGEN_21041_AUI }, 3669 3670 { SIACONN_21142_AUI, 3671 SIATXRX_21142_AUI, 3672 SIAGEN_21142_AUI } }, 3673 3674 { TULIP_ROM_MB_MEDIA_100TX, IFM_100_TX, 0, 3675 "100baseTX", 3676 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3677 { 0, 3678 0, 3679 0 }, 3680 3681 { 0, 3682 0, 3683 0 }, 3684 3685 { 0, 3686 0, 3687 SIAGEN_ABM } }, 3688 3689 { TULIP_ROM_MB_MEDIA_TP_FDX, IFM_10_T, IFM_FDX, 3690 "10baseT-FDX", 3691 OPMODE_FD|OPMODE_HBD, 3692 { SIACONN_21040_10BASET_FDX, 3693 SIATXRX_21040_10BASET_FDX, 3694 SIAGEN_21040_10BASET_FDX }, 3695 3696 { SIACONN_21041_10BASET_FDX, 3697 SIATXRX_21041_10BASET_FDX, 3698 SIAGEN_21041_10BASET_FDX }, 3699 3700 { SIACONN_21142_10BASET_FDX, 3701 SIATXRX_21142_10BASET_FDX, 3702 SIAGEN_21142_10BASET_FDX } }, 3703 3704 { TULIP_ROM_MB_MEDIA_100TX_FDX, IFM_100_TX, IFM_FDX, 3705 "100baseTX-FDX", 3706 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_FD|OPMODE_HBD, 3707 { 0, 3708 0, 3709 0 }, 3710 3711 { 0, 3712 0, 3713 0 }, 3714 3715 { 0, 3716 0, 3717 SIAGEN_ABM } }, 3718 3719 { TULIP_ROM_MB_MEDIA_100T4, IFM_100_T4, 0, 3720 "100baseT4", 3721 OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD, 3722 { 0, 3723 0, 3724 0 }, 3725 3726 { 0, 3727 0, 3728 0 }, 3729 3730 { 0, 3731 0, 3732 SIAGEN_ABM } }, 3733 3734 { TULIP_ROM_MB_MEDIA_100FX, IFM_100_FX, 0, 3735 "100baseFX", 3736 OPMODE_PS|OPMODE_PCS|OPMODE_HBD, 3737 { 0, 3738 0, 3739 0 }, 3740 3741 { 0, 3742 0, 3743 0 }, 3744 3745 { 0, 3746 0, 3747 SIAGEN_ABM } }, 3748 3749 { TULIP_ROM_MB_MEDIA_100FX_FDX, IFM_100_FX, IFM_FDX, 3750 "100baseFX-FDX", 3751 OPMODE_PS|OPMODE_PCS|OPMODE_FD|OPMODE_HBD, 3752 { 0, 3753 0, 3754 0 }, 3755 3756 { 0, 3757 0, 3758 0 }, 3759 3760 { 0, 3761 0, 3762 SIAGEN_ABM } }, 3763 3764 { 0, 0, 0, 3765 NULL, 3766 0, 3767 { 0, 3768 0, 3769 0 }, 3770 3771 { 0, 3772 0, 3773 0 }, 3774 3775 { 0, 3776 0, 3777 0 } }, 3778 }; 3779 3780 const struct tulip_srom_to_ifmedia *tlp_srom_to_ifmedia __P((u_int8_t)); 3781 void tlp_srom_media_info __P((struct tulip_softc *, 3782 const struct tulip_srom_to_ifmedia *, struct tulip_21x4x_media *)); 3783 void tlp_add_srom_media __P((struct tulip_softc *, int, 3784 void (*)(struct tulip_softc *, struct ifmediareq *), 3785 int (*)(struct tulip_softc *), const u_int8_t *, int)); 3786 void tlp_print_media __P((struct tulip_softc *)); 3787 void tlp_nway_activate __P((struct tulip_softc *, int)); 3788 void tlp_get_minst __P((struct tulip_softc *)); 3789 3790 const struct tulip_srom_to_ifmedia * 3791 tlp_srom_to_ifmedia(sm) 3792 u_int8_t sm; 3793 { 3794 const struct tulip_srom_to_ifmedia *tsti; 3795 3796 for (tsti = tulip_srom_to_ifmedia_table; 3797 tsti->tsti_name != NULL; tsti++) { 3798 if (tsti->tsti_srom == sm) 3799 return (tsti); 3800 } 3801 3802 return (NULL); 3803 } 3804 3805 void 3806 tlp_srom_media_info(sc, tsti, tm) 3807 struct tulip_softc *sc; 3808 const struct tulip_srom_to_ifmedia *tsti; 3809 struct tulip_21x4x_media *tm; 3810 { 3811 3812 tm->tm_name = tsti->tsti_name; 3813 tm->tm_opmode = tsti->tsti_opmode; 3814 3815 switch (sc->sc_chip) { 3816 case TULIP_CHIP_DE425: 3817 case TULIP_CHIP_21040: 3818 tm->tm_sia = tsti->tsti_21040; /* struct assignment */ 3819 break; 3820 3821 case TULIP_CHIP_21041: 3822 tm->tm_sia = tsti->tsti_21041; /* struct assignment */ 3823 break; 3824 3825 case TULIP_CHIP_21142: 3826 case TULIP_CHIP_21143: 3827 case TULIP_CHIP_82C115: 3828 case TULIP_CHIP_MX98715: 3829 case TULIP_CHIP_MX98715A: 3830 case TULIP_CHIP_MX98715AEC_X: 3831 case TULIP_CHIP_MX98725: 3832 tm->tm_sia = tsti->tsti_21142; /* struct assignment */ 3833 break; 3834 3835 default: 3836 /* Nothing. */ 3837 break; 3838 } 3839 } 3840 3841 void 3842 tlp_add_srom_media(sc, type, get, set, list, cnt) 3843 struct tulip_softc *sc; 3844 int type; 3845 void (*get) __P((struct tulip_softc *, struct ifmediareq *)); 3846 int (*set) __P((struct tulip_softc *)); 3847 const u_int8_t *list; 3848 int cnt; 3849 { 3850 struct tulip_21x4x_media *tm; 3851 const struct tulip_srom_to_ifmedia *tsti; 3852 int i; 3853 3854 for (i = 0; i < cnt; i++) { 3855 tsti = tlp_srom_to_ifmedia(list[i]); 3856 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 3857 memset(tm, 0, sizeof(*tm)); 3858 tlp_srom_media_info(sc, tsti, tm); 3859 tm->tm_type = type; 3860 tm->tm_get = get; 3861 tm->tm_set = set; 3862 3863 ifmedia_add(&sc->sc_mii.mii_media, 3864 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 3865 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 3866 } 3867 } 3868 3869 void 3870 tlp_print_media(sc) 3871 struct tulip_softc *sc; 3872 { 3873 struct ifmedia_entry *ife; 3874 struct tulip_21x4x_media *tm; 3875 const char *sep = ""; 3876 3877 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 3878 3879 printf("%s: ", sc->sc_dev.dv_xname); 3880 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 3881 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 3882 tm = ife->ifm_aux; 3883 if (tm == NULL) { 3884 #ifdef DIAGNOSTIC 3885 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 3886 panic("tlp_print_media"); 3887 #endif 3888 PRINT("auto"); 3889 } else if (tm->tm_type != TULIP_ROM_MB_21140_MII && 3890 tm->tm_type != TULIP_ROM_MB_21142_MII) { 3891 PRINT(tm->tm_name); 3892 } 3893 } 3894 printf("\n"); 3895 3896 #undef PRINT 3897 } 3898 3899 void 3900 tlp_nway_activate(sc, media) 3901 struct tulip_softc *sc; 3902 int media; 3903 { 3904 struct ifmedia_entry *ife; 3905 3906 ife = ifmedia_match(&sc->sc_mii.mii_media, media, 0); 3907 #ifdef DIAGNOSTIC 3908 if (ife == NULL) 3909 panic("tlp_nway_activate"); 3910 #endif 3911 sc->sc_nway_active = ife; 3912 } 3913 3914 void 3915 tlp_get_minst(sc) 3916 struct tulip_softc *sc; 3917 { 3918 3919 if ((sc->sc_media_seen & 3920 ~((1 << TULIP_ROM_MB_21140_MII) | 3921 (1 << TULIP_ROM_MB_21142_MII))) == 0) { 3922 /* 3923 * We have not yet seen any SIA/SYM media (but are 3924 * about to; that's why we're called!), so assign 3925 * the current media instance to be the `internal media' 3926 * instance, and advance it so any MII media gets a 3927 * fresh one (used to selecting/isolating a PHY). 3928 */ 3929 sc->sc_tlp_minst = sc->sc_mii.mii_instance++; 3930 } 3931 } 3932 3933 /* 3934 * SIA Utility functions. 3935 */ 3936 void tlp_sia_update_link __P((struct tulip_softc *)); 3937 void tlp_sia_get __P((struct tulip_softc *, struct ifmediareq *)); 3938 int tlp_sia_set __P((struct tulip_softc *)); 3939 void tlp_sia_fixup __P((struct tulip_softc *)); 3940 3941 void 3942 tlp_sia_update_link(sc) 3943 struct tulip_softc *sc; 3944 { 3945 struct ifmedia_entry *ife; 3946 struct tulip_21x4x_media *tm; 3947 u_int32_t siastat; 3948 3949 ife = TULIP_CURRENT_MEDIA(sc); 3950 tm = ife->ifm_aux; 3951 3952 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 3953 3954 siastat = TULIP_READ(sc, CSR_SIASTAT); 3955 3956 /* 3957 * Note that when we do SIA link tests, we are assuming that 3958 * the chip is really in the mode that the current media setting 3959 * reflects. If we're not, then the link tests will not be 3960 * accurate! 3961 */ 3962 switch (IFM_SUBTYPE(ife->ifm_media)) { 3963 case IFM_10_T: 3964 sc->sc_flags |= TULIPF_LINK_VALID; 3965 if ((siastat & SIASTAT_LS10) == 0) 3966 sc->sc_flags |= TULIPF_LINK_UP; 3967 break; 3968 3969 case IFM_100_TX: 3970 case IFM_100_T4: 3971 sc->sc_flags |= TULIPF_LINK_VALID; 3972 if ((siastat & SIASTAT_LS100) == 0) 3973 sc->sc_flags |= TULIPF_LINK_UP; 3974 break; 3975 } 3976 3977 switch (sc->sc_chip) { 3978 case TULIP_CHIP_21142: 3979 case TULIP_CHIP_21143: 3980 /* 3981 * On these chips, we can tell more information about 3982 * AUI/BNC. Note that the AUI/BNC selection is made 3983 * in a different register; for our purpose, it's all 3984 * AUI. 3985 */ 3986 switch (IFM_SUBTYPE(ife->ifm_media)) { 3987 case IFM_10_2: 3988 case IFM_10_5: 3989 sc->sc_flags |= TULIPF_LINK_VALID; 3990 if (siastat & SIASTAT_ARA) { 3991 TULIP_WRITE(sc, CSR_SIASTAT, SIASTAT_ARA); 3992 sc->sc_flags |= TULIPF_LINK_UP; 3993 } 3994 break; 3995 3996 default: 3997 /* 3998 * If we're SYM media and can detect the link 3999 * via the GPIO facility, prefer that status 4000 * over LS100. 4001 */ 4002 if (tm->tm_type == TULIP_ROM_MB_21143_SYM && 4003 tm->tm_actmask != 0) { 4004 sc->sc_flags = (sc->sc_flags & 4005 ~TULIPF_LINK_UP) | TULIPF_LINK_VALID; 4006 if (TULIP_ISSET(sc, CSR_SIAGEN, 4007 tm->tm_actmask) == tm->tm_actdata) 4008 sc->sc_flags |= TULIPF_LINK_UP; 4009 } 4010 } 4011 break; 4012 4013 default: 4014 /* Nothing. */ 4015 break; 4016 } 4017 } 4018 4019 void 4020 tlp_sia_get(sc, ifmr) 4021 struct tulip_softc *sc; 4022 struct ifmediareq *ifmr; 4023 { 4024 struct ifmedia_entry *ife; 4025 4026 ifmr->ifm_status = 0; 4027 4028 tlp_sia_update_link(sc); 4029 4030 ife = TULIP_CURRENT_MEDIA(sc); 4031 4032 if (sc->sc_flags & TULIPF_LINK_VALID) 4033 ifmr->ifm_status |= IFM_AVALID; 4034 if (sc->sc_flags & TULIPF_LINK_UP) 4035 ifmr->ifm_status |= IFM_ACTIVE; 4036 ifmr->ifm_active = ife->ifm_media; 4037 } 4038 4039 void 4040 tlp_sia_fixup(sc) 4041 struct tulip_softc *sc; 4042 { 4043 struct ifmedia_entry *ife; 4044 struct tulip_21x4x_media *tm; 4045 u_int32_t siaconn, siatxrx, siagen; 4046 4047 switch (sc->sc_chip) { 4048 case TULIP_CHIP_82C115: 4049 case TULIP_CHIP_MX98713A: 4050 case TULIP_CHIP_MX98715: 4051 case TULIP_CHIP_MX98715A: 4052 case TULIP_CHIP_MX98715AEC_X: 4053 case TULIP_CHIP_MX98725: 4054 siaconn = PMAC_SIACONN_MASK; 4055 siatxrx = PMAC_SIATXRX_MASK; 4056 siagen = PMAC_SIAGEN_MASK; 4057 break; 4058 4059 default: 4060 /* No fixups required on any other chips. */ 4061 return; 4062 } 4063 4064 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4065 ife != NULL; ife = TAILQ_NEXT(ife, ifm_list)) { 4066 tm = ife->ifm_aux; 4067 if (tm == NULL) 4068 continue; 4069 4070 tm->tm_siaconn &= siaconn; 4071 tm->tm_siatxrx &= siatxrx; 4072 tm->tm_siagen &= siagen; 4073 } 4074 } 4075 4076 int 4077 tlp_sia_set(sc) 4078 struct tulip_softc *sc; 4079 { 4080 struct ifmedia_entry *ife; 4081 struct tulip_21x4x_media *tm; 4082 4083 ife = TULIP_CURRENT_MEDIA(sc); 4084 tm = ife->ifm_aux; 4085 4086 /* 4087 * XXX This appears to be necessary on a bunch of the clone chips. 4088 */ 4089 delay(20000); 4090 4091 /* 4092 * Idle the chip. 4093 */ 4094 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4095 4096 /* 4097 * Program the SIA. It's important to write in this order, 4098 * resetting the SIA first. 4099 */ 4100 TULIP_WRITE(sc, CSR_SIACONN, 0); /* SRL bit clear */ 4101 delay(1000); 4102 4103 TULIP_WRITE(sc, CSR_SIATXRX, tm->tm_siatxrx); 4104 4105 switch (sc->sc_chip) { 4106 case TULIP_CHIP_21142: 4107 case TULIP_CHIP_21143: 4108 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpctl); 4109 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen | tm->tm_gpdata); 4110 break; 4111 default: 4112 TULIP_WRITE(sc, CSR_SIAGEN, tm->tm_siagen); 4113 } 4114 4115 TULIP_WRITE(sc, CSR_SIACONN, tm->tm_siaconn); 4116 4117 /* 4118 * Set the OPMODE bits for this media and write OPMODE. 4119 * This will resume the transmit and receive processes. 4120 */ 4121 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4122 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4123 4124 return (0); 4125 } 4126 4127 /* 4128 * 21140 GPIO utility functions. 4129 */ 4130 void tlp_21140_gpio_update_link __P((struct tulip_softc *)); 4131 void tlp_21140_gpio_get __P((struct tulip_softc *sc, 4132 struct ifmediareq *ifmr)); 4133 int tlp_21140_gpio_set __P((struct tulip_softc *sc)); 4134 4135 void 4136 tlp_21140_gpio_update_link(sc) 4137 struct tulip_softc *sc; 4138 { 4139 struct ifmedia_entry *ife; 4140 struct tulip_21x4x_media *tm; 4141 4142 ife = TULIP_CURRENT_MEDIA(sc); 4143 tm = ife->ifm_aux; 4144 4145 sc->sc_flags &= ~(TULIPF_LINK_UP|TULIPF_LINK_VALID); 4146 4147 if (tm->tm_actmask != 0) { 4148 sc->sc_flags |= TULIPF_LINK_VALID; 4149 if (TULIP_ISSET(sc, CSR_GPP, tm->tm_actmask) == 4150 tm->tm_actdata) 4151 sc->sc_flags |= TULIPF_LINK_UP; 4152 } 4153 } 4154 4155 void 4156 tlp_21140_gpio_get(sc, ifmr) 4157 struct tulip_softc *sc; 4158 struct ifmediareq *ifmr; 4159 { 4160 struct ifmedia_entry *ife; 4161 4162 ifmr->ifm_status = 0; 4163 4164 tlp_21140_gpio_update_link(sc); 4165 4166 ife = TULIP_CURRENT_MEDIA(sc); 4167 4168 if (sc->sc_flags & TULIPF_LINK_VALID) 4169 ifmr->ifm_status |= IFM_AVALID; 4170 if (sc->sc_flags & TULIPF_LINK_UP) 4171 ifmr->ifm_status |= IFM_ACTIVE; 4172 ifmr->ifm_active = ife->ifm_media; 4173 } 4174 4175 int 4176 tlp_21140_gpio_set(sc) 4177 struct tulip_softc *sc; 4178 { 4179 struct ifmedia_entry *ife; 4180 struct tulip_21x4x_media *tm; 4181 4182 ife = TULIP_CURRENT_MEDIA(sc); 4183 tm = ife->ifm_aux; 4184 4185 /* 4186 * Idle the chip. 4187 */ 4188 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 4189 4190 /* 4191 * Set the GPIO pins for this media, to flip any 4192 * relays, etc. 4193 */ 4194 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4195 delay(10); 4196 TULIP_WRITE(sc, CSR_GPP, tm->tm_gpdata); 4197 4198 /* 4199 * Set the OPMODE bits for this media and write OPMODE. 4200 * This will resume the transmit and receive processes. 4201 */ 4202 sc->sc_opmode = (sc->sc_opmode & ~OPMODE_MEDIA_BITS) | tm->tm_opmode; 4203 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 4204 4205 return (0); 4206 } 4207 4208 /* 4209 * 21040 and 21041 media switches. 4210 */ 4211 void tlp_21040_tmsw_init __P((struct tulip_softc *)); 4212 void tlp_21040_tp_tmsw_init __P((struct tulip_softc *)); 4213 void tlp_21040_auibnc_tmsw_init __P((struct tulip_softc *)); 4214 void tlp_21041_tmsw_init __P((struct tulip_softc *)); 4215 4216 const struct tulip_mediasw tlp_21040_mediasw = { 4217 tlp_21040_tmsw_init, tlp_sia_get, tlp_sia_set 4218 }; 4219 4220 const struct tulip_mediasw tlp_21040_tp_mediasw = { 4221 tlp_21040_tp_tmsw_init, tlp_sia_get, tlp_sia_set 4222 }; 4223 4224 const struct tulip_mediasw tlp_21040_auibnc_mediasw = { 4225 tlp_21040_auibnc_tmsw_init, tlp_sia_get, tlp_sia_set 4226 }; 4227 4228 const struct tulip_mediasw tlp_21041_mediasw = { 4229 tlp_21041_tmsw_init, tlp_sia_get, tlp_sia_set 4230 }; 4231 4232 4233 void 4234 tlp_21040_tmsw_init(sc) 4235 struct tulip_softc *sc; 4236 { 4237 static const u_int8_t media[] = { 4238 TULIP_ROM_MB_MEDIA_TP, 4239 TULIP_ROM_MB_MEDIA_TP_FDX, 4240 TULIP_ROM_MB_MEDIA_AUI, 4241 }; 4242 struct tulip_21x4x_media *tm; 4243 4244 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4245 tlp_mediastatus); 4246 4247 tlp_add_srom_media(sc, 0, NULL, NULL, media, 3); 4248 4249 /* 4250 * No SROM type for External SIA. 4251 */ 4252 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4253 memset(tm, 0, sizeof(*tm)); 4254 tm->tm_name = "manual"; 4255 tm->tm_opmode = 0; 4256 tm->tm_siaconn = SIACONN_21040_EXTSIA; 4257 tm->tm_siatxrx = SIATXRX_21040_EXTSIA; 4258 tm->tm_siagen = SIAGEN_21040_EXTSIA; 4259 ifmedia_add(&sc->sc_mii.mii_media, 4260 IFM_MAKEWORD(IFM_ETHER, IFM_MANUAL, 0, sc->sc_tlp_minst), 0, tm); 4261 4262 /* 4263 * XXX Autosense not yet supported. 4264 */ 4265 4266 /* XXX This should be auto-sense. */ 4267 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4268 4269 tlp_print_media(sc); 4270 } 4271 4272 void 4273 tlp_21040_tp_tmsw_init(sc) 4274 struct tulip_softc *sc; 4275 { 4276 static const u_int8_t media[] = { 4277 TULIP_ROM_MB_MEDIA_TP, 4278 TULIP_ROM_MB_MEDIA_TP_FDX, 4279 }; 4280 4281 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4282 tlp_mediastatus); 4283 4284 tlp_add_srom_media(sc, 0, NULL, NULL, media, 2); 4285 4286 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4287 4288 tlp_print_media(sc); 4289 } 4290 4291 void 4292 tlp_21040_auibnc_tmsw_init(sc) 4293 struct tulip_softc *sc; 4294 { 4295 static const u_int8_t media[] = { 4296 TULIP_ROM_MB_MEDIA_AUI, 4297 }; 4298 4299 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4300 tlp_mediastatus); 4301 4302 tlp_add_srom_media(sc, 0, NULL, NULL, media, 1); 4303 4304 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5); 4305 4306 tlp_print_media(sc); 4307 } 4308 4309 void 4310 tlp_21041_tmsw_init(sc) 4311 struct tulip_softc *sc; 4312 { 4313 static const u_int8_t media[] = { 4314 TULIP_ROM_MB_MEDIA_TP, 4315 TULIP_ROM_MB_MEDIA_TP_FDX, 4316 TULIP_ROM_MB_MEDIA_BNC, 4317 TULIP_ROM_MB_MEDIA_AUI, 4318 }; 4319 int i, defmedia, devcnt, leaf_offset, mb_offset, m_cnt; 4320 const struct tulip_srom_to_ifmedia *tsti; 4321 struct tulip_21x4x_media *tm; 4322 u_int16_t romdef; 4323 u_int8_t mb; 4324 4325 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 4326 tlp_mediastatus); 4327 4328 if (tlp_isv_srom(sc->sc_srom) == 0) { 4329 not_isv_srom: 4330 /* 4331 * If we have a board without the standard 21041 SROM format, 4332 * we just assume all media are present and try and pick a 4333 * reasonable default. 4334 */ 4335 tlp_add_srom_media(sc, 0, NULL, NULL, media, 4); 4336 4337 /* 4338 * XXX Autosense not yet supported. 4339 */ 4340 4341 /* XXX This should be auto-sense. */ 4342 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 4343 4344 tlp_print_media(sc); 4345 return; 4346 } 4347 4348 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4349 for (i = 0; i < devcnt; i++) { 4350 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4351 break; 4352 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4353 sc->sc_devno) 4354 break; 4355 } 4356 4357 if (i == devcnt) 4358 goto not_isv_srom; 4359 4360 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4361 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4362 mb_offset = leaf_offset + TULIP_ROM_IL_MEDIAn_BLOCK_BASE; 4363 m_cnt = sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4364 4365 for (; m_cnt != 0; 4366 m_cnt--, mb_offset += TULIP_ROM_MB_SIZE(mb)) { 4367 mb = sc->sc_srom[mb_offset]; 4368 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4369 memset(tm, 0, sizeof(*tm)); 4370 switch (mb & TULIP_ROM_MB_MEDIA_CODE) { 4371 case TULIP_ROM_MB_MEDIA_TP_FDX: 4372 case TULIP_ROM_MB_MEDIA_TP: 4373 case TULIP_ROM_MB_MEDIA_BNC: 4374 case TULIP_ROM_MB_MEDIA_AUI: 4375 tsti = tlp_srom_to_ifmedia(mb & 4376 TULIP_ROM_MB_MEDIA_CODE); 4377 4378 tlp_srom_media_info(sc, tsti, tm); 4379 4380 /* 4381 * Override our default SIA settings if the 4382 * SROM contains its own. 4383 */ 4384 if (mb & TULIP_ROM_MB_EXT) { 4385 tm->tm_siaconn = TULIP_ROM_GETW(sc->sc_srom, 4386 mb_offset + TULIP_ROM_MB_CSR13); 4387 tm->tm_siatxrx = TULIP_ROM_GETW(sc->sc_srom, 4388 mb_offset + TULIP_ROM_MB_CSR14); 4389 tm->tm_siagen = TULIP_ROM_GETW(sc->sc_srom, 4390 mb_offset + TULIP_ROM_MB_CSR15); 4391 } 4392 4393 ifmedia_add(&sc->sc_mii.mii_media, 4394 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4395 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4396 break; 4397 4398 default: 4399 printf("%s: unknown media code 0x%02x\n", 4400 sc->sc_dev.dv_xname, 4401 mb & TULIP_ROM_MB_MEDIA_CODE); 4402 free(tm, M_DEVBUF); 4403 } 4404 } 4405 4406 /* 4407 * XXX Autosense not yet supported. 4408 */ 4409 4410 romdef = TULIP_ROM_GETW(sc->sc_srom, leaf_offset + 4411 TULIP_ROM_IL_SELECT_CONN_TYPE); 4412 switch (romdef) { 4413 case SELECT_CONN_TYPE_TP: 4414 case SELECT_CONN_TYPE_TP_AUTONEG: 4415 case SELECT_CONN_TYPE_TP_NOLINKPASS: 4416 defmedia = IFM_ETHER|IFM_10_T; 4417 break; 4418 4419 case SELECT_CONN_TYPE_TP_FDX: 4420 defmedia = IFM_ETHER|IFM_10_T|IFM_FDX; 4421 break; 4422 4423 case SELECT_CONN_TYPE_BNC: 4424 defmedia = IFM_ETHER|IFM_10_2; 4425 break; 4426 4427 case SELECT_CONN_TYPE_AUI: 4428 defmedia = IFM_ETHER|IFM_10_5; 4429 break; 4430 #if 0 /* XXX */ 4431 case SELECT_CONN_TYPE_ASENSE: 4432 case SELECT_CONN_TYPE_ASENSE_AUTONEG: 4433 defmedia = IFM_ETHER|IFM_AUTO; 4434 break; 4435 #endif 4436 default: 4437 defmedia = 0; 4438 } 4439 4440 if (defmedia == 0) { 4441 /* 4442 * XXX We should default to auto-sense. 4443 */ 4444 defmedia = IFM_ETHER|IFM_10_T; 4445 } 4446 4447 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4448 4449 tlp_print_media(sc); 4450 } 4451 4452 /* 4453 * DECchip 2114x ISV media switch. 4454 */ 4455 void tlp_2114x_isv_tmsw_init __P((struct tulip_softc *)); 4456 void tlp_2114x_isv_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 4457 int tlp_2114x_isv_tmsw_set __P((struct tulip_softc *)); 4458 4459 const struct tulip_mediasw tlp_2114x_isv_mediasw = { 4460 tlp_2114x_isv_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 4461 }; 4462 4463 void 4464 tlp_2114x_isv_tmsw_init(sc) 4465 struct tulip_softc *sc; 4466 { 4467 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 4468 struct ifmedia_entry *ife; 4469 struct mii_softc *phy; 4470 struct tulip_21x4x_media *tm; 4471 const struct tulip_srom_to_ifmedia *tsti; 4472 int i, devcnt, leaf_offset, m_cnt, type, length; 4473 int defmedia, miidef; 4474 u_int16_t word; 4475 u_int8_t *cp, *ncp; 4476 4477 defmedia = miidef = 0; 4478 4479 sc->sc_mii.mii_ifp = ifp; 4480 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 4481 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 4482 sc->sc_mii.mii_statchg = sc->sc_statchg; 4483 4484 /* 4485 * Ignore `instance'; we may get a mixture of SIA and MII 4486 * media, and `instance' is used to isolate or select the 4487 * PHY on the MII as appropriate. Note that duplicate media 4488 * are disallowed, so ignoring `instance' is safe. 4489 */ 4490 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, tlp_mediachange, 4491 tlp_mediastatus); 4492 4493 devcnt = sc->sc_srom[TULIP_ROM_CHIP_COUNT]; 4494 for (i = 0; i < devcnt; i++) { 4495 if (sc->sc_srom[TULIP_ROM_CHIP_COUNT] == 1) 4496 break; 4497 if (sc->sc_srom[TULIP_ROM_CHIPn_DEVICE_NUMBER(i)] == 4498 sc->sc_devno) 4499 break; 4500 } 4501 4502 if (i == devcnt) { 4503 printf("%s: unable to locate info leaf in SROM\n", 4504 sc->sc_dev.dv_xname); 4505 return; 4506 } 4507 4508 leaf_offset = TULIP_ROM_GETW(sc->sc_srom, 4509 TULIP_ROM_CHIPn_INFO_LEAF_OFFSET(i)); 4510 4511 /* XXX SELECT CONN TYPE */ 4512 4513 cp = &sc->sc_srom[leaf_offset + TULIP_ROM_IL_MEDIA_COUNT]; 4514 4515 /* 4516 * On some chips, the first thing in the Info Leaf is the 4517 * GPIO pin direction data. 4518 */ 4519 switch (sc->sc_chip) { 4520 case TULIP_CHIP_21140: 4521 case TULIP_CHIP_21140A: 4522 case TULIP_CHIP_MX98713: 4523 case TULIP_CHIP_AX88140: 4524 case TULIP_CHIP_AX88141: 4525 sc->sc_gp_dir = *cp++; 4526 break; 4527 4528 default: 4529 /* Nothing. */ 4530 break; 4531 } 4532 4533 /* Get the media count. */ 4534 m_cnt = *cp++; 4535 4536 for (; m_cnt != 0; cp = ncp, m_cnt--) { 4537 /* 4538 * Determine the type and length of this media block. 4539 */ 4540 if ((*cp & 0x80) == 0) { 4541 length = 4; 4542 type = TULIP_ROM_MB_21140_GPR; 4543 } else { 4544 length = (*cp++ & 0x7f) - 1; 4545 type = *cp++ & 0x3f; 4546 } 4547 4548 /* Compute the start of the next block. */ 4549 ncp = cp + length; 4550 4551 /* Now, parse the block. */ 4552 switch (type) { 4553 case TULIP_ROM_MB_21140_GPR: 4554 tlp_get_minst(sc); 4555 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_GPR; 4556 4557 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4558 memset(tm, 0, sizeof(*tm)); 4559 4560 tm->tm_type = TULIP_ROM_MB_21140_GPR; 4561 tm->tm_get = tlp_21140_gpio_get; 4562 tm->tm_set = tlp_21140_gpio_set; 4563 4564 /* First is the media type code. */ 4565 tsti = tlp_srom_to_ifmedia(cp[0] & 4566 TULIP_ROM_MB_MEDIA_CODE); 4567 if (tsti == NULL) { 4568 /* Invalid media code. */ 4569 free(tm, M_DEVBUF); 4570 break; 4571 } 4572 4573 /* Get defaults. */ 4574 tlp_srom_media_info(sc, tsti, tm); 4575 4576 /* Next is any GPIO info for this media. */ 4577 tm->tm_gpdata = cp[1]; 4578 4579 /* 4580 * Next is a word containing OPMODE information 4581 * and info on how to detect if this media is 4582 * active. 4583 */ 4584 word = TULIP_ROM_GETW(cp, 2); 4585 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4586 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4587 tm->tm_actmask = 4588 TULIP_ROM_MB_BITPOS(word); 4589 tm->tm_actdata = 4590 (word & TULIP_ROM_MB_POLARITY) ? 4591 0 : tm->tm_actmask; 4592 } 4593 4594 ifmedia_add(&sc->sc_mii.mii_media, 4595 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4596 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4597 break; 4598 4599 case TULIP_ROM_MB_21140_MII: 4600 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21140_MII; 4601 4602 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4603 memset(tm, 0, sizeof(*tm)); 4604 4605 tm->tm_type = TULIP_ROM_MB_21140_MII; 4606 tm->tm_get = tlp_mii_getmedia; 4607 tm->tm_set = tlp_mii_setmedia; 4608 tm->tm_opmode = OPMODE_PS; 4609 4610 if (sc->sc_reset == NULL) 4611 sc->sc_reset = tlp_21140_reset; 4612 4613 /* First is the PHY number. */ 4614 tm->tm_phyno = *cp++; 4615 4616 /* Next is the MII select sequence length and offset. */ 4617 tm->tm_gp_length = *cp++; 4618 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4619 cp += tm->tm_gp_length; 4620 4621 /* Next is the MII reset sequence length and offset. */ 4622 tm->tm_reset_length = *cp++; 4623 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4624 cp += tm->tm_reset_length; 4625 4626 /* 4627 * The following items are left in the media block 4628 * that we don't particularly care about: 4629 * 4630 * capabilities W 4631 * advertisement W 4632 * full duplex W 4633 * tx threshold W 4634 * 4635 * These appear to be bits in the PHY registers, 4636 * which our MII code handles on its own. 4637 */ 4638 4639 /* 4640 * Before we probe the MII bus, we need to reset 4641 * it and issue the selection sequence. 4642 */ 4643 4644 /* Set the direction of the pins... */ 4645 TULIP_WRITE(sc, CSR_GPP, GPP_GPC|sc->sc_gp_dir); 4646 4647 for (i = 0; i < tm->tm_reset_length; i++) { 4648 delay(10); 4649 TULIP_WRITE(sc, CSR_GPP, 4650 sc->sc_srom[tm->tm_reset_offset + i]); 4651 } 4652 4653 for (i = 0; i < tm->tm_gp_length; i++) { 4654 delay(10); 4655 TULIP_WRITE(sc, CSR_GPP, 4656 sc->sc_srom[tm->tm_gp_offset + i]); 4657 } 4658 4659 /* If there were no sequences, just lower the pins. */ 4660 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4661 delay(10); 4662 TULIP_WRITE(sc, CSR_GPP, 0); 4663 } 4664 4665 /* 4666 * Now, probe the MII for the PHY. Note, we know 4667 * the location of the PHY on the bus, but we don't 4668 * particularly care; the MII code just likes to 4669 * search the whole thing anyhow. 4670 */ 4671 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4672 MII_PHY_ANY, tm->tm_phyno, 0); 4673 4674 /* 4675 * Now, search for the PHY we hopefully just 4676 * configured. If it's not configured into the 4677 * kernel, we lose. The PHY's default media always 4678 * takes priority. 4679 */ 4680 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4681 phy != NULL; 4682 phy = LIST_NEXT(phy, mii_list)) 4683 if (phy->mii_offset == tm->tm_phyno) 4684 break; 4685 if (phy == NULL) { 4686 printf("%s: unable to configure MII\n", 4687 sc->sc_dev.dv_xname); 4688 break; 4689 } 4690 4691 sc->sc_flags |= TULIPF_HAS_MII; 4692 sc->sc_tick = tlp_mii_tick; 4693 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4694 phy->mii_inst); 4695 4696 /* 4697 * Okay, now that we've found the PHY and the MII 4698 * layer has added all of the media associated 4699 * with that PHY, we need to traverse the media 4700 * list, and add our `tm' to each entry's `aux' 4701 * pointer. 4702 * 4703 * We do this by looking for media with our 4704 * PHY's `instance'. 4705 */ 4706 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4707 ife != NULL; 4708 ife = TAILQ_NEXT(ife, ifm_list)) { 4709 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4710 continue; 4711 ife->ifm_aux = tm; 4712 } 4713 break; 4714 4715 case TULIP_ROM_MB_21142_SIA: 4716 tlp_get_minst(sc); 4717 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_SIA; 4718 4719 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4720 memset(tm, 0, sizeof(*tm)); 4721 4722 tm->tm_type = TULIP_ROM_MB_21142_SIA; 4723 tm->tm_get = tlp_sia_get; 4724 tm->tm_set = tlp_sia_set; 4725 4726 /* First is the media type code. */ 4727 tsti = tlp_srom_to_ifmedia(cp[0] & 4728 TULIP_ROM_MB_MEDIA_CODE); 4729 if (tsti == NULL) { 4730 /* Invalid media code. */ 4731 free(tm, M_DEVBUF); 4732 break; 4733 } 4734 4735 /* Get defaults. */ 4736 tlp_srom_media_info(sc, tsti, tm); 4737 4738 /* 4739 * Override our default SIA settings if the 4740 * SROM contains its own. 4741 */ 4742 if (cp[0] & 0x40) { 4743 tm->tm_siaconn = TULIP_ROM_GETW(cp, 1); 4744 tm->tm_siatxrx = TULIP_ROM_GETW(cp, 3); 4745 tm->tm_siagen = TULIP_ROM_GETW(cp, 5); 4746 cp += 7; 4747 } else 4748 cp++; 4749 4750 /* Next is GPIO control/data. */ 4751 tm->tm_gpctl = TULIP_ROM_GETW(cp, 0); 4752 tm->tm_gpdata = TULIP_ROM_GETW(cp, 2); 4753 4754 ifmedia_add(&sc->sc_mii.mii_media, 4755 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4756 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4757 break; 4758 4759 case TULIP_ROM_MB_21142_MII: 4760 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21142_MII; 4761 4762 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4763 memset(tm, 0, sizeof(*tm)); 4764 4765 tm->tm_type = TULIP_ROM_MB_21142_MII; 4766 tm->tm_get = tlp_mii_getmedia; 4767 tm->tm_set = tlp_mii_setmedia; 4768 tm->tm_opmode = OPMODE_PS; 4769 4770 if (sc->sc_reset == NULL) 4771 sc->sc_reset = tlp_21142_reset; 4772 4773 /* First is the PHY number. */ 4774 tm->tm_phyno = *cp++; 4775 4776 /* Next is the MII select sequence length and offset. */ 4777 tm->tm_gp_length = *cp++; 4778 tm->tm_gp_offset = cp - &sc->sc_srom[0]; 4779 cp += tm->tm_gp_length * 2; 4780 4781 /* Next is the MII reset sequence length and offset. */ 4782 tm->tm_reset_length = *cp++; 4783 tm->tm_reset_offset = cp - &sc->sc_srom[0]; 4784 cp += tm->tm_reset_length * 2; 4785 4786 /* 4787 * The following items are left in the media block 4788 * that we don't particularly care about: 4789 * 4790 * capabilities W 4791 * advertisement W 4792 * full duplex W 4793 * tx threshold W 4794 * MII interrupt W 4795 * 4796 * These appear to be bits in the PHY registers, 4797 * which our MII code handles on its own. 4798 */ 4799 4800 /* 4801 * Before we probe the MII bus, we need to reset 4802 * it and issue the selection sequence. 4803 */ 4804 4805 ncp = &sc->sc_srom[tm->tm_reset_offset]; 4806 for (i = 0; i < tm->tm_reset_length; i++, ncp += 2) { 4807 delay(10); 4808 TULIP_WRITE(sc, CSR_SIAGEN, 4809 TULIP_ROM_GETW(ncp, 0) << 16); 4810 } 4811 4812 ncp = &sc->sc_srom[tm->tm_gp_offset]; 4813 for (i = 0; i < tm->tm_gp_length; i++, ncp += 2) { 4814 delay(10); 4815 TULIP_WRITE(sc, CSR_SIAGEN, 4816 TULIP_ROM_GETW(ncp, 0) << 16); 4817 } 4818 4819 /* If there were no sequences, just lower the pins. */ 4820 if (tm->tm_reset_length == 0 && tm->tm_gp_length == 0) { 4821 delay(10); 4822 TULIP_WRITE(sc, CSR_SIAGEN, 0); 4823 } 4824 4825 /* 4826 * Now, probe the MII for the PHY. Note, we know 4827 * the location of the PHY on the bus, but we don't 4828 * particularly care; the MII code just likes to 4829 * search the whole thing anyhow. 4830 */ 4831 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 4832 MII_PHY_ANY, tm->tm_phyno, 0); 4833 4834 /* 4835 * Now, search for the PHY we hopefully just 4836 * configured. If it's not configured into the 4837 * kernel, we lose. The PHY's default media always 4838 * takes priority. 4839 */ 4840 for (phy = LIST_FIRST(&sc->sc_mii.mii_phys); 4841 phy != NULL; 4842 phy = LIST_NEXT(phy, mii_list)) 4843 if (phy->mii_offset == tm->tm_phyno) 4844 break; 4845 if (phy == NULL) { 4846 printf("%s: unable to configure MII\n", 4847 sc->sc_dev.dv_xname); 4848 break; 4849 } 4850 4851 sc->sc_flags |= TULIPF_HAS_MII; 4852 sc->sc_tick = tlp_mii_tick; 4853 miidef = IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 4854 phy->mii_inst); 4855 4856 /* 4857 * Okay, now that we've found the PHY and the MII 4858 * layer has added all of the media associated 4859 * with that PHY, we need to traverse the media 4860 * list, and add our `tm' to each entry's `aux' 4861 * pointer. 4862 * 4863 * We do this by looking for media with our 4864 * PHY's `instance'. 4865 */ 4866 for (ife = TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list); 4867 ife != NULL; 4868 ife = TAILQ_NEXT(ife, ifm_list)) { 4869 if (IFM_INST(ife->ifm_media) != phy->mii_inst) 4870 continue; 4871 ife->ifm_aux = tm; 4872 } 4873 break; 4874 4875 case TULIP_ROM_MB_21143_SYM: 4876 tlp_get_minst(sc); 4877 sc->sc_media_seen |= 1 << TULIP_ROM_MB_21143_SYM; 4878 4879 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK); 4880 memset(tm, 0, sizeof(*tm)); 4881 4882 tm->tm_type = TULIP_ROM_MB_21143_SYM; 4883 tm->tm_get = tlp_sia_get; 4884 tm->tm_set = tlp_sia_set; 4885 4886 /* First is the media type code. */ 4887 tsti = tlp_srom_to_ifmedia(cp[0] & 4888 TULIP_ROM_MB_MEDIA_CODE); 4889 if (tsti == NULL) { 4890 /* Invalid media code. */ 4891 free(tm, M_DEVBUF); 4892 break; 4893 } 4894 4895 /* Get defaults. */ 4896 tlp_srom_media_info(sc, tsti, tm); 4897 4898 /* Next is GPIO control/data. */ 4899 tm->tm_gpctl = TULIP_ROM_GETW(cp, 1); 4900 tm->tm_gpdata = TULIP_ROM_GETW(cp, 3); 4901 4902 /* 4903 * Next is a word containing OPMODE information 4904 * and info on how to detect if this media is 4905 * active. 4906 */ 4907 word = TULIP_ROM_GETW(cp, 5); 4908 tm->tm_opmode = TULIP_ROM_MB_OPMODE(word); 4909 if ((word & TULIP_ROM_MB_NOINDICATOR) == 0) { 4910 tm->tm_actmask = 4911 TULIP_ROM_MB_BITPOS(word); 4912 tm->tm_actdata = 4913 (word & TULIP_ROM_MB_POLARITY) ? 4914 0 : tm->tm_actmask; 4915 } 4916 4917 ifmedia_add(&sc->sc_mii.mii_media, 4918 IFM_MAKEWORD(IFM_ETHER, tsti->tsti_subtype, 4919 tsti->tsti_options, sc->sc_tlp_minst), 0, tm); 4920 break; 4921 4922 case TULIP_ROM_MB_21143_RESET: 4923 printf("%s: 21143 reset block\n", sc->sc_dev.dv_xname); 4924 break; 4925 4926 default: 4927 printf("%s: unknown ISV media block type 0x%02x\n", 4928 sc->sc_dev.dv_xname, type); 4929 } 4930 } 4931 4932 /* 4933 * Deal with the case where no media is configured. 4934 */ 4935 if (TAILQ_FIRST(&sc->sc_mii.mii_media.ifm_list) == NULL) { 4936 printf("%s: no media found!\n", sc->sc_dev.dv_xname); 4937 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 4938 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 4939 return; 4940 } 4941 4942 /* 4943 * Pick the default media. 4944 */ 4945 if (miidef != 0) 4946 defmedia = miidef; 4947 else { 4948 /* 4949 * XXX Pick a better default. Should come from SROM 4950 * XXX on 21140[A], and should be "auto" on 21142, 4951 * XXX 21143, and Macronix chips. 4952 */ 4953 defmedia = IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0); 4954 } 4955 4956 ifmedia_set(&sc->sc_mii.mii_media, defmedia); 4957 4958 /* 4959 * Display any non-MII media we've located. 4960 */ 4961 if (sc->sc_media_seen & 4962 ~((1 << TULIP_ROM_MB_21140_MII) | (1 << TULIP_ROM_MB_21142_MII))) 4963 tlp_print_media(sc); 4964 4965 tlp_sia_fixup(sc); 4966 } 4967 4968 void 4969 tlp_2114x_isv_tmsw_get(sc, ifmr) 4970 struct tulip_softc *sc; 4971 struct ifmediareq *ifmr; 4972 { 4973 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4974 struct tulip_21x4x_media *tm = ife->ifm_aux; 4975 4976 /* 4977 * We might be polling a non-MII autosense; check for that. 4978 */ 4979 if (tm == NULL) { 4980 #ifdef DIAGNOSTIC 4981 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 4982 panic("tlp_2114x_isv_tmsw_get"); 4983 #endif 4984 tm = sc->sc_nway_active->ifm_aux; 4985 } 4986 4987 (*tm->tm_get)(sc, ifmr); 4988 } 4989 4990 int 4991 tlp_2114x_isv_tmsw_set(sc) 4992 struct tulip_softc *sc; 4993 { 4994 struct ifmedia_entry *ife = sc->sc_mii.mii_media.ifm_cur; 4995 struct tulip_21x4x_media *tm = ife->ifm_aux; 4996 4997 /* 4998 * We might be setting a non-MII autosense; check for that. 4999 */ 5000 if (tm == NULL) { 5001 #ifdef DIAGNOSTIC 5002 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5003 panic("tlp_2114x_isv_tmsw_set"); 5004 #endif 5005 /* XXX XXX XXX */ 5006 } 5007 5008 /* 5009 * Check to see if we need to reset the chip, and do it. The 5010 * reset path will get the OPMODE register right the next 5011 * time through. 5012 */ 5013 if (TULIP_MEDIA_NEEDSRESET(sc, tm->tm_opmode)) 5014 return (tlp_init(&sc->sc_ethercom.ec_if)); 5015 5016 return ((*tm->tm_set)(sc)); 5017 } 5018 5019 /* 5020 * MII-on-SIO media switch. Handles only MII attached to the SIO. 5021 */ 5022 void tlp_sio_mii_tmsw_init __P((struct tulip_softc *)); 5023 5024 const struct tulip_mediasw tlp_sio_mii_mediasw = { 5025 tlp_sio_mii_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5026 }; 5027 5028 void 5029 tlp_sio_mii_tmsw_init(sc) 5030 struct tulip_softc *sc; 5031 { 5032 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5033 5034 /* 5035 * We don't attach any media info structures to the ifmedia 5036 * entries, so if we're using a pre-init function that needs 5037 * that info, override it to one that doesn't. 5038 */ 5039 if (sc->sc_preinit == tlp_2114x_preinit) 5040 sc->sc_preinit = tlp_2114x_mii_preinit; 5041 5042 sc->sc_mii.mii_ifp = ifp; 5043 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5044 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5045 sc->sc_mii.mii_statchg = sc->sc_statchg; 5046 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5047 tlp_mediastatus); 5048 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5049 MII_OFFSET_ANY, 0); 5050 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5051 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5052 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5053 } else { 5054 sc->sc_flags |= TULIPF_HAS_MII; 5055 sc->sc_tick = tlp_mii_tick; 5056 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5057 } 5058 } 5059 5060 /* 5061 * Lite-On PNIC media switch. Must handle MII or internal NWAY. 5062 */ 5063 void tlp_pnic_tmsw_init __P((struct tulip_softc *)); 5064 void tlp_pnic_tmsw_get __P((struct tulip_softc *, struct ifmediareq *)); 5065 int tlp_pnic_tmsw_set __P((struct tulip_softc *)); 5066 5067 const struct tulip_mediasw tlp_pnic_mediasw = { 5068 tlp_pnic_tmsw_init, tlp_pnic_tmsw_get, tlp_pnic_tmsw_set 5069 }; 5070 5071 void tlp_pnic_nway_statchg __P((struct device *)); 5072 void tlp_pnic_nway_tick __P((void *)); 5073 int tlp_pnic_nway_service __P((struct tulip_softc *, int)); 5074 void tlp_pnic_nway_reset __P((struct tulip_softc *)); 5075 int tlp_pnic_nway_auto __P((struct tulip_softc *, int)); 5076 void tlp_pnic_nway_auto_timeout __P((void *)); 5077 void tlp_pnic_nway_status __P((struct tulip_softc *)); 5078 void tlp_pnic_nway_acomp __P((struct tulip_softc *)); 5079 5080 void 5081 tlp_pnic_tmsw_init(sc) 5082 struct tulip_softc *sc; 5083 { 5084 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5085 const char *sep = ""; 5086 5087 #define ADD(m, c) ifmedia_add(&sc->sc_mii.mii_media, (m), (c), NULL) 5088 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 5089 5090 sc->sc_mii.mii_ifp = ifp; 5091 sc->sc_mii.mii_readreg = tlp_pnic_mii_readreg; 5092 sc->sc_mii.mii_writereg = tlp_pnic_mii_writereg; 5093 sc->sc_mii.mii_statchg = sc->sc_statchg; 5094 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5095 tlp_mediastatus); 5096 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5097 MII_OFFSET_ANY, 0); 5098 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5099 /* XXX What about AUI/BNC support? */ 5100 printf("%s: ", sc->sc_dev.dv_xname); 5101 5102 tlp_pnic_nway_reset(sc); 5103 5104 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), 5105 PNIC_NWAY_TW|PNIC_NWAY_CAP10T); 5106 PRINT("10baseT"); 5107 5108 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 5109 PNIC_NWAY_TW|PNIC_NWAY_FD|PNIC_NWAY_CAP10TFDX); 5110 PRINT("10baseT-FDX"); 5111 5112 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 5113 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_CAP100TX); 5114 PRINT("100baseTX"); 5115 5116 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 5117 PNIC_NWAY_TW|PNIC_NWAY_100|PNIC_NWAY_FD| 5118 PNIC_NWAY_CAP100TXFDX); 5119 PRINT("100baseTX-FDX"); 5120 5121 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 5122 PNIC_NWAY_TW|PNIC_NWAY_RN|PNIC_NWAY_NW| 5123 PNIC_NWAY_CAP10T|PNIC_NWAY_CAP10TFDX| 5124 PNIC_NWAY_CAP100TXFDX|PNIC_NWAY_CAP100TX); 5125 PRINT("auto"); 5126 5127 printf("\n"); 5128 5129 sc->sc_statchg = tlp_pnic_nway_statchg; 5130 sc->sc_tick = tlp_pnic_nway_tick; 5131 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5132 } else { 5133 sc->sc_flags |= TULIPF_HAS_MII; 5134 sc->sc_tick = tlp_mii_tick; 5135 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5136 } 5137 5138 #undef ADD 5139 #undef PRINT 5140 } 5141 5142 void 5143 tlp_pnic_tmsw_get(sc, ifmr) 5144 struct tulip_softc *sc; 5145 struct ifmediareq *ifmr; 5146 { 5147 struct mii_data *mii = &sc->sc_mii; 5148 5149 if (sc->sc_flags & TULIPF_HAS_MII) 5150 tlp_mii_getmedia(sc, ifmr); 5151 else { 5152 mii->mii_media_status = 0; 5153 mii->mii_media_active = IFM_NONE; 5154 tlp_pnic_nway_service(sc, MII_POLLSTAT); 5155 ifmr->ifm_status = sc->sc_mii.mii_media_status; 5156 ifmr->ifm_active = sc->sc_mii.mii_media_active; 5157 } 5158 } 5159 5160 int 5161 tlp_pnic_tmsw_set(sc) 5162 struct tulip_softc *sc; 5163 { 5164 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5165 struct mii_data *mii = &sc->sc_mii; 5166 5167 if (sc->sc_flags & TULIPF_HAS_MII) { 5168 /* 5169 * Make sure the built-in Tx jabber timer is disabled. 5170 */ 5171 TULIP_WRITE(sc, CSR_PNIC_ENDEC, PNIC_ENDEC_JDIS); 5172 5173 return (tlp_mii_setmedia(sc)); 5174 } 5175 5176 if (ifp->if_flags & IFF_UP) { 5177 mii->mii_media_status = 0; 5178 mii->mii_media_active = IFM_NONE; 5179 return (tlp_pnic_nway_service(sc, MII_MEDIACHG)); 5180 } 5181 5182 return (0); 5183 } 5184 5185 void 5186 tlp_pnic_nway_statchg(self) 5187 struct device *self; 5188 { 5189 struct tulip_softc *sc = (struct tulip_softc *)self; 5190 5191 /* Idle the transmit and receive processes. */ 5192 tlp_idle(sc, OPMODE_ST|OPMODE_SR); 5193 5194 sc->sc_opmode &= ~(OPMODE_TTM|OPMODE_FD|OPMODE_PS|OPMODE_PCS| 5195 OPMODE_SCR|OPMODE_HBD); 5196 5197 if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) { 5198 sc->sc_opmode |= OPMODE_TTM; 5199 TULIP_WRITE(sc, CSR_GPP, 5200 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 0) | 5201 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5202 } else { 5203 sc->sc_opmode |= OPMODE_PS|OPMODE_PCS|OPMODE_SCR|OPMODE_HBD; 5204 TULIP_WRITE(sc, CSR_GPP, 5205 GPP_PNIC_OUT(GPP_PNIC_PIN_SPEED_RLY, 1) | 5206 GPP_PNIC_OUT(GPP_PNIC_PIN_100M_LPKB, 1)); 5207 } 5208 5209 if (sc->sc_mii.mii_media_active & IFM_FDX) 5210 sc->sc_opmode |= OPMODE_FD|OPMODE_HBD; 5211 5212 /* 5213 * Write new OPMODE bits. This also restarts the transmit 5214 * and receive processes. 5215 */ 5216 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 5217 } 5218 5219 void 5220 tlp_pnic_nway_tick(arg) 5221 void *arg; 5222 { 5223 struct tulip_softc *sc = arg; 5224 int s; 5225 5226 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 5227 return; 5228 5229 s = splnet(); 5230 tlp_pnic_nway_service(sc, MII_TICK); 5231 splx(s); 5232 5233 callout_reset(&sc->sc_tick_callout, hz, tlp_pnic_nway_tick, sc); 5234 } 5235 5236 /* 5237 * Support for the Lite-On PNIC internal NWay block. This is constructed 5238 * somewhat like a PHY driver for simplicity. 5239 */ 5240 5241 int 5242 tlp_pnic_nway_service(sc, cmd) 5243 struct tulip_softc *sc; 5244 int cmd; 5245 { 5246 struct mii_data *mii = &sc->sc_mii; 5247 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5248 5249 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 5250 return (0); 5251 5252 switch (cmd) { 5253 case MII_POLLSTAT: 5254 /* Nothing special to do here. */ 5255 break; 5256 5257 case MII_MEDIACHG: 5258 switch (IFM_SUBTYPE(ife->ifm_media)) { 5259 case IFM_AUTO: 5260 (void) tlp_pnic_nway_auto(sc, 1); 5261 break; 5262 case IFM_100_T4: 5263 /* 5264 * XXX Not supported as a manual setting right now. 5265 */ 5266 return (EINVAL); 5267 default: 5268 /* 5269 * NWAY register data is stored in the ifmedia entry. 5270 */ 5271 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5272 } 5273 break; 5274 5275 case MII_TICK: 5276 /* 5277 * Only used for autonegotiation. 5278 */ 5279 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 5280 return (0); 5281 5282 /* 5283 * Check to see if we have link. If we do, we don't 5284 * need to restart the autonegotiation process. 5285 */ 5286 if (sc->sc_flags & TULIPF_LINK_UP) 5287 return (0); 5288 5289 /* 5290 * Only retry autonegotiation every 5 seconds. 5291 */ 5292 if (++sc->sc_nway_ticks != 5) 5293 return (0); 5294 5295 sc->sc_nway_ticks = 0; 5296 tlp_pnic_nway_reset(sc); 5297 if (tlp_pnic_nway_auto(sc, 0) == EJUSTRETURN) 5298 return (0); 5299 break; 5300 } 5301 5302 /* Update the media status. */ 5303 tlp_pnic_nway_status(sc); 5304 5305 /* Callback if something changed. */ 5306 if ((sc->sc_nway_active == NULL || 5307 sc->sc_nway_active->ifm_media != mii->mii_media_active) || 5308 cmd == MII_MEDIACHG) { 5309 (*sc->sc_statchg)(&sc->sc_dev); 5310 tlp_nway_activate(sc, mii->mii_media_active); 5311 } 5312 return (0); 5313 } 5314 5315 void 5316 tlp_pnic_nway_reset(sc) 5317 struct tulip_softc *sc; 5318 { 5319 5320 TULIP_WRITE(sc, CSR_PNIC_NWAY, PNIC_NWAY_RS); 5321 delay(100); 5322 TULIP_WRITE(sc, CSR_PNIC_NWAY, 0); 5323 } 5324 5325 int 5326 tlp_pnic_nway_auto(sc, waitfor) 5327 struct tulip_softc *sc; 5328 int waitfor; 5329 { 5330 struct mii_data *mii = &sc->sc_mii; 5331 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 5332 u_int32_t reg; 5333 int i; 5334 5335 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) 5336 TULIP_WRITE(sc, CSR_PNIC_NWAY, ife->ifm_data); 5337 5338 if (waitfor) { 5339 /* Wait 500ms for it to complete. */ 5340 for (i = 0; i < 500; i++) { 5341 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5342 if (reg & PNIC_NWAY_LPAR_MASK) { 5343 tlp_pnic_nway_acomp(sc); 5344 return (0); 5345 } 5346 delay(1000); 5347 } 5348 #if 0 5349 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5350 printf("%s: autonegotiation failed to complete\n", 5351 sc->sc_dev.dv_xname); 5352 #endif 5353 5354 /* 5355 * Don't need to worry about clearing DOINGAUTO. 5356 * If that's set, a timeout is pending, and it will 5357 * clear the flag. 5358 */ 5359 return (EIO); 5360 } 5361 5362 /* 5363 * Just let it finish asynchronously. This is for the benefit of 5364 * the tick handler driving autonegotiation. Don't want 500ms 5365 * delays all the time while the system is running! 5366 */ 5367 if ((sc->sc_flags & TULIPF_DOINGAUTO) == 0) { 5368 sc->sc_flags |= TULIPF_DOINGAUTO; 5369 callout_reset(&sc->sc_nway_callout, hz >> 1, 5370 tlp_pnic_nway_auto_timeout, sc); 5371 } 5372 return (EJUSTRETURN); 5373 } 5374 5375 void 5376 tlp_pnic_nway_auto_timeout(arg) 5377 void *arg; 5378 { 5379 struct tulip_softc *sc = arg; 5380 u_int32_t reg; 5381 int s; 5382 5383 s = splnet(); 5384 sc->sc_flags &= ~TULIPF_DOINGAUTO; 5385 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5386 #if 0 5387 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) 5388 printf("%s: autonegotiation failed to complete\n", 5389 sc->sc_dev.dv_xname); 5390 #endif 5391 5392 tlp_pnic_nway_acomp(sc); 5393 5394 /* Update the media status. */ 5395 (void) tlp_pnic_nway_service(sc, MII_POLLSTAT); 5396 splx(s); 5397 } 5398 5399 void 5400 tlp_pnic_nway_status(sc) 5401 struct tulip_softc *sc; 5402 { 5403 struct mii_data *mii = &sc->sc_mii; 5404 u_int32_t reg; 5405 5406 mii->mii_media_status = IFM_AVALID; 5407 mii->mii_media_active = IFM_ETHER; 5408 5409 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5410 5411 if (sc->sc_flags & TULIPF_LINK_UP) 5412 mii->mii_media_status |= IFM_ACTIVE; 5413 5414 if (reg & PNIC_NWAY_NW) { 5415 if ((reg & PNIC_NWAY_LPAR_MASK) == 0) { 5416 /* Erg, still trying, I guess... */ 5417 mii->mii_media_active |= IFM_NONE; 5418 return; 5419 } 5420 5421 #if 0 5422 if (reg & PNIC_NWAY_LPAR100T4) 5423 mii->mii_media_active |= IFM_100_T4; 5424 else 5425 #endif 5426 if (reg & PNIC_NWAY_LPAR100TXFDX) 5427 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 5428 else if (reg & PNIC_NWAY_LPAR100TX) 5429 mii->mii_media_active |= IFM_100_TX; 5430 else if (reg & PNIC_NWAY_LPAR10TFDX) 5431 mii->mii_media_active |= IFM_10_T|IFM_FDX; 5432 else if (reg & PNIC_NWAY_LPAR10T) 5433 mii->mii_media_active |= IFM_10_T; 5434 else 5435 mii->mii_media_active |= IFM_NONE; 5436 } else { 5437 if (reg & PNIC_NWAY_100) 5438 mii->mii_media_active |= IFM_100_TX; 5439 else 5440 mii->mii_media_active |= IFM_10_T; 5441 if (reg & PNIC_NWAY_FD) 5442 mii->mii_media_active |= IFM_FDX; 5443 } 5444 } 5445 5446 void 5447 tlp_pnic_nway_acomp(sc) 5448 struct tulip_softc *sc; 5449 { 5450 u_int32_t reg; 5451 5452 reg = TULIP_READ(sc, CSR_PNIC_NWAY); 5453 reg &= ~(PNIC_NWAY_FD|PNIC_NWAY_100|PNIC_NWAY_RN); 5454 5455 if (reg & (PNIC_NWAY_LPAR100TXFDX|PNIC_NWAY_LPAR100TX)) 5456 reg |= PNIC_NWAY_100; 5457 if (reg & (PNIC_NWAY_LPAR10TFDX|PNIC_NWAY_LPAR100TXFDX)) 5458 reg |= PNIC_NWAY_FD; 5459 5460 TULIP_WRITE(sc, CSR_PNIC_NWAY, reg); 5461 } 5462 5463 /* 5464 * Macronix PMAC and Lite-On PNIC-II media switch: 5465 * 5466 * MX98713 and MX98713A 21140-like MII or GPIO media. 5467 * 5468 * MX98713A 21143-like MII or SIA/SYM media. 5469 * 5470 * MX98715, MX98715A, MX98725, 21143-like SIA/SYM media. 5471 * 82C115, MX98715AEC-C, -E 5472 * 5473 * So, what we do here is fake MII-on-SIO or ISV media info, and 5474 * use the ISV media switch get/set functions to handle the rest. 5475 */ 5476 5477 void tlp_pmac_tmsw_init __P((struct tulip_softc *)); 5478 5479 const struct tulip_mediasw tlp_pmac_mediasw = { 5480 tlp_pmac_tmsw_init, tlp_2114x_isv_tmsw_get, tlp_2114x_isv_tmsw_set 5481 }; 5482 5483 const struct tulip_mediasw tlp_pmac_mii_mediasw = { 5484 tlp_pmac_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5485 }; 5486 5487 void 5488 tlp_pmac_tmsw_init(sc) 5489 struct tulip_softc *sc; 5490 { 5491 static const u_int8_t media[] = { 5492 TULIP_ROM_MB_MEDIA_TP, 5493 TULIP_ROM_MB_MEDIA_TP_FDX, 5494 TULIP_ROM_MB_MEDIA_100TX, 5495 TULIP_ROM_MB_MEDIA_100TX_FDX, 5496 }; 5497 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5498 5499 sc->sc_mii.mii_ifp = ifp; 5500 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5501 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5502 sc->sc_mii.mii_statchg = sc->sc_statchg; 5503 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5504 tlp_mediastatus); 5505 if (sc->sc_chip == TULIP_CHIP_MX98713 || 5506 sc->sc_chip == TULIP_CHIP_MX98713A) { 5507 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 5508 MII_PHY_ANY, MII_OFFSET_ANY, 0); 5509 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) { 5510 sc->sc_flags |= TULIPF_HAS_MII; 5511 sc->sc_tick = tlp_mii_tick; 5512 sc->sc_preinit = tlp_2114x_mii_preinit; 5513 sc->sc_mediasw = &tlp_pmac_mii_mediasw; 5514 ifmedia_set(&sc->sc_mii.mii_media, 5515 IFM_ETHER|IFM_AUTO); 5516 return; 5517 } 5518 } 5519 5520 switch (sc->sc_chip) { 5521 case TULIP_CHIP_MX98713: 5522 tlp_add_srom_media(sc, TULIP_ROM_MB_21140_GPR, 5523 tlp_21140_gpio_get, tlp_21140_gpio_set, media, 4); 5524 5525 /* 5526 * XXX Should implement auto-sense for this someday, 5527 * XXX when we do the same for the 21140. 5528 */ 5529 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5530 break; 5531 5532 default: 5533 tlp_add_srom_media(sc, TULIP_ROM_MB_21142_SIA, 5534 tlp_sia_get, tlp_sia_set, media, 2); 5535 tlp_add_srom_media(sc, TULIP_ROM_MB_21143_SYM, 5536 tlp_sia_get, tlp_sia_set, media + 2, 2); 5537 5538 /* 5539 * XXX Autonegotiation not yet supported. 5540 */ 5541 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 5542 break; 5543 } 5544 5545 tlp_print_media(sc); 5546 tlp_sia_fixup(sc); 5547 5548 /* Set the LED modes. */ 5549 tlp_pmac_reset(sc); 5550 5551 sc->sc_reset = tlp_pmac_reset; 5552 } 5553 5554 /* 5555 * ADMtek AL981 media switch. Only has internal PHY. 5556 */ 5557 void tlp_al981_tmsw_init __P((struct tulip_softc *)); 5558 5559 const struct tulip_mediasw tlp_al981_mediasw = { 5560 tlp_al981_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5561 }; 5562 5563 void 5564 tlp_al981_tmsw_init(sc) 5565 struct tulip_softc *sc; 5566 { 5567 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5568 5569 sc->sc_mii.mii_ifp = ifp; 5570 sc->sc_mii.mii_readreg = tlp_al981_mii_readreg; 5571 sc->sc_mii.mii_writereg = tlp_al981_mii_writereg; 5572 sc->sc_mii.mii_statchg = sc->sc_statchg; 5573 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5574 tlp_mediastatus); 5575 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5576 MII_OFFSET_ANY, 0); 5577 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5578 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5579 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5580 } else { 5581 sc->sc_flags |= TULIPF_HAS_MII; 5582 sc->sc_tick = tlp_mii_tick; 5583 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5584 } 5585 } 5586 5587 /* 5588 * ADMtek AN983/985 media switch. Only has internal PHY, but 5589 * on an SIO-like interface. Unfortunately, we can't use the 5590 * standard SIO media switch, because the AN985 "ghosts" the 5591 * singly PHY at every address. 5592 */ 5593 void tlp_an985_tmsw_init __P((struct tulip_softc *)); 5594 5595 const struct tulip_mediasw tlp_an985_mediasw = { 5596 tlp_an985_tmsw_init, tlp_mii_getmedia, tlp_mii_setmedia 5597 }; 5598 5599 void 5600 tlp_an985_tmsw_init(sc) 5601 struct tulip_softc *sc; 5602 { 5603 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5604 5605 sc->sc_mii.mii_ifp = ifp; 5606 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5607 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5608 sc->sc_mii.mii_statchg = sc->sc_statchg; 5609 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5610 tlp_mediastatus); 5611 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 1, 5612 MII_OFFSET_ANY, 0); 5613 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5614 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5615 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5616 } else { 5617 sc->sc_flags |= TULIPF_HAS_MII; 5618 sc->sc_tick = tlp_mii_tick; 5619 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5620 } 5621 } 5622 5623 /* 5624 * Davicom DM9102 media switch. Internal PHY and possibly HomePNA. 5625 */ 5626 void tlp_dm9102_tmsw_init __P((struct tulip_softc *)); 5627 void tlp_dm9102_tmsw_getmedia __P((struct tulip_softc *, 5628 struct ifmediareq *)); 5629 int tlp_dm9102_tmsw_setmedia __P((struct tulip_softc *)); 5630 5631 const struct tulip_mediasw tlp_dm9102_mediasw = { 5632 tlp_dm9102_tmsw_init, tlp_dm9102_tmsw_getmedia, 5633 tlp_dm9102_tmsw_setmedia 5634 }; 5635 5636 void 5637 tlp_dm9102_tmsw_init(sc) 5638 struct tulip_softc *sc; 5639 { 5640 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 5641 u_int32_t opmode; 5642 5643 sc->sc_mii.mii_ifp = ifp; 5644 sc->sc_mii.mii_readreg = tlp_bitbang_mii_readreg; 5645 sc->sc_mii.mii_writereg = tlp_bitbang_mii_writereg; 5646 sc->sc_mii.mii_statchg = sc->sc_statchg; 5647 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 5648 tlp_mediastatus); 5649 5650 /* PHY block already reset via tlp_reset(). */ 5651 5652 /* 5653 * Configure OPMODE properly for the internal MII interface. 5654 */ 5655 switch (sc->sc_chip) { 5656 case TULIP_CHIP_DM9102: 5657 opmode = OPMODE_MBO|OPMODE_HBD|OPMODE_PS; 5658 break; 5659 5660 case TULIP_CHIP_DM9102A: 5661 opmode = OPMODE_MBO|OPMODE_HBD; 5662 break; 5663 5664 default: 5665 /* Nothing. */ 5666 break; 5667 } 5668 5669 TULIP_WRITE(sc, CSR_OPMODE, opmode); 5670 5671 /* Now, probe the internal MII for the internal PHY. */ 5672 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 5673 MII_OFFSET_ANY, 0); 5674 5675 /* 5676 * XXX Figure out what to do about the HomePNA portion 5677 * XXX of the DM9102A. 5678 */ 5679 5680 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 5681 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 5682 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE); 5683 } else { 5684 sc->sc_flags |= TULIPF_HAS_MII; 5685 sc->sc_tick = tlp_mii_tick; 5686 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 5687 } 5688 } 5689 5690 void 5691 tlp_dm9102_tmsw_getmedia(sc, ifmr) 5692 struct tulip_softc *sc; 5693 struct ifmediareq *ifmr; 5694 { 5695 5696 /* XXX HomePNA on DM9102A. */ 5697 tlp_mii_getmedia(sc, ifmr); 5698 } 5699 5700 int 5701 tlp_dm9102_tmsw_setmedia(sc) 5702 struct tulip_softc *sc; 5703 { 5704 5705 /* XXX HomePNA on DM9102A. */ 5706 return (tlp_mii_setmedia(sc)); 5707 } 5708